Commit 74c78036 authored by Marek Szyprowski's avatar Marek Szyprowski Committed by Krzysztof Kozlowski

arm64: dts: exynos: TM2 - add support for MFC video codec device

This patch adds device nodes for MFC video codec device to Exynos5433 SoC
dtsi and proper initial clock configuration to TM2 dts.
Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent e036c75a
...@@ -196,6 +196,11 @@ &cmu_gscl { ...@@ -196,6 +196,11 @@ &cmu_gscl {
<&cmu_top CLK_ACLK_GSCL_333>; <&cmu_top CLK_ACLK_GSCL_333>;
}; };
&cmu_mfc {
assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
};
&cmu_mscl { &cmu_mscl {
assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>, assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
<&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
......
...@@ -856,6 +856,18 @@ jpeg: codec@15020000 { ...@@ -856,6 +856,18 @@ jpeg: codec@15020000 {
iommus = <&sysmmu_jpeg>; iommus = <&sysmmu_jpeg>;
}; };
mfc: codec@152E0000 {
compatible = "samsung,exynos5433-mfc";
reg = <0x152E0000 0x10000>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "pclk", "aclk", "aclk_xiu";
clocks = <&cmu_mfc CLK_PCLK_MFC>,
<&cmu_mfc CLK_ACLK_MFC>,
<&cmu_mfc CLK_ACLK_XIU_MFCX>;
iommus = <&sysmmu_mfc_0>, <&sysmmu_mfc_1>;
iommu-names = "left", "right";
};
sysmmu_decon0x: sysmmu@0x13a00000 { sysmmu_decon0x: sysmmu@0x13a00000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x13a00000 0x1000>; reg = <0x13a00000 0x1000>;
...@@ -916,6 +928,26 @@ sysmmu_jpeg: sysmmu@0x15060000 { ...@@ -916,6 +928,26 @@ sysmmu_jpeg: sysmmu@0x15060000 {
#iommu-cells = <0>; #iommu-cells = <0>;
}; };
sysmmu_mfc_0: sysmmu@0x15200000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x15200000 0x1000>;
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "pclk", "aclk";
clocks = <&cmu_mfc CLK_PCLK_SMMU_MFC_0>,
<&cmu_mfc CLK_ACLK_SMMU_MFC_0>;
#iommu-cells = <0>;
};
sysmmu_mfc_1: sysmmu@0x15210000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x15210000 0x1000>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "pclk", "aclk";
clocks = <&cmu_mfc CLK_PCLK_SMMU_MFC_1>,
<&cmu_mfc CLK_ACLK_SMMU_MFC_1>;
#iommu-cells = <0>;
};
serial_0: serial@14c10000 { serial_0: serial@14c10000 {
compatible = "samsung,exynos5433-uart"; compatible = "samsung,exynos5433-uart";
reg = <0x14c10000 0x100>; reg = <0x14c10000 0x100>;
......
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