Commit 75346251 authored by Jordan Niethe's avatar Jordan Niethe Committed by Michael Ellerman

powerpc: Use a macro for creating instructions from u32s

In preparation for instructions having a more complex data type start
using a macro, ppc_inst(), for making an instruction out of a u32.  A
macro is used so that instructions can be used as initializer elements.
Currently this does nothing, but it will allow for creating a data type
that can represent prefixed instructions.
Signed-off-by: default avatarJordan Niethe <jniethe5@gmail.com>
[mpe: Change include guard to _ASM_POWERPC_INST_H]
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Reviewed-by: default avatarAlistair Popple <alistair@popple.id.au>
Link: https://lore.kernel.org/r/20200506034050.24806-7-jniethe5@gmail.com
parent 7c95d889
...@@ -11,6 +11,7 @@ ...@@ -11,6 +11,7 @@
#include <linux/string.h> #include <linux/string.h>
#include <linux/kallsyms.h> #include <linux/kallsyms.h>
#include <asm/asm-compat.h> #include <asm/asm-compat.h>
#include <asm/inst.h>
/* Flags for create_branch: /* Flags for create_branch:
* "b" == create_branch(addr, target, 0); * "b" == create_branch(addr, target, 0);
...@@ -48,7 +49,7 @@ static inline int patch_branch_site(s32 *site, unsigned long target, int flags) ...@@ -48,7 +49,7 @@ static inline int patch_branch_site(s32 *site, unsigned long target, int flags)
static inline int modify_instruction(unsigned int *addr, unsigned int clr, static inline int modify_instruction(unsigned int *addr, unsigned int clr,
unsigned int set) unsigned int set)
{ {
return patch_instruction(addr, (*addr & ~clr) | set); return patch_instruction(addr, ppc_inst((*addr & ~clr) | set));
} }
static inline int modify_instruction_site(s32 *site, unsigned int clr, unsigned int set) static inline int modify_instruction_site(s32 *site, unsigned int clr, unsigned int set)
......
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef _ASM_POWERPC_INST_H
#define _ASM_POWERPC_INST_H
/*
* Instruction data type for POWER
*/
#define ppc_inst(x) (x)
#endif /* _ASM_POWERPC_INST_H */
...@@ -24,6 +24,7 @@ ...@@ -24,6 +24,7 @@
#include <asm/disassemble.h> #include <asm/disassemble.h>
#include <asm/cpu_has_feature.h> #include <asm/cpu_has_feature.h>
#include <asm/sstep.h> #include <asm/sstep.h>
#include <asm/inst.h>
struct aligninfo { struct aligninfo {
unsigned char len; unsigned char len;
......
...@@ -18,6 +18,7 @@ ...@@ -18,6 +18,7 @@
#include <asm/firmware.h> #include <asm/firmware.h>
#include <linux/uaccess.h> #include <linux/uaccess.h>
#include <asm/rtas.h> #include <asm/rtas.h>
#include <asm/inst.h>
#ifdef DEBUG #ifdef DEBUG
#include <asm/udbg.h> #include <asm/udbg.h>
...@@ -44,7 +45,7 @@ static void __init create_trampoline(unsigned long addr) ...@@ -44,7 +45,7 @@ static void __init create_trampoline(unsigned long addr)
* branch to "addr" we jump to ("addr" + 32 MB). Although it requires * branch to "addr" we jump to ("addr" + 32 MB). Although it requires
* two instructions it doesn't require any registers. * two instructions it doesn't require any registers.
*/ */
patch_instruction(p, PPC_INST_NOP); patch_instruction(p, ppc_inst(PPC_INST_NOP));
patch_branch(++p, addr + PHYSICAL_START, 0); patch_branch(++p, addr + PHYSICAL_START, 0);
} }
......
...@@ -11,6 +11,7 @@ ...@@ -11,6 +11,7 @@
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/code-patching.h> #include <asm/code-patching.h>
#include <asm/machdep.h> #include <asm/machdep.h>
#include <asm/inst.h>
#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64) #if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
extern void epapr_ev_idle(void); extern void epapr_ev_idle(void);
...@@ -36,7 +37,7 @@ static int __init early_init_dt_scan_epapr(unsigned long node, ...@@ -36,7 +37,7 @@ static int __init early_init_dt_scan_epapr(unsigned long node,
return -1; return -1;
for (i = 0; i < (len / 4); i++) { for (i = 0; i < (len / 4); i++) {
u32 inst = be32_to_cpu(insts[i]); u32 inst = ppc_inst(be32_to_cpu(insts[i]));
patch_instruction(epapr_hypercall_start + i, inst); patch_instruction(epapr_hypercall_start + i, inst);
#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64) #if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
patch_instruction(epapr_ev_idle_start + i, inst); patch_instruction(epapr_ev_idle_start + i, inst);
......
...@@ -24,6 +24,7 @@ ...@@ -24,6 +24,7 @@
#include <asm/debug.h> #include <asm/debug.h>
#include <asm/debugfs.h> #include <asm/debugfs.h>
#include <asm/hvcall.h> #include <asm/hvcall.h>
#include <asm/inst.h>
#include <linux/uaccess.h> #include <linux/uaccess.h>
/* /*
...@@ -243,7 +244,7 @@ dar_range_overlaps(unsigned long dar, int size, struct arch_hw_breakpoint *info) ...@@ -243,7 +244,7 @@ dar_range_overlaps(unsigned long dar, int size, struct arch_hw_breakpoint *info)
static bool stepping_handler(struct pt_regs *regs, struct perf_event *bp, static bool stepping_handler(struct pt_regs *regs, struct perf_event *bp,
struct arch_hw_breakpoint *info) struct arch_hw_breakpoint *info)
{ {
unsigned int instr = 0; unsigned int instr = ppc_inst(0);
int ret, type, size; int ret, type, size;
struct instruction_op op; struct instruction_op op;
unsigned long addr = info->address; unsigned long addr = info->address;
......
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/jump_label.h> #include <linux/jump_label.h>
#include <asm/code-patching.h> #include <asm/code-patching.h>
#include <asm/inst.h>
void arch_jump_label_transform(struct jump_entry *entry, void arch_jump_label_transform(struct jump_entry *entry,
enum jump_label_type type) enum jump_label_type type)
...@@ -15,5 +16,5 @@ void arch_jump_label_transform(struct jump_entry *entry, ...@@ -15,5 +16,5 @@ void arch_jump_label_transform(struct jump_entry *entry,
if (type == JUMP_LABEL_JMP) if (type == JUMP_LABEL_JMP)
patch_branch(addr, entry->target, 0); patch_branch(addr, entry->target, 0);
else else
patch_instruction(addr, PPC_INST_NOP); patch_instruction(addr, ppc_inst(PPC_INST_NOP));
} }
...@@ -26,6 +26,7 @@ ...@@ -26,6 +26,7 @@
#include <asm/debug.h> #include <asm/debug.h>
#include <asm/code-patching.h> #include <asm/code-patching.h>
#include <linux/slab.h> #include <linux/slab.h>
#include <asm/inst.h>
/* /*
* This table contains the mapping between PowerPC hardware trap types, and * This table contains the mapping between PowerPC hardware trap types, and
...@@ -424,7 +425,7 @@ int kgdb_arch_set_breakpoint(struct kgdb_bkpt *bpt) ...@@ -424,7 +425,7 @@ int kgdb_arch_set_breakpoint(struct kgdb_bkpt *bpt)
if (err) if (err)
return err; return err;
err = patch_instruction(addr, BREAK_INSTR); err = patch_instruction(addr, ppc_inst(BREAK_INSTR));
if (err) if (err)
return -EFAULT; return -EFAULT;
...@@ -439,7 +440,7 @@ int kgdb_arch_remove_breakpoint(struct kgdb_bkpt *bpt) ...@@ -439,7 +440,7 @@ int kgdb_arch_remove_breakpoint(struct kgdb_bkpt *bpt)
unsigned int instr = *(unsigned int *)bpt->saved_instr; unsigned int instr = *(unsigned int *)bpt->saved_instr;
unsigned int *addr = (unsigned int *)bpt->bpt_addr; unsigned int *addr = (unsigned int *)bpt->bpt_addr;
err = patch_instruction(addr, instr); err = patch_instruction(addr, ppc_inst(instr));
if (err) if (err)
return -EFAULT; return -EFAULT;
......
...@@ -23,6 +23,7 @@ ...@@ -23,6 +23,7 @@
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/sstep.h> #include <asm/sstep.h>
#include <asm/sections.h> #include <asm/sections.h>
#include <asm/inst.h>
#include <linux/uaccess.h> #include <linux/uaccess.h>
DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL; DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
...@@ -138,13 +139,13 @@ NOKPROBE_SYMBOL(arch_prepare_kprobe); ...@@ -138,13 +139,13 @@ NOKPROBE_SYMBOL(arch_prepare_kprobe);
void arch_arm_kprobe(struct kprobe *p) void arch_arm_kprobe(struct kprobe *p)
{ {
patch_instruction(p->addr, BREAKPOINT_INSTRUCTION); patch_instruction(p->addr, ppc_inst(BREAKPOINT_INSTRUCTION));
} }
NOKPROBE_SYMBOL(arch_arm_kprobe); NOKPROBE_SYMBOL(arch_arm_kprobe);
void arch_disarm_kprobe(struct kprobe *p) void arch_disarm_kprobe(struct kprobe *p)
{ {
patch_instruction(p->addr, p->opcode); patch_instruction(p->addr, ppc_inst(p->opcode));
} }
NOKPROBE_SYMBOL(arch_disarm_kprobe); NOKPROBE_SYMBOL(arch_disarm_kprobe);
......
...@@ -20,6 +20,7 @@ ...@@ -20,6 +20,7 @@
#include <linux/sort.h> #include <linux/sort.h>
#include <asm/setup.h> #include <asm/setup.h>
#include <asm/sections.h> #include <asm/sections.h>
#include <asm/inst.h>
/* FIXME: We don't do .init separately. To do this, we'd need to have /* FIXME: We don't do .init separately. To do this, we'd need to have
a separate r2 value in the init and core section, and stub between a separate r2 value in the init and core section, and stub between
...@@ -491,7 +492,7 @@ static int restore_r2(const char *name, u32 *instruction, struct module *me) ...@@ -491,7 +492,7 @@ static int restore_r2(const char *name, u32 *instruction, struct module *me)
* "link" branches and they don't return, so they don't need the r2 * "link" branches and they don't return, so they don't need the r2
* restore afterwards. * restore afterwards.
*/ */
if (!instr_is_relative_link_branch(*prev_insn)) if (!instr_is_relative_link_branch(ppc_inst(*prev_insn)))
return 1; return 1;
if (*instruction != PPC_INST_NOP) { if (*instruction != PPC_INST_NOP) {
......
...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
#include <asm/code-patching.h> #include <asm/code-patching.h>
#include <asm/sstep.h> #include <asm/sstep.h>
#include <asm/ppc-opcode.h> #include <asm/ppc-opcode.h>
#include <asm/inst.h>
#define TMPL_CALL_HDLR_IDX \ #define TMPL_CALL_HDLR_IDX \
(optprobe_template_call_handler - optprobe_template_entry) (optprobe_template_call_handler - optprobe_template_entry)
...@@ -147,13 +148,13 @@ void arch_remove_optimized_kprobe(struct optimized_kprobe *op) ...@@ -147,13 +148,13 @@ void arch_remove_optimized_kprobe(struct optimized_kprobe *op)
void patch_imm32_load_insns(unsigned int val, kprobe_opcode_t *addr) void patch_imm32_load_insns(unsigned int val, kprobe_opcode_t *addr)
{ {
/* addis r4,0,(insn)@h */ /* addis r4,0,(insn)@h */
patch_instruction(addr, PPC_INST_ADDIS | ___PPC_RT(4) | patch_instruction(addr, ppc_inst(PPC_INST_ADDIS | ___PPC_RT(4) |
((val >> 16) & 0xffff)); ((val >> 16) & 0xffff)));
addr++; addr++;
/* ori r4,r4,(insn)@l */ /* ori r4,r4,(insn)@l */
patch_instruction(addr, PPC_INST_ORI | ___PPC_RA(4) | patch_instruction(addr, ppc_inst(PPC_INST_ORI | ___PPC_RA(4) |
___PPC_RS(4) | (val & 0xffff)); ___PPC_RS(4) | (val & 0xffff)));
} }
/* /*
...@@ -163,28 +164,28 @@ void patch_imm32_load_insns(unsigned int val, kprobe_opcode_t *addr) ...@@ -163,28 +164,28 @@ void patch_imm32_load_insns(unsigned int val, kprobe_opcode_t *addr)
void patch_imm64_load_insns(unsigned long val, kprobe_opcode_t *addr) void patch_imm64_load_insns(unsigned long val, kprobe_opcode_t *addr)
{ {
/* lis r3,(op)@highest */ /* lis r3,(op)@highest */
patch_instruction(addr, PPC_INST_ADDIS | ___PPC_RT(3) | patch_instruction(addr, ppc_inst(PPC_INST_ADDIS | ___PPC_RT(3) |
((val >> 48) & 0xffff)); ((val >> 48) & 0xffff)));
addr++; addr++;
/* ori r3,r3,(op)@higher */ /* ori r3,r3,(op)@higher */
patch_instruction(addr, PPC_INST_ORI | ___PPC_RA(3) | patch_instruction(addr, ppc_inst(PPC_INST_ORI | ___PPC_RA(3) |
___PPC_RS(3) | ((val >> 32) & 0xffff)); ___PPC_RS(3) | ((val >> 32) & 0xffff)));
addr++; addr++;
/* rldicr r3,r3,32,31 */ /* rldicr r3,r3,32,31 */
patch_instruction(addr, PPC_INST_RLDICR | ___PPC_RA(3) | patch_instruction(addr, ppc_inst(PPC_INST_RLDICR | ___PPC_RA(3) |
___PPC_RS(3) | __PPC_SH64(32) | __PPC_ME64(31)); ___PPC_RS(3) | __PPC_SH64(32) | __PPC_ME64(31)));
addr++; addr++;
/* oris r3,r3,(op)@h */ /* oris r3,r3,(op)@h */
patch_instruction(addr, PPC_INST_ORIS | ___PPC_RA(3) | patch_instruction(addr, ppc_inst(PPC_INST_ORIS | ___PPC_RA(3) |
___PPC_RS(3) | ((val >> 16) & 0xffff)); ___PPC_RS(3) | ((val >> 16) & 0xffff)));
addr++; addr++;
/* ori r3,r3,(op)@l */ /* ori r3,r3,(op)@l */
patch_instruction(addr, PPC_INST_ORI | ___PPC_RA(3) | patch_instruction(addr, ppc_inst(PPC_INST_ORI | ___PPC_RA(3) |
___PPC_RS(3) | (val & 0xffff)); ___PPC_RS(3) | (val & 0xffff)));
} }
int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *p) int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *p)
...@@ -230,7 +231,8 @@ int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *p) ...@@ -230,7 +231,8 @@ int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *p)
size = (TMPL_END_IDX * sizeof(kprobe_opcode_t)) / sizeof(int); size = (TMPL_END_IDX * sizeof(kprobe_opcode_t)) / sizeof(int);
pr_devel("Copying template to %p, size %lu\n", buff, size); pr_devel("Copying template to %p, size %lu\n", buff, size);
for (i = 0; i < size; i++) { for (i = 0; i < size; i++) {
rc = patch_instruction(buff + i, *(optprobe_template_entry + i)); rc = patch_instruction(buff + i,
ppc_inst(*(optprobe_template_entry + i)));
if (rc < 0) if (rc < 0)
goto error; goto error;
} }
......
...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
#include <asm/debugfs.h> #include <asm/debugfs.h>
#include <asm/security_features.h> #include <asm/security_features.h>
#include <asm/setup.h> #include <asm/setup.h>
#include <asm/inst.h>
u64 powerpc_security_features __read_mostly = SEC_FTR_DEFAULT; u64 powerpc_security_features __read_mostly = SEC_FTR_DEFAULT;
...@@ -439,9 +440,11 @@ static void toggle_count_cache_flush(bool enable) ...@@ -439,9 +440,11 @@ static void toggle_count_cache_flush(bool enable)
enable = false; enable = false;
if (!enable) { if (!enable) {
patch_instruction_site(&patch__call_flush_count_cache, PPC_INST_NOP); patch_instruction_site(&patch__call_flush_count_cache,
ppc_inst(PPC_INST_NOP));
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
patch_instruction_site(&patch__call_kvm_flush_link_stack, PPC_INST_NOP); patch_instruction_site(&patch__call_kvm_flush_link_stack,
ppc_inst(PPC_INST_NOP));
#endif #endif
pr_info("link-stack-flush: software flush disabled.\n"); pr_info("link-stack-flush: software flush disabled.\n");
link_stack_flush_enabled = false; link_stack_flush_enabled = false;
...@@ -464,7 +467,8 @@ static void toggle_count_cache_flush(bool enable) ...@@ -464,7 +467,8 @@ static void toggle_count_cache_flush(bool enable)
// If we just need to flush the link stack, patch an early return // If we just need to flush the link stack, patch an early return
if (!security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE)) { if (!security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE)) {
patch_instruction_site(&patch__flush_link_stack_return, PPC_INST_BLR); patch_instruction_site(&patch__flush_link_stack_return,
ppc_inst(PPC_INST_BLR));
no_count_cache_flush(); no_count_cache_flush();
return; return;
} }
...@@ -475,7 +479,7 @@ static void toggle_count_cache_flush(bool enable) ...@@ -475,7 +479,7 @@ static void toggle_count_cache_flush(bool enable)
return; return;
} }
patch_instruction_site(&patch__flush_count_cache_return, PPC_INST_BLR); patch_instruction_site(&patch__flush_count_cache_return, ppc_inst(PPC_INST_BLR));
count_cache_flush_type = COUNT_CACHE_FLUSH_HW; count_cache_flush_type = COUNT_CACHE_FLUSH_HW;
pr_info("count-cache-flush: hardware assisted flush sequence enabled\n"); pr_info("count-cache-flush: hardware assisted flush sequence enabled\n");
} }
......
...@@ -85,7 +85,7 @@ notrace void __init machine_init(u64 dt_ptr) ...@@ -85,7 +85,7 @@ notrace void __init machine_init(u64 dt_ptr)
/* Enable early debugging if any specified (see udbg.h) */ /* Enable early debugging if any specified (see udbg.h) */
udbg_early_init(); udbg_early_init();
patch_instruction_site(&patch__memcpy_nocache, PPC_INST_NOP); patch_instruction_site(&patch__memcpy_nocache, ppc_inst(PPC_INST_NOP));
create_cond_branch(&insn, addr, branch_target(addr), 0x820000); create_cond_branch(&insn, addr, branch_target(addr), 0x820000);
patch_instruction(addr, insn); /* replace b by bne cr0 */ patch_instruction(addr, insn); /* replace b by bne cr0 */
......
...@@ -27,6 +27,7 @@ ...@@ -27,6 +27,7 @@
#include <asm/code-patching.h> #include <asm/code-patching.h>
#include <asm/ftrace.h> #include <asm/ftrace.h>
#include <asm/syscall.h> #include <asm/syscall.h>
#include <asm/inst.h>
#ifdef CONFIG_DYNAMIC_FTRACE #ifdef CONFIG_DYNAMIC_FTRACE
...@@ -161,7 +162,7 @@ __ftrace_make_nop(struct module *mod, ...@@ -161,7 +162,7 @@ __ftrace_make_nop(struct module *mod,
#ifdef CONFIG_MPROFILE_KERNEL #ifdef CONFIG_MPROFILE_KERNEL
/* When using -mkernel_profile there is no load to jump over */ /* When using -mkernel_profile there is no load to jump over */
pop = PPC_INST_NOP; pop = ppc_inst(PPC_INST_NOP);
if (probe_kernel_read(&op, (void *)(ip - 4), 4)) { if (probe_kernel_read(&op, (void *)(ip - 4), 4)) {
pr_err("Fetching instruction at %lx failed.\n", ip - 4); pr_err("Fetching instruction at %lx failed.\n", ip - 4);
...@@ -169,7 +170,7 @@ __ftrace_make_nop(struct module *mod, ...@@ -169,7 +170,7 @@ __ftrace_make_nop(struct module *mod,
} }
/* We expect either a mflr r0, or a std r0, LRSAVE(r1) */ /* We expect either a mflr r0, or a std r0, LRSAVE(r1) */
if (op != PPC_INST_MFLR && op != PPC_INST_STD_LR) { if (op != ppc_inst(PPC_INST_MFLR) && op != ppc_inst(PPC_INST_STD_LR)) {
pr_err("Unexpected instruction %08x around bl _mcount\n", op); pr_err("Unexpected instruction %08x around bl _mcount\n", op);
return -EINVAL; return -EINVAL;
} }
...@@ -188,7 +189,7 @@ __ftrace_make_nop(struct module *mod, ...@@ -188,7 +189,7 @@ __ftrace_make_nop(struct module *mod,
* Use a b +8 to jump over the load. * Use a b +8 to jump over the load.
*/ */
pop = PPC_INST_BRANCH | 8; /* b +8 */ pop = ppc_inst(PPC_INST_BRANCH | 8); /* b +8 */
/* /*
* Check what is in the next instruction. We can see ld r2,40(r1), but * Check what is in the next instruction. We can see ld r2,40(r1), but
...@@ -199,7 +200,7 @@ __ftrace_make_nop(struct module *mod, ...@@ -199,7 +200,7 @@ __ftrace_make_nop(struct module *mod,
return -EFAULT; return -EFAULT;
} }
if (op != PPC_INST_LD_TOC) { if (op != ppc_inst(PPC_INST_LD_TOC)) {
pr_err("Expected %08x found %08x\n", PPC_INST_LD_TOC, op); pr_err("Expected %08x found %08x\n", PPC_INST_LD_TOC, op);
return -EINVAL; return -EINVAL;
} }
...@@ -275,7 +276,7 @@ __ftrace_make_nop(struct module *mod, ...@@ -275,7 +276,7 @@ __ftrace_make_nop(struct module *mod,
return -EINVAL; return -EINVAL;
} }
op = PPC_INST_NOP; op = ppc_inst(PPC_INST_NOP);
if (patch_instruction((unsigned int *)ip, op)) if (patch_instruction((unsigned int *)ip, op))
return -EPERM; return -EPERM;
...@@ -420,7 +421,7 @@ static int __ftrace_make_nop_kernel(struct dyn_ftrace *rec, unsigned long addr) ...@@ -420,7 +421,7 @@ static int __ftrace_make_nop_kernel(struct dyn_ftrace *rec, unsigned long addr)
} }
} }
if (patch_instruction((unsigned int *)ip, PPC_INST_NOP)) { if (patch_instruction((unsigned int *)ip, ppc_inst(PPC_INST_NOP))) {
pr_err("Patching NOP failed.\n"); pr_err("Patching NOP failed.\n");
return -EPERM; return -EPERM;
} }
...@@ -442,7 +443,7 @@ int ftrace_make_nop(struct module *mod, ...@@ -442,7 +443,7 @@ int ftrace_make_nop(struct module *mod,
if (test_24bit_addr(ip, addr)) { if (test_24bit_addr(ip, addr)) {
/* within range */ /* within range */
old = ftrace_call_replace(ip, addr, 1); old = ftrace_call_replace(ip, addr, 1);
new = PPC_INST_NOP; new = ppc_inst(PPC_INST_NOP);
return ftrace_modify_code(ip, old, new); return ftrace_modify_code(ip, old, new);
} else if (core_kernel_text(ip)) } else if (core_kernel_text(ip))
return __ftrace_make_nop_kernel(rec, addr); return __ftrace_make_nop_kernel(rec, addr);
...@@ -496,7 +497,7 @@ expected_nop_sequence(void *ip, unsigned int op0, unsigned int op1) ...@@ -496,7 +497,7 @@ expected_nop_sequence(void *ip, unsigned int op0, unsigned int op1)
* The load offset is different depending on the ABI. For simplicity * The load offset is different depending on the ABI. For simplicity
* just mask it out when doing the compare. * just mask it out when doing the compare.
*/ */
if ((op0 != 0x48000008) || ((op1 & 0xffff0000) != 0xe8410000)) if (op0 != ppc_inst(0x48000008) || ((op1 & 0xffff0000) != 0xe8410000))
return 0; return 0;
return 1; return 1;
} }
...@@ -505,7 +506,7 @@ static int ...@@ -505,7 +506,7 @@ static int
expected_nop_sequence(void *ip, unsigned int op0, unsigned int op1) expected_nop_sequence(void *ip, unsigned int op0, unsigned int op1)
{ {
/* look for patched "NOP" on ppc64 with -mprofile-kernel */ /* look for patched "NOP" on ppc64 with -mprofile-kernel */
if (op0 != PPC_INST_NOP) if (op0 != ppc_inst(PPC_INST_NOP))
return 0; return 0;
return 1; return 1;
} }
...@@ -588,7 +589,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) ...@@ -588,7 +589,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
return -EFAULT; return -EFAULT;
/* It should be pointing to a nop */ /* It should be pointing to a nop */
if (op != PPC_INST_NOP) { if (op != ppc_inst(PPC_INST_NOP)) {
pr_err("Expected NOP but have %x\n", op); pr_err("Expected NOP but have %x\n", op);
return -EINVAL; return -EINVAL;
} }
...@@ -645,7 +646,7 @@ static int __ftrace_make_call_kernel(struct dyn_ftrace *rec, unsigned long addr) ...@@ -645,7 +646,7 @@ static int __ftrace_make_call_kernel(struct dyn_ftrace *rec, unsigned long addr)
return -EFAULT; return -EFAULT;
} }
if (op != PPC_INST_NOP) { if (op != ppc_inst(PPC_INST_NOP)) {
pr_err("Unexpected call sequence at %p: %x\n", ip, op); pr_err("Unexpected call sequence at %p: %x\n", ip, op);
return -EINVAL; return -EINVAL;
} }
...@@ -676,7 +677,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) ...@@ -676,7 +677,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
*/ */
if (test_24bit_addr(ip, addr)) { if (test_24bit_addr(ip, addr)) {
/* within range */ /* within range */
old = PPC_INST_NOP; old = ppc_inst(PPC_INST_NOP);
new = ftrace_call_replace(ip, addr, 1); new = ftrace_call_replace(ip, addr, 1);
return ftrace_modify_code(ip, old, new); return ftrace_modify_code(ip, old, new);
} else if (core_kernel_text(ip)) } else if (core_kernel_text(ip))
......
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#include <linux/kdebug.h> #include <linux/kdebug.h>
#include <asm/sstep.h> #include <asm/sstep.h>
#include <asm/inst.h>
#define UPROBE_TRAP_NR UINT_MAX #define UPROBE_TRAP_NR UINT_MAX
......
...@@ -95,7 +95,7 @@ int kvmppc_emulate_loadstore(struct kvm_vcpu *vcpu) ...@@ -95,7 +95,7 @@ int kvmppc_emulate_loadstore(struct kvm_vcpu *vcpu)
emulated = EMULATE_FAIL; emulated = EMULATE_FAIL;
vcpu->arch.regs.msr = vcpu->arch.shared->msr; vcpu->arch.regs.msr = vcpu->arch.shared->msr;
if (analyse_instr(&op, &vcpu->arch.regs, inst) == 0) { if (analyse_instr(&op, &vcpu->arch.regs, ppc_inst(inst)) == 0) {
int type = op.type & INSTR_TYPE_MASK; int type = op.type & INSTR_TYPE_MASK;
int size = GETSIZE(op.type); int size = GETSIZE(op.type);
......
...@@ -17,6 +17,7 @@ ...@@ -17,6 +17,7 @@
#include <asm/page.h> #include <asm/page.h>
#include <asm/code-patching.h> #include <asm/code-patching.h>
#include <asm/setup.h> #include <asm/setup.h>
#include <asm/inst.h>
static int __patch_instruction(unsigned int *exec_addr, unsigned int instr, static int __patch_instruction(unsigned int *exec_addr, unsigned int instr,
unsigned int *patch_addr) unsigned int *patch_addr)
...@@ -414,37 +415,37 @@ static void __init test_branch_iform(void) ...@@ -414,37 +415,37 @@ static void __init test_branch_iform(void)
addr = (unsigned long)&instr; addr = (unsigned long)&instr;
/* The simplest case, branch to self, no flags */ /* The simplest case, branch to self, no flags */
check(instr_is_branch_iform(0x48000000)); check(instr_is_branch_iform(ppc_inst(0x48000000)));
/* All bits of target set, and flags */ /* All bits of target set, and flags */
check(instr_is_branch_iform(0x4bffffff)); check(instr_is_branch_iform(ppc_inst(0x4bffffff)));
/* High bit of opcode set, which is wrong */ /* High bit of opcode set, which is wrong */
check(!instr_is_branch_iform(0xcbffffff)); check(!instr_is_branch_iform(ppc_inst(0xcbffffff)));
/* Middle bits of opcode set, which is wrong */ /* Middle bits of opcode set, which is wrong */
check(!instr_is_branch_iform(0x7bffffff)); check(!instr_is_branch_iform(ppc_inst(0x7bffffff)));
/* Simplest case, branch to self with link */ /* Simplest case, branch to self with link */
check(instr_is_branch_iform(0x48000001)); check(instr_is_branch_iform(ppc_inst(0x48000001)));
/* All bits of targets set */ /* All bits of targets set */
check(instr_is_branch_iform(0x4bfffffd)); check(instr_is_branch_iform(ppc_inst(0x4bfffffd)));
/* Some bits of targets set */ /* Some bits of targets set */
check(instr_is_branch_iform(0x4bff00fd)); check(instr_is_branch_iform(ppc_inst(0x4bff00fd)));
/* Must be a valid branch to start with */ /* Must be a valid branch to start with */
check(!instr_is_branch_iform(0x7bfffffd)); check(!instr_is_branch_iform(ppc_inst(0x7bfffffd)));
/* Absolute branch to 0x100 */ /* Absolute branch to 0x100 */
instr = 0x48000103; instr = ppc_inst(0x48000103);
check(instr_is_branch_to_addr(&instr, 0x100)); check(instr_is_branch_to_addr(&instr, 0x100));
/* Absolute branch to 0x420fc */ /* Absolute branch to 0x420fc */
instr = 0x480420ff; instr = ppc_inst(0x480420ff);
check(instr_is_branch_to_addr(&instr, 0x420fc)); check(instr_is_branch_to_addr(&instr, 0x420fc));
/* Maximum positive relative branch, + 20MB - 4B */ /* Maximum positive relative branch, + 20MB - 4B */
instr = 0x49fffffc; instr = ppc_inst(0x49fffffc);
check(instr_is_branch_to_addr(&instr, addr + 0x1FFFFFC)); check(instr_is_branch_to_addr(&instr, addr + 0x1FFFFFC));
/* Smallest negative relative branch, - 4B */ /* Smallest negative relative branch, - 4B */
instr = 0x4bfffffc; instr = ppc_inst(0x4bfffffc);
check(instr_is_branch_to_addr(&instr, addr - 4)); check(instr_is_branch_to_addr(&instr, addr - 4));
/* Largest negative relative branch, - 32 MB */ /* Largest negative relative branch, - 32 MB */
instr = 0x4a000000; instr = ppc_inst(0x4a000000);
check(instr_is_branch_to_addr(&instr, addr - 0x2000000)); check(instr_is_branch_to_addr(&instr, addr - 0x2000000));
/* Branch to self, with link */ /* Branch to self, with link */
...@@ -478,7 +479,7 @@ static void __init test_branch_iform(void) ...@@ -478,7 +479,7 @@ static void __init test_branch_iform(void)
/* Check flags are masked correctly */ /* Check flags are masked correctly */
err = create_branch(&instr, &instr, addr, 0xFFFFFFFC); err = create_branch(&instr, &instr, addr, 0xFFFFFFFC);
check(instr_is_branch_to_addr(&instr, addr)); check(instr_is_branch_to_addr(&instr, addr));
check(instr == 0x48000000); check(instr == ppc_inst(0x48000000));
} }
static void __init test_create_function_call(void) static void __init test_create_function_call(void)
...@@ -505,28 +506,28 @@ static void __init test_branch_bform(void) ...@@ -505,28 +506,28 @@ static void __init test_branch_bform(void)
addr = (unsigned long)iptr; addr = (unsigned long)iptr;
/* The simplest case, branch to self, no flags */ /* The simplest case, branch to self, no flags */
check(instr_is_branch_bform(0x40000000)); check(instr_is_branch_bform(ppc_inst(0x40000000)));
/* All bits of target set, and flags */ /* All bits of target set, and flags */
check(instr_is_branch_bform(0x43ffffff)); check(instr_is_branch_bform(ppc_inst(0x43ffffff)));
/* High bit of opcode set, which is wrong */ /* High bit of opcode set, which is wrong */
check(!instr_is_branch_bform(0xc3ffffff)); check(!instr_is_branch_bform(ppc_inst(0xc3ffffff)));
/* Middle bits of opcode set, which is wrong */ /* Middle bits of opcode set, which is wrong */
check(!instr_is_branch_bform(0x7bffffff)); check(!instr_is_branch_bform(ppc_inst(0x7bffffff)));
/* Absolute conditional branch to 0x100 */ /* Absolute conditional branch to 0x100 */
instr = 0x43ff0103; instr = ppc_inst(0x43ff0103);
check(instr_is_branch_to_addr(&instr, 0x100)); check(instr_is_branch_to_addr(&instr, 0x100));
/* Absolute conditional branch to 0x20fc */ /* Absolute conditional branch to 0x20fc */
instr = 0x43ff20ff; instr = ppc_inst(0x43ff20ff);
check(instr_is_branch_to_addr(&instr, 0x20fc)); check(instr_is_branch_to_addr(&instr, 0x20fc));
/* Maximum positive relative conditional branch, + 32 KB - 4B */ /* Maximum positive relative conditional branch, + 32 KB - 4B */
instr = 0x43ff7ffc; instr = ppc_inst(0x43ff7ffc);
check(instr_is_branch_to_addr(&instr, addr + 0x7FFC)); check(instr_is_branch_to_addr(&instr, addr + 0x7FFC));
/* Smallest negative relative conditional branch, - 4B */ /* Smallest negative relative conditional branch, - 4B */
instr = 0x43fffffc; instr = ppc_inst(0x43fffffc);
check(instr_is_branch_to_addr(&instr, addr - 4)); check(instr_is_branch_to_addr(&instr, addr - 4));
/* Largest negative relative conditional branch, - 32 KB */ /* Largest negative relative conditional branch, - 32 KB */
instr = 0x43ff8000; instr = ppc_inst(0x43ff8000);
check(instr_is_branch_to_addr(&instr, addr - 0x8000)); check(instr_is_branch_to_addr(&instr, addr - 0x8000));
/* All condition code bits set & link */ /* All condition code bits set & link */
...@@ -563,7 +564,7 @@ static void __init test_branch_bform(void) ...@@ -563,7 +564,7 @@ static void __init test_branch_bform(void)
/* Check flags are masked correctly */ /* Check flags are masked correctly */
err = create_cond_branch(&instr, iptr, addr, 0xFFFFFFFC); err = create_cond_branch(&instr, iptr, addr, 0xFFFFFFFC);
check(instr_is_branch_to_addr(&instr, addr)); check(instr_is_branch_to_addr(&instr, addr));
check(instr == 0x43FF0000); check(instr == ppc_inst(0x43FF0000));
} }
static void __init test_translate_branch(void) static void __init test_translate_branch(void)
...@@ -597,7 +598,7 @@ static void __init test_translate_branch(void) ...@@ -597,7 +598,7 @@ static void __init test_translate_branch(void)
patch_instruction(q, instr); patch_instruction(q, instr);
check(instr_is_branch_to_addr(p, addr)); check(instr_is_branch_to_addr(p, addr));
check(instr_is_branch_to_addr(q, addr)); check(instr_is_branch_to_addr(q, addr));
check(*q == 0x4a000000); check(*q == ppc_inst(0x4a000000));
/* Maximum positive case, move x to x - 32 MB + 4 */ /* Maximum positive case, move x to x - 32 MB + 4 */
p = buf + 0x2000000; p = buf + 0x2000000;
...@@ -608,7 +609,7 @@ static void __init test_translate_branch(void) ...@@ -608,7 +609,7 @@ static void __init test_translate_branch(void)
patch_instruction(q, instr); patch_instruction(q, instr);
check(instr_is_branch_to_addr(p, addr)); check(instr_is_branch_to_addr(p, addr));
check(instr_is_branch_to_addr(q, addr)); check(instr_is_branch_to_addr(q, addr));
check(*q == 0x49fffffc); check(*q == ppc_inst(0x49fffffc));
/* Jump to x + 16 MB moved to x + 20 MB */ /* Jump to x + 16 MB moved to x + 20 MB */
p = buf; p = buf;
...@@ -654,7 +655,7 @@ static void __init test_translate_branch(void) ...@@ -654,7 +655,7 @@ static void __init test_translate_branch(void)
patch_instruction(q, instr); patch_instruction(q, instr);
check(instr_is_branch_to_addr(p, addr)); check(instr_is_branch_to_addr(p, addr));
check(instr_is_branch_to_addr(q, addr)); check(instr_is_branch_to_addr(q, addr));
check(*q == 0x43ff8000); check(*q == ppc_inst(0x43ff8000));
/* Maximum positive case, move x to x - 32 KB + 4 */ /* Maximum positive case, move x to x - 32 KB + 4 */
p = buf + 0x8000; p = buf + 0x8000;
...@@ -666,7 +667,7 @@ static void __init test_translate_branch(void) ...@@ -666,7 +667,7 @@ static void __init test_translate_branch(void)
patch_instruction(q, instr); patch_instruction(q, instr);
check(instr_is_branch_to_addr(p, addr)); check(instr_is_branch_to_addr(p, addr));
check(instr_is_branch_to_addr(q, addr)); check(instr_is_branch_to_addr(q, addr));
check(*q == 0x43ff7ffc); check(*q == ppc_inst(0x43ff7ffc));
/* Jump to x + 12 KB moved to x + 20 KB */ /* Jump to x + 12 KB moved to x + 20 KB */
p = buf; p = buf;
......
...@@ -21,6 +21,7 @@ ...@@ -21,6 +21,7 @@
#include <asm/setup.h> #include <asm/setup.h>
#include <asm/security_features.h> #include <asm/security_features.h>
#include <asm/firmware.h> #include <asm/firmware.h>
#include <asm/inst.h>
struct fixup_entry { struct fixup_entry {
unsigned long mask; unsigned long mask;
...@@ -89,7 +90,7 @@ static int patch_feature_section(unsigned long value, struct fixup_entry *fcur) ...@@ -89,7 +90,7 @@ static int patch_feature_section(unsigned long value, struct fixup_entry *fcur)
} }
for (; dest < end; dest++) for (; dest < end; dest++)
raw_patch_instruction(dest, PPC_INST_NOP); raw_patch_instruction(dest, ppc_inst(PPC_INST_NOP));
return 0; return 0;
} }
...@@ -146,15 +147,15 @@ static void do_stf_entry_barrier_fixups(enum stf_barrier_type types) ...@@ -146,15 +147,15 @@ static void do_stf_entry_barrier_fixups(enum stf_barrier_type types)
pr_devel("patching dest %lx\n", (unsigned long)dest); pr_devel("patching dest %lx\n", (unsigned long)dest);
patch_instruction(dest, instrs[0]); patch_instruction(dest, ppc_inst(instrs[0]));
if (types & STF_BARRIER_FALLBACK) if (types & STF_BARRIER_FALLBACK)
patch_branch(dest + 1, (unsigned long)&stf_barrier_fallback, patch_branch(dest + 1, (unsigned long)&stf_barrier_fallback,
BRANCH_SET_LINK); BRANCH_SET_LINK);
else else
patch_instruction(dest + 1, instrs[1]); patch_instruction(dest + 1, ppc_inst(instrs[1]));
patch_instruction(dest + 2, instrs[2]); patch_instruction(dest + 2, ppc_inst(instrs[2]));
} }
printk(KERN_DEBUG "stf-barrier: patched %d entry locations (%s barrier)\n", i, printk(KERN_DEBUG "stf-barrier: patched %d entry locations (%s barrier)\n", i,
...@@ -207,12 +208,12 @@ static void do_stf_exit_barrier_fixups(enum stf_barrier_type types) ...@@ -207,12 +208,12 @@ static void do_stf_exit_barrier_fixups(enum stf_barrier_type types)
pr_devel("patching dest %lx\n", (unsigned long)dest); pr_devel("patching dest %lx\n", (unsigned long)dest);
patch_instruction(dest, instrs[0]); patch_instruction(dest, ppc_inst(instrs[0]));
patch_instruction(dest + 1, instrs[1]); patch_instruction(dest + 1, ppc_inst(instrs[1]));
patch_instruction(dest + 2, instrs[2]); patch_instruction(dest + 2, ppc_inst(instrs[2]));
patch_instruction(dest + 3, instrs[3]); patch_instruction(dest + 3, ppc_inst(instrs[3]));
patch_instruction(dest + 4, instrs[4]); patch_instruction(dest + 4, ppc_inst(instrs[4]));
patch_instruction(dest + 5, instrs[5]); patch_instruction(dest + 5, ppc_inst(instrs[5]));
} }
printk(KERN_DEBUG "stf-barrier: patched %d exit locations (%s barrier)\n", i, printk(KERN_DEBUG "stf-barrier: patched %d exit locations (%s barrier)\n", i,
(types == STF_BARRIER_NONE) ? "no" : (types == STF_BARRIER_NONE) ? "no" :
...@@ -260,9 +261,9 @@ void do_rfi_flush_fixups(enum l1d_flush_type types) ...@@ -260,9 +261,9 @@ void do_rfi_flush_fixups(enum l1d_flush_type types)
pr_devel("patching dest %lx\n", (unsigned long)dest); pr_devel("patching dest %lx\n", (unsigned long)dest);
patch_instruction(dest, instrs[0]); patch_instruction(dest, ppc_inst(instrs[0]));
patch_instruction(dest + 1, instrs[1]); patch_instruction(dest + 1, ppc_inst(instrs[1]));
patch_instruction(dest + 2, instrs[2]); patch_instruction(dest + 2, ppc_inst(instrs[2]));
} }
printk(KERN_DEBUG "rfi-flush: patched %d locations (%s flush)\n", i, printk(KERN_DEBUG "rfi-flush: patched %d locations (%s flush)\n", i,
...@@ -295,7 +296,7 @@ void do_barrier_nospec_fixups_range(bool enable, void *fixup_start, void *fixup_ ...@@ -295,7 +296,7 @@ void do_barrier_nospec_fixups_range(bool enable, void *fixup_start, void *fixup_
dest = (void *)start + *start; dest = (void *)start + *start;
pr_devel("patching dest %lx\n", (unsigned long)dest); pr_devel("patching dest %lx\n", (unsigned long)dest);
patch_instruction(dest, instr); patch_instruction(dest, ppc_inst(instr));
} }
printk(KERN_DEBUG "barrier-nospec: patched %d locations\n", i); printk(KERN_DEBUG "barrier-nospec: patched %d locations\n", i);
...@@ -338,8 +339,8 @@ void do_barrier_nospec_fixups_range(bool enable, void *fixup_start, void *fixup_ ...@@ -338,8 +339,8 @@ void do_barrier_nospec_fixups_range(bool enable, void *fixup_start, void *fixup_
dest = (void *)start + *start; dest = (void *)start + *start;
pr_devel("patching dest %lx\n", (unsigned long)dest); pr_devel("patching dest %lx\n", (unsigned long)dest);
patch_instruction(dest, instr[0]); patch_instruction(dest, ppc_inst(instr[0]));
patch_instruction(dest + 1, instr[1]); patch_instruction(dest + 1, ppc_inst(instr[1]));
} }
printk(KERN_DEBUG "barrier-nospec: patched %d locations\n", i); printk(KERN_DEBUG "barrier-nospec: patched %d locations\n", i);
...@@ -353,7 +354,7 @@ static void patch_btb_flush_section(long *curr) ...@@ -353,7 +354,7 @@ static void patch_btb_flush_section(long *curr)
end = (void *)curr + *(curr + 1); end = (void *)curr + *(curr + 1);
for (; start < end; start++) { for (; start < end; start++) {
pr_devel("patching dest %lx\n", (unsigned long)start); pr_devel("patching dest %lx\n", (unsigned long)start);
patch_instruction(start, PPC_INST_NOP); patch_instruction(start, ppc_inst(PPC_INST_NOP));
} }
} }
...@@ -382,7 +383,7 @@ void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end) ...@@ -382,7 +383,7 @@ void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end)
for (; start < end; start++) { for (; start < end; start++) {
dest = (void *)start + *start; dest = (void *)start + *start;
raw_patch_instruction(dest, PPC_INST_LWSYNC); raw_patch_instruction(dest, ppc_inst(PPC_INST_LWSYNC));
} }
} }
...@@ -400,7 +401,7 @@ static void do_final_fixups(void) ...@@ -400,7 +401,7 @@ static void do_final_fixups(void)
length = (__end_interrupts - _stext) / sizeof(int); length = (__end_interrupts - _stext) / sizeof(int);
while (length--) { while (length--) {
raw_patch_instruction(dest, *src); raw_patch_instruction(dest, ppc_inst(*src));
src++; src++;
dest++; dest++;
} }
......
...@@ -11,6 +11,7 @@ ...@@ -11,6 +11,7 @@
#include <asm/sstep.h> #include <asm/sstep.h>
#include <asm/ppc-opcode.h> #include <asm/ppc-opcode.h>
#include <asm/code-patching.h> #include <asm/code-patching.h>
#include <asm/inst.h>
#define IMM_L(i) ((uintptr_t)(i) & 0xffff) #define IMM_L(i) ((uintptr_t)(i) & 0xffff)
#define IMM_DS(i) ((uintptr_t)(i) & 0xfffc) #define IMM_DS(i) ((uintptr_t)(i) & 0xfffc)
...@@ -19,40 +20,40 @@ ...@@ -19,40 +20,40 @@
* Defined with TEST_ prefix so it does not conflict with other * Defined with TEST_ prefix so it does not conflict with other
* definitions. * definitions.
*/ */
#define TEST_LD(r, base, i) (PPC_INST_LD | ___PPC_RT(r) | \ #define TEST_LD(r, base, i) ppc_inst(PPC_INST_LD | ___PPC_RT(r) | \
___PPC_RA(base) | IMM_DS(i)) ___PPC_RA(base) | IMM_DS(i))
#define TEST_LWZ(r, base, i) (PPC_INST_LWZ | ___PPC_RT(r) | \ #define TEST_LWZ(r, base, i) ppc_inst(PPC_INST_LWZ | ___PPC_RT(r) | \
___PPC_RA(base) | IMM_L(i)) ___PPC_RA(base) | IMM_L(i))
#define TEST_LWZX(t, a, b) (PPC_INST_LWZX | ___PPC_RT(t) | \ #define TEST_LWZX(t, a, b) ppc_inst(PPC_INST_LWZX | ___PPC_RT(t) | \
___PPC_RA(a) | ___PPC_RB(b)) ___PPC_RA(a) | ___PPC_RB(b))
#define TEST_STD(r, base, i) (PPC_INST_STD | ___PPC_RS(r) | \ #define TEST_STD(r, base, i) ppc_inst(PPC_INST_STD | ___PPC_RS(r) | \
___PPC_RA(base) | IMM_DS(i)) ___PPC_RA(base) | IMM_DS(i))
#define TEST_LDARX(t, a, b, eh) (PPC_INST_LDARX | ___PPC_RT(t) | \ #define TEST_LDARX(t, a, b, eh) ppc_inst(PPC_INST_LDARX | ___PPC_RT(t) | \
___PPC_RA(a) | ___PPC_RB(b) | \ ___PPC_RA(a) | ___PPC_RB(b) | \
__PPC_EH(eh)) __PPC_EH(eh))
#define TEST_STDCX(s, a, b) (PPC_INST_STDCX | ___PPC_RS(s) | \ #define TEST_STDCX(s, a, b) ppc_inst(PPC_INST_STDCX | ___PPC_RS(s) | \
___PPC_RA(a) | ___PPC_RB(b)) ___PPC_RA(a) | ___PPC_RB(b))
#define TEST_LFSX(t, a, b) (PPC_INST_LFSX | ___PPC_RT(t) | \ #define TEST_LFSX(t, a, b) ppc_inst(PPC_INST_LFSX | ___PPC_RT(t) | \
___PPC_RA(a) | ___PPC_RB(b)) ___PPC_RA(a) | ___PPC_RB(b))
#define TEST_STFSX(s, a, b) (PPC_INST_STFSX | ___PPC_RS(s) | \ #define TEST_STFSX(s, a, b) ppc_inst(PPC_INST_STFSX | ___PPC_RS(s) | \
___PPC_RA(a) | ___PPC_RB(b)) ___PPC_RA(a) | ___PPC_RB(b))
#define TEST_LFDX(t, a, b) (PPC_INST_LFDX | ___PPC_RT(t) | \ #define TEST_LFDX(t, a, b) ppc_inst(PPC_INST_LFDX | ___PPC_RT(t) | \
___PPC_RA(a) | ___PPC_RB(b)) ___PPC_RA(a) | ___PPC_RB(b))
#define TEST_STFDX(s, a, b) (PPC_INST_STFDX | ___PPC_RS(s) | \ #define TEST_STFDX(s, a, b) ppc_inst(PPC_INST_STFDX | ___PPC_RS(s) | \
___PPC_RA(a) | ___PPC_RB(b)) ___PPC_RA(a) | ___PPC_RB(b))
#define TEST_LVX(t, a, b) (PPC_INST_LVX | ___PPC_RT(t) | \ #define TEST_LVX(t, a, b) ppc_inst(PPC_INST_LVX | ___PPC_RT(t) | \
___PPC_RA(a) | ___PPC_RB(b)) ___PPC_RA(a) | ___PPC_RB(b))
#define TEST_STVX(s, a, b) (PPC_INST_STVX | ___PPC_RS(s) | \ #define TEST_STVX(s, a, b) ppc_inst(PPC_INST_STVX | ___PPC_RS(s) | \
___PPC_RA(a) | ___PPC_RB(b)) ___PPC_RA(a) | ___PPC_RB(b))
#define TEST_LXVD2X(s, a, b) (PPC_INST_LXVD2X | VSX_XX1((s), R##a, R##b)) #define TEST_LXVD2X(s, a, b) ppc_inst(PPC_INST_LXVD2X | VSX_XX1((s), R##a, R##b))
#define TEST_STXVD2X(s, a, b) (PPC_INST_STXVD2X | VSX_XX1((s), R##a, R##b)) #define TEST_STXVD2X(s, a, b) ppc_inst(PPC_INST_STXVD2X | VSX_XX1((s), R##a, R##b))
#define TEST_ADD(t, a, b) (PPC_INST_ADD | ___PPC_RT(t) | \ #define TEST_ADD(t, a, b) ppc_inst(PPC_INST_ADD | ___PPC_RT(t) | \
___PPC_RA(a) | ___PPC_RB(b)) ___PPC_RA(a) | ___PPC_RB(b))
#define TEST_ADD_DOT(t, a, b) (PPC_INST_ADD | ___PPC_RT(t) | \ #define TEST_ADD_DOT(t, a, b) ppc_inst(PPC_INST_ADD | ___PPC_RT(t) | \
___PPC_RA(a) | ___PPC_RB(b) | 0x1) ___PPC_RA(a) | ___PPC_RB(b) | 0x1)
#define TEST_ADDC(t, a, b) (PPC_INST_ADDC | ___PPC_RT(t) | \ #define TEST_ADDC(t, a, b) ppc_inst(PPC_INST_ADDC | ___PPC_RT(t) | \
___PPC_RA(a) | ___PPC_RB(b)) ___PPC_RA(a) | ___PPC_RB(b))
#define TEST_ADDC_DOT(t, a, b) (PPC_INST_ADDC | ___PPC_RT(t) | \ #define TEST_ADDC_DOT(t, a, b) ppc_inst(PPC_INST_ADDC | ___PPC_RT(t) | \
___PPC_RA(a) | ___PPC_RB(b) | 0x1) ___PPC_RA(a) | ___PPC_RB(b) | 0x1)
#define MAX_SUBTESTS 16 #define MAX_SUBTESTS 16
...@@ -472,7 +473,7 @@ static struct compute_test compute_tests[] = { ...@@ -472,7 +473,7 @@ static struct compute_test compute_tests[] = {
.subtests = { .subtests = {
{ {
.descr = "R0 = LONG_MAX", .descr = "R0 = LONG_MAX",
.instr = PPC_INST_NOP, .instr = ppc_inst(PPC_INST_NOP),
.regs = { .regs = {
.gpr[0] = LONG_MAX, .gpr[0] = LONG_MAX,
} }
......
...@@ -11,6 +11,7 @@ ...@@ -11,6 +11,7 @@
#include <linux/mmu_context.h> #include <linux/mmu_context.h>
#include <asm/fixmap.h> #include <asm/fixmap.h>
#include <asm/code-patching.h> #include <asm/code-patching.h>
#include <asm/inst.h>
#include <mm/mmu_decl.h> #include <mm/mmu_decl.h>
...@@ -101,7 +102,7 @@ static void mmu_patch_addis(s32 *site, long simm) ...@@ -101,7 +102,7 @@ static void mmu_patch_addis(s32 *site, long simm)
instr &= 0xffff0000; instr &= 0xffff0000;
instr |= ((unsigned long)simm) >> 16; instr |= ((unsigned long)simm) >> 16;
patch_instruction_site(site, instr); patch_instruction_site(site, ppc_inst(instr));
} }
static void mmu_mapin_ram_chunk(unsigned long offset, unsigned long top, pgprot_t prot) static void mmu_mapin_ram_chunk(unsigned long offset, unsigned long top, pgprot_t prot)
...@@ -125,7 +126,7 @@ unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top) ...@@ -125,7 +126,7 @@ unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top)
mapped = 0; mapped = 0;
mmu_mapin_immr(); mmu_mapin_immr();
if (!IS_ENABLED(CONFIG_PIN_TLB_IMMR)) if (!IS_ENABLED(CONFIG_PIN_TLB_IMMR))
patch_instruction_site(&patch__dtlbmiss_immr_jmp, PPC_INST_NOP); patch_instruction_site(&patch__dtlbmiss_immr_jmp, ppc_inst(PPC_INST_NOP));
if (!IS_ENABLED(CONFIG_PIN_TLB_TEXT)) if (!IS_ENABLED(CONFIG_PIN_TLB_TEXT))
mmu_patch_cmp_limit(&patch__itlbmiss_linmem_top, 0); mmu_patch_cmp_limit(&patch__itlbmiss_linmem_top, 0);
} else { } else {
......
...@@ -15,6 +15,7 @@ ...@@ -15,6 +15,7 @@
#include <asm/firmware.h> #include <asm/firmware.h>
#include <asm/ptrace.h> #include <asm/ptrace.h>
#include <asm/code-patching.h> #include <asm/code-patching.h>
#include <asm/inst.h>
#define PERF_8xx_ID_CPU_CYCLES 1 #define PERF_8xx_ID_CPU_CYCLES 1
#define PERF_8xx_ID_HW_INSTRUCTIONS 2 #define PERF_8xx_ID_HW_INSTRUCTIONS 2
...@@ -170,8 +171,8 @@ static void mpc8xx_pmu_del(struct perf_event *event, int flags) ...@@ -170,8 +171,8 @@ static void mpc8xx_pmu_del(struct perf_event *event, int flags)
case PERF_8xx_ID_ITLB_LOAD_MISS: case PERF_8xx_ID_ITLB_LOAD_MISS:
if (atomic_dec_return(&itlb_miss_ref) == 0) { if (atomic_dec_return(&itlb_miss_ref) == 0) {
/* mfspr r10, SPRN_SPRG_SCRATCH0 */ /* mfspr r10, SPRN_SPRG_SCRATCH0 */
unsigned int insn = PPC_INST_MFSPR | __PPC_RS(R10) | struct ppc_inst insn = ppc_inst(PPC_INST_MFSPR | __PPC_RS(R10) |
__PPC_SPR(SPRN_SPRG_SCRATCH0); __PPC_SPR(SPRN_SPRG_SCRATCH0));
patch_instruction_site(&patch__itlbmiss_exit_1, insn); patch_instruction_site(&patch__itlbmiss_exit_1, insn);
#ifndef CONFIG_PIN_TLB_TEXT #ifndef CONFIG_PIN_TLB_TEXT
...@@ -182,8 +183,8 @@ static void mpc8xx_pmu_del(struct perf_event *event, int flags) ...@@ -182,8 +183,8 @@ static void mpc8xx_pmu_del(struct perf_event *event, int flags)
case PERF_8xx_ID_DTLB_LOAD_MISS: case PERF_8xx_ID_DTLB_LOAD_MISS:
if (atomic_dec_return(&dtlb_miss_ref) == 0) { if (atomic_dec_return(&dtlb_miss_ref) == 0) {
/* mfspr r10, SPRN_DAR */ /* mfspr r10, SPRN_DAR */
unsigned int insn = PPC_INST_MFSPR | __PPC_RS(R10) | struct ppc_inst insn = ppc_inst(PPC_INST_MFSPR | __PPC_RS(R10) |
__PPC_SPR(SPRN_DAR); __PPC_SPR(SPRN_DAR));
patch_instruction_site(&patch__dtlbmiss_exit_1, insn); patch_instruction_site(&patch__dtlbmiss_exit_1, insn);
patch_instruction_site(&patch__dtlbmiss_exit_2, insn); patch_instruction_site(&patch__dtlbmiss_exit_2, insn);
......
...@@ -17,6 +17,7 @@ ...@@ -17,6 +17,7 @@
#include <asm/pci-bridge.h> #include <asm/pci-bridge.h>
#include <asm/mpic.h> #include <asm/mpic.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/inst.h>
#include <sysdev/fsl_soc.h> #include <sysdev/fsl_soc.h>
...@@ -82,7 +83,7 @@ smp_86xx_kick_cpu(int nr) ...@@ -82,7 +83,7 @@ smp_86xx_kick_cpu(int nr)
mdelay(1); mdelay(1);
/* Restore the exception vector */ /* Restore the exception vector */
patch_instruction(vector, save_vector); patch_instruction(vector, ppc_inst(save_vector));
local_irq_restore(flags); local_irq_restore(flags);
......
...@@ -49,6 +49,7 @@ ...@@ -49,6 +49,7 @@
#include <asm/keylargo.h> #include <asm/keylargo.h>
#include <asm/pmac_low_i2c.h> #include <asm/pmac_low_i2c.h>
#include <asm/pmac_pfunc.h> #include <asm/pmac_pfunc.h>
#include <asm/inst.h>
#include "pmac.h" #include "pmac.h"
...@@ -826,7 +827,7 @@ static int smp_core99_kick_cpu(int nr) ...@@ -826,7 +827,7 @@ static int smp_core99_kick_cpu(int nr)
mdelay(1); mdelay(1);
/* Restore our exception vector */ /* Restore our exception vector */
patch_instruction(vector, save_vector); patch_instruction(vector, ppc_inst(save_vector));
local_irq_restore(flags); local_irq_restore(flags);
if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu done", 0x347); if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu done", 0x347);
......
...@@ -54,6 +54,7 @@ ...@@ -54,6 +54,7 @@
#include <asm/firmware.h> #include <asm/firmware.h>
#include <asm/code-patching.h> #include <asm/code-patching.h>
#include <asm/sections.h> #include <asm/sections.h>
#include <asm/inst.h>
#ifdef CONFIG_PPC64 #ifdef CONFIG_PPC64
#include <asm/hvcall.h> #include <asm/hvcall.h>
...@@ -946,7 +947,7 @@ static void remove_bpts(void) ...@@ -946,7 +947,7 @@ static void remove_bpts(void)
if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP) if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP)
continue; continue;
if (mread(bp->address, &instr, 4) == 4 if (mread(bp->address, &instr, 4) == 4
&& instr == bpinstr && instr == ppc_inst(bpinstr)
&& patch_instruction( && patch_instruction(
(unsigned int *)bp->address, bp->instr[0]) != 0) (unsigned int *)bp->address, bp->instr[0]) != 0)
printf("Couldn't remove breakpoint at %lx\n", printf("Couldn't remove breakpoint at %lx\n",
...@@ -2847,7 +2848,7 @@ generic_inst_dump(unsigned long adr, long count, int praddr, ...@@ -2847,7 +2848,7 @@ generic_inst_dump(unsigned long adr, long count, int praddr,
{ {
int nr, dotted; int nr, dotted;
unsigned long first_adr; unsigned long first_adr;
unsigned int inst, last_inst = 0; unsigned int inst, last_inst = ppc_inst(0);
unsigned char val[4]; unsigned char val[4];
dotted = 0; dotted = 0;
...@@ -2860,7 +2861,7 @@ generic_inst_dump(unsigned long adr, long count, int praddr, ...@@ -2860,7 +2861,7 @@ generic_inst_dump(unsigned long adr, long count, int praddr,
} }
break; break;
} }
inst = GETWORD(val); inst = ppc_inst(GETWORD(val));
if (adr > first_adr && inst == last_inst) { if (adr > first_adr && inst == last_inst) {
if (!dotted) { if (!dotted) {
printf(" ...\n"); printf(" ...\n");
......
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