Commit 799dd75b authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'i2c-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelvare/staging

* 'i2c-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelvare/staging:
  i2c: Add an interface to lock/unlock an I2C bus segment
  i2c-piix4: Modify code name SB900 to Hudson-2
parents 6bee5825 afa08974
...@@ -8,7 +8,7 @@ Supported adapters: ...@@ -8,7 +8,7 @@ Supported adapters:
Datasheet: Only available via NDA from ServerWorks Datasheet: Only available via NDA from ServerWorks
* ATI IXP200, IXP300, IXP400, SB600, SB700 and SB800 southbridges * ATI IXP200, IXP300, IXP400, SB600, SB700 and SB800 southbridges
Datasheet: Not publicly available Datasheet: Not publicly available
* AMD SB900 * AMD Hudson-2
Datasheet: Not publicly available Datasheet: Not publicly available
* Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge
Datasheet: Publicly available at the SMSC website http://www.smsc.com Datasheet: Publicly available at the SMSC website http://www.smsc.com
......
...@@ -128,7 +128,7 @@ config I2C_PIIX4 ...@@ -128,7 +128,7 @@ config I2C_PIIX4
ATI SB600 ATI SB600
ATI SB700 ATI SB700
ATI SB800 ATI SB800
AMD SB900 AMD Hudson-2
Serverworks OSB4 Serverworks OSB4
Serverworks CSB5 Serverworks CSB5
Serverworks CSB6 Serverworks CSB6
......
...@@ -22,7 +22,7 @@ ...@@ -22,7 +22,7 @@
Intel PIIX4, 440MX Intel PIIX4, 440MX
Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100 Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100
ATI IXP200, IXP300, IXP400, SB600, SB700, SB800 ATI IXP200, IXP300, IXP400, SB600, SB700, SB800
AMD SB900 AMD Hudson-2
SMSC Victory66 SMSC Victory66
Note: we assume there can only be one device, with one SMBus interface. Note: we assume there can only be one device, with one SMBus interface.
...@@ -233,9 +233,9 @@ static int __devinit piix4_setup_sb800(struct pci_dev *PIIX4_dev, ...@@ -233,9 +233,9 @@ static int __devinit piix4_setup_sb800(struct pci_dev *PIIX4_dev,
unsigned short smba_idx = 0xcd6; unsigned short smba_idx = 0xcd6;
u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en = 0x2c; u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en = 0x2c;
/* SB800 SMBus does not support forcing address */ /* SB800 and later SMBus does not support forcing address */
if (force || force_addr) { if (force || force_addr) {
dev_err(&PIIX4_dev->dev, "SB800 SMBus does not support " dev_err(&PIIX4_dev->dev, "SMBus does not support "
"forcing address!\n"); "forcing address!\n");
return -EINVAL; return -EINVAL;
} }
...@@ -480,7 +480,7 @@ static struct pci_device_id piix4_ids[] = { ...@@ -480,7 +480,7 @@ static struct pci_device_id piix4_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) }, { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) },
{ PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) }, { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) },
{ PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) }, { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_SB900_SMBUS) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) },
{ PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
PCI_DEVICE_ID_SERVERWORKS_OSB4) }, PCI_DEVICE_ID_SERVERWORKS_OSB4) },
{ PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
......
...@@ -188,7 +188,7 @@ static int sfn4111t_reset(struct efx_nic *efx) ...@@ -188,7 +188,7 @@ static int sfn4111t_reset(struct efx_nic *efx)
efx_oword_t reg; efx_oword_t reg;
/* GPIO 3 and the GPIO register are shared with I2C, so block that */ /* GPIO 3 and the GPIO register are shared with I2C, so block that */
mutex_lock(&efx->i2c_adap.bus_lock); i2c_lock_adapter(&efx->i2c_adap);
/* Pull RST_N (GPIO 2) low then let it up again, setting the /* Pull RST_N (GPIO 2) low then let it up again, setting the
* FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the
...@@ -204,7 +204,7 @@ static int sfn4111t_reset(struct efx_nic *efx) ...@@ -204,7 +204,7 @@ static int sfn4111t_reset(struct efx_nic *efx)
falcon_write(efx, &reg, GPIO_CTL_REG_KER); falcon_write(efx, &reg, GPIO_CTL_REG_KER);
msleep(1); msleep(1);
mutex_unlock(&efx->i2c_adap.bus_lock); i2c_unlock_adapter(&efx->i2c_adap);
ssleep(1); ssleep(1);
return 0; return 0;
......
...@@ -361,6 +361,24 @@ static inline void i2c_set_adapdata(struct i2c_adapter *dev, void *data) ...@@ -361,6 +361,24 @@ static inline void i2c_set_adapdata(struct i2c_adapter *dev, void *data)
dev_set_drvdata(&dev->dev, data); dev_set_drvdata(&dev->dev, data);
} }
/**
* i2c_lock_adapter - Prevent access to an I2C bus segment
* @adapter: Target I2C bus segment
*/
static inline void i2c_lock_adapter(struct i2c_adapter *adapter)
{
mutex_lock(&adapter->bus_lock);
}
/**
* i2c_unlock_adapter - Reauthorize access to an I2C bus segment
* @adapter: Target I2C bus segment
*/
static inline void i2c_unlock_adapter(struct i2c_adapter *adapter)
{
mutex_unlock(&adapter->bus_lock);
}
/*flags for the client struct: */ /*flags for the client struct: */
#define I2C_CLIENT_PEC 0x04 /* Use Packet Error Checking */ #define I2C_CLIENT_PEC 0x04 /* Use Packet Error Checking */
#define I2C_CLIENT_TEN 0x10 /* we have a ten bit chip address */ #define I2C_CLIENT_TEN 0x10 /* we have a ten bit chip address */
......
...@@ -543,7 +543,7 @@ ...@@ -543,7 +543,7 @@
#define PCI_DEVICE_ID_AMD_8131_BRIDGE 0x7450 #define PCI_DEVICE_ID_AMD_8131_BRIDGE 0x7450
#define PCI_DEVICE_ID_AMD_8131_APIC 0x7451 #define PCI_DEVICE_ID_AMD_8131_APIC 0x7451
#define PCI_DEVICE_ID_AMD_8132_BRIDGE 0x7458 #define PCI_DEVICE_ID_AMD_8132_BRIDGE 0x7458
#define PCI_DEVICE_ID_AMD_SB900_SMBUS 0x780b #define PCI_DEVICE_ID_AMD_HUDSON2_SMBUS 0x780b
#define PCI_DEVICE_ID_AMD_CS5535_IDE 0x208F #define PCI_DEVICE_ID_AMD_CS5535_IDE 0x208F
#define PCI_DEVICE_ID_AMD_CS5536_ISA 0x2090 #define PCI_DEVICE_ID_AMD_CS5536_ISA 0x2090
#define PCI_DEVICE_ID_AMD_CS5536_FLASH 0x2091 #define PCI_DEVICE_ID_AMD_CS5536_FLASH 0x2091
......
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