Commit 7dccd2ec authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'reset-for-4.8-3' of git://git.pengutronix.de/git/pza/linux into next/drivers

Merge "Reset controller changes for v4.8, part 3" from Philipp Zabel:

- change request API to be more explicit about the difference between
  exclusive and shared resets (the former guarantee the reset line is
  asserted immediately when reset_control_assert is called, the latter
  are refcounted and do not guarantee this).
- add Hisilicon hi6220 media subsystem reset controller support
- add TI SYSCON based reset controller support

* tag 'reset-for-4.8-3' of git://git.pengutronix.de/git/pza/linux:
  reset: add TI SYSCON based reset driver
  Documentation: dt: reset: Add TI syscon reset binding
  reset: hisilicon: Add hi6220 media subsystem reset support
  reset: hisilicon: Change to syscon register access
  arm64: dts: hi6220: Add media subsystem reset dts
  reset: hisilicon: Add media reset controller binding
  reset: TRIVIAL: Add line break at same place for similar APIs
  reset: Supply *_shared variant calls when using *_optional APIs
  reset: Supply *_shared variant calls when using of_* API
  reset: Ensure drivers are explicit when requesting reset lines
  reset: Reorder inline reset_control_get*() wrappers
parents 358c7917 af3e1629
...@@ -8,7 +8,9 @@ The reset controller registers are part of the system-ctl block on ...@@ -8,7 +8,9 @@ The reset controller registers are part of the system-ctl block on
hi6220 SoC. hi6220 SoC.
Required properties: Required properties:
- compatible: may be "hisilicon,hi6220-sysctrl" - compatible: should be one of the following:
- "hisilicon,hi6220-sysctrl", "syscon" : For peripheral reset controller.
- "hisilicon,hi6220-mediactrl", "syscon" : For media reset controller.
- reg: should be register base and length as documented in the - reg: should be register base and length as documented in the
datasheet datasheet
- #reset-cells: 1, see below - #reset-cells: 1, see below
......
TI SysCon Reset Controller
=======================
Almost all SoCs have hardware modules that require reset control in addition
to clock and power control for their functionality. The reset control is
typically provided by means of memory-mapped I/O registers. These registers are
sometimes a part of a larger register space region implementing various
functionalities. This register range is best represented as a syscon node to
allow multiple entities to access their relevant registers in the common
register space.
A SysCon Reset Controller node defines a device that uses a syscon node
and provides reset management functionality for various hardware modules
present on the SoC.
SysCon Reset Controller Node
============================
Each of the reset provider/controller nodes should be a child of a syscon
node and have the following properties.
Required properties:
--------------------
- compatible : Should be,
"ti,k2e-pscrst"
"ti,k2l-pscrst"
"ti,k2hk-pscrst"
"ti,syscon-reset"
- #reset-cells : Should be 1. Please see the reset consumer node below
for usage details
- ti,reset-bits : Contains the reset control register information
Should contain 7 cells for each reset exposed to
consumers, defined as:
Cell #1 : offset of the reset assert control
register from the syscon register base
Cell #2 : bit position of the reset in the reset
assert control register
Cell #3 : offset of the reset deassert control
register from the syscon register base
Cell #4 : bit position of the reset in the reset
deassert control register
Cell #5 : offset of the reset status register
from the syscon register base
Cell #6 : bit position of the reset in the
reset status register
Cell #7 : Flags used to control reset behavior,
availible flags defined in the DT include
file <dt-bindings/reset/ti-syscon.h>
SysCon Reset Consumer Nodes
===========================
Each of the reset consumer nodes should have the following properties,
in addition to their own properties.
Required properties:
--------------------
- resets : A phandle to the reset controller node and an index number
to a reset specifier as defined above.
Please also refer to Documentation/devicetree/bindings/reset/reset.txt for
common reset controller usage by consumers.
Example:
--------
The following example demonstrates a syscon node, the reset controller node
using the syscon node, and a consumer (a DSP device) on the TI Keystone 2
Edison SoC.
/ {
soc {
psc: power-sleep-controller@02350000 {
compatible = "syscon", "simple-mfd";
reg = <0x02350000 0x1000>;
pscrst: psc-reset {
compatible = "ti,k2e-pscrst", "ti,syscon-reset";
#reset-cells = <1>;
ti,reset-bits = <
0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_SET|DEASSERT_CLEAR|STATUS_SET) /* 0: pcrst-dsp0 */
0xa40 5 0xa44 3 0 0 (ASSERT_SET|DEASSERT_CLEAR|STATUS_NONE) /* 1: pcrst-example */
>;
};
};
dsp0: dsp0 {
...
resets = <&pscrst 0>;
...
};
};
};
...@@ -5,6 +5,7 @@ ...@@ -5,6 +5,7 @@
*/ */
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/hisi,hi6220-resets.h>
#include <dt-bindings/clock/hi6220-clock.h> #include <dt-bindings/clock/hi6220-clock.h>
#include <dt-bindings/pinctrl/hisi.h> #include <dt-bindings/pinctrl/hisi.h>
#include <dt-bindings/thermal/thermal.h> #include <dt-bindings/thermal/thermal.h>
...@@ -252,6 +253,7 @@ media_ctrl: media_ctrl@f4410000 { ...@@ -252,6 +253,7 @@ media_ctrl: media_ctrl@f4410000 {
compatible = "hisilicon,hi6220-mediactrl", "syscon"; compatible = "hisilicon,hi6220-mediactrl", "syscon";
reg = <0x0 0xf4410000 0x0 0x1000>; reg = <0x0 0xf4410000 0x0 0x1000>;
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>;
}; };
pm_ctrl: pm_ctrl@f7032000 { pm_ctrl: pm_ctrl@f7032000 {
......
...@@ -17,6 +17,16 @@ if RESET_CONTROLLER ...@@ -17,6 +17,16 @@ if RESET_CONTROLLER
config RESET_OXNAS config RESET_OXNAS
bool bool
config TI_SYSCON_RESET
tristate "TI SYSCON Reset Driver"
depends on HAS_IOMEM
select MFD_SYSCON
help
This enables the reset driver support for TI devices with
memory-mapped reset registers as part of a syscon device node. If
you wish to use the reset framework for such memory-mapped devices,
say Y here. Otherwise, say N.
source "drivers/reset/sti/Kconfig" source "drivers/reset/sti/Kconfig"
source "drivers/reset/hisilicon/Kconfig" source "drivers/reset/hisilicon/Kconfig"
......
...@@ -10,3 +10,4 @@ obj-$(CONFIG_ARCH_HISI) += hisilicon/ ...@@ -10,3 +10,4 @@ obj-$(CONFIG_ARCH_HISI) += hisilicon/
obj-$(CONFIG_ARCH_ZYNQ) += reset-zynq.o obj-$(CONFIG_ARCH_ZYNQ) += reset-zynq.o
obj-$(CONFIG_ATH79) += reset-ath79.o obj-$(CONFIG_ATH79) += reset-ath79.o
obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
obj-$(CONFIG_TI_SYSCON_RESET) += reset-ti-syscon.o
/* /*
* Hisilicon Hi6220 reset controller driver * Hisilicon Hi6220 reset controller driver
* *
* Copyright (c) 2015 Hisilicon Limited. * Copyright (c) 2016 Linaro Limited.
* Copyright (c) 2015-2016 Hisilicon Limited.
* *
* Author: Feng Chen <puck.chen@hisilicon.com> * Author: Feng Chen <puck.chen@hisilicon.com>
* *
...@@ -15,81 +16,130 @@ ...@@ -15,81 +16,130 @@
#include <linux/module.h> #include <linux/module.h>
#include <linux/bitops.h> #include <linux/bitops.h>
#include <linux/of.h> #include <linux/of.h>
#include <linux/of_device.h>
#include <linux/regmap.h>
#include <linux/mfd/syscon.h>
#include <linux/reset-controller.h> #include <linux/reset-controller.h>
#include <linux/reset.h> #include <linux/reset.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#define ASSERT_OFFSET 0x300 #define PERIPH_ASSERT_OFFSET 0x300
#define DEASSERT_OFFSET 0x304 #define PERIPH_DEASSERT_OFFSET 0x304
#define MAX_INDEX 0x509 #define PERIPH_MAX_INDEX 0x509
#define SC_MEDIA_RSTEN 0x052C
#define SC_MEDIA_RSTDIS 0x0530
#define MEDIA_MAX_INDEX 8
#define to_reset_data(x) container_of(x, struct hi6220_reset_data, rc_dev) #define to_reset_data(x) container_of(x, struct hi6220_reset_data, rc_dev)
enum hi6220_reset_ctrl_type {
PERIPHERAL,
MEDIA,
};
struct hi6220_reset_data { struct hi6220_reset_data {
void __iomem *assert_base;
void __iomem *deassert_base;
struct reset_controller_dev rc_dev; struct reset_controller_dev rc_dev;
struct regmap *regmap;
}; };
static int hi6220_reset_assert(struct reset_controller_dev *rc_dev, static int hi6220_peripheral_assert(struct reset_controller_dev *rc_dev,
unsigned long idx) unsigned long idx)
{ {
struct hi6220_reset_data *data = to_reset_data(rc_dev); struct hi6220_reset_data *data = to_reset_data(rc_dev);
struct regmap *regmap = data->regmap;
u32 bank = idx >> 8;
u32 offset = idx & 0xff;
u32 reg = PERIPH_ASSERT_OFFSET + bank * 0x10;
int bank = idx >> 8; return regmap_write(regmap, reg, BIT(offset));
int offset = idx & 0xff; }
writel(BIT(offset), data->assert_base + (bank * 0x10)); static int hi6220_peripheral_deassert(struct reset_controller_dev *rc_dev,
unsigned long idx)
{
struct hi6220_reset_data *data = to_reset_data(rc_dev);
struct regmap *regmap = data->regmap;
u32 bank = idx >> 8;
u32 offset = idx & 0xff;
u32 reg = PERIPH_DEASSERT_OFFSET + bank * 0x10;
return 0; return regmap_write(regmap, reg, BIT(offset));
} }
static int hi6220_reset_deassert(struct reset_controller_dev *rc_dev, static const struct reset_control_ops hi6220_peripheral_reset_ops = {
.assert = hi6220_peripheral_assert,
.deassert = hi6220_peripheral_deassert,
};
static int hi6220_media_assert(struct reset_controller_dev *rc_dev,
unsigned long idx) unsigned long idx)
{ {
struct hi6220_reset_data *data = to_reset_data(rc_dev); struct hi6220_reset_data *data = to_reset_data(rc_dev);
struct regmap *regmap = data->regmap;
int bank = idx >> 8; return regmap_write(regmap, SC_MEDIA_RSTEN, BIT(idx));
int offset = idx & 0xff; }
writel(BIT(offset), data->deassert_base + (bank * 0x10)); static int hi6220_media_deassert(struct reset_controller_dev *rc_dev,
unsigned long idx)
{
struct hi6220_reset_data *data = to_reset_data(rc_dev);
struct regmap *regmap = data->regmap;
return 0; return regmap_write(regmap, SC_MEDIA_RSTDIS, BIT(idx));
} }
static const struct reset_control_ops hi6220_reset_ops = { static const struct reset_control_ops hi6220_media_reset_ops = {
.assert = hi6220_reset_assert, .assert = hi6220_media_assert,
.deassert = hi6220_reset_deassert, .deassert = hi6220_media_deassert,
}; };
static int hi6220_reset_probe(struct platform_device *pdev) static int hi6220_reset_probe(struct platform_device *pdev)
{ {
struct device_node *np = pdev->dev.of_node;
struct device *dev = &pdev->dev;
enum hi6220_reset_ctrl_type type;
struct hi6220_reset_data *data; struct hi6220_reset_data *data;
struct resource *res; struct regmap *regmap;
void __iomem *src_base;
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data) if (!data)
return -ENOMEM; return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0); type = (enum hi6220_reset_ctrl_type)of_device_get_match_data(dev);
src_base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(src_base)) regmap = syscon_node_to_regmap(np);
return PTR_ERR(src_base); if (IS_ERR(regmap)) {
dev_err(dev, "failed to get reset controller regmap\n");
return PTR_ERR(regmap);
}
data->assert_base = src_base + ASSERT_OFFSET; data->regmap = regmap;
data->deassert_base = src_base + DEASSERT_OFFSET; data->rc_dev.of_node = np;
data->rc_dev.nr_resets = MAX_INDEX; if (type == MEDIA) {
data->rc_dev.ops = &hi6220_reset_ops; data->rc_dev.ops = &hi6220_media_reset_ops;
data->rc_dev.of_node = pdev->dev.of_node; data->rc_dev.nr_resets = MEDIA_MAX_INDEX;
} else {
data->rc_dev.ops = &hi6220_peripheral_reset_ops;
data->rc_dev.nr_resets = PERIPH_MAX_INDEX;
}
return reset_controller_register(&data->rc_dev); return reset_controller_register(&data->rc_dev);
} }
static const struct of_device_id hi6220_reset_match[] = { static const struct of_device_id hi6220_reset_match[] = {
{ .compatible = "hisilicon,hi6220-sysctrl" }, {
{ }, .compatible = "hisilicon,hi6220-sysctrl",
.data = (void *)PERIPHERAL,
},
{
.compatible = "hisilicon,hi6220-mediactrl",
.data = (void *)MEDIA,
},
{ /* sentinel */ },
}; };
MODULE_DEVICE_TABLE(of, hi6220_reset_match);
static struct platform_driver hi6220_reset_driver = { static struct platform_driver hi6220_reset_driver = {
.probe = hi6220_reset_probe, .probe = hi6220_reset_probe,
......
/*
* TI SYSCON regmap reset driver
*
* Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
* Andrew F. Davis <afd@ti.com>
* Suman Anna <afd@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/reset-controller.h>
#include <dt-bindings/reset/ti-syscon.h>
/**
* struct ti_syscon_reset_control - reset control structure
* @assert_offset: reset assert control register offset from syscon base
* @assert_bit: reset assert bit in the reset assert control register
* @deassert_offset: reset deassert control register offset from syscon base
* @deassert_bit: reset deassert bit in the reset deassert control register
* @status_offset: reset status register offset from syscon base
* @status_bit: reset status bit in the reset status register
* @flags: reset flag indicating how the (de)assert and status are handled
*/
struct ti_syscon_reset_control {
unsigned int assert_offset;
unsigned int assert_bit;
unsigned int deassert_offset;
unsigned int deassert_bit;
unsigned int status_offset;
unsigned int status_bit;
u32 flags;
};
/**
* struct ti_syscon_reset_data - reset controller information structure
* @rcdev: reset controller entity
* @regmap: regmap handle containing the memory-mapped reset registers
* @controls: array of reset controls
* @nr_controls: number of controls in control array
*/
struct ti_syscon_reset_data {
struct reset_controller_dev rcdev;
struct regmap *regmap;
struct ti_syscon_reset_control *controls;
unsigned int nr_controls;
};
#define to_ti_syscon_reset_data(rcdev) \
container_of(rcdev, struct ti_syscon_reset_data, rcdev)
/**
* ti_syscon_reset_assert() - assert device reset
* @rcdev: reset controller entity
* @id: ID of the reset to be asserted
*
* This function implements the reset driver op to assert a device's reset.
* This asserts the reset in a manner prescribed by the reset flags.
*
* Return: 0 for successful request, else a corresponding error value
*/
static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev,
unsigned long id)
{
struct ti_syscon_reset_data *data = to_ti_syscon_reset_data(rcdev);
struct ti_syscon_reset_control *control;
unsigned int mask, value;
if (id >= data->nr_controls)
return -EINVAL;
control = &data->controls[id];
if (control->flags & ASSERT_NONE)
return -ENOTSUPP; /* assert not supported for this reset */
mask = BIT(control->assert_bit);
value = (control->flags & ASSERT_SET) ? mask : 0x0;
return regmap_update_bits(data->regmap, control->assert_offset, mask, value);
}
/**
* ti_syscon_reset_deassert() - deassert device reset
* @rcdev: reset controller entity
* @id: ID of reset to be deasserted
*
* This function implements the reset driver op to deassert a device's reset.
* This deasserts the reset in a manner prescribed by the reset flags.
*
* Return: 0 for successful request, else a corresponding error value
*/
static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev,
unsigned long id)
{
struct ti_syscon_reset_data *data = to_ti_syscon_reset_data(rcdev);
struct ti_syscon_reset_control *control;
unsigned int mask, value;
if (id >= data->nr_controls)
return -EINVAL;
control = &data->controls[id];
if (control->flags & DEASSERT_NONE)
return -ENOTSUPP; /* deassert not supported for this reset */
mask = BIT(control->deassert_bit);
value = (control->flags & DEASSERT_SET) ? mask : 0x0;
return regmap_update_bits(data->regmap, control->deassert_offset, mask, value);
}
/**
* ti_syscon_reset_status() - check device reset status
* @rcdev: reset controller entity
* @id: ID of the reset for which the status is being requested
*
* This function implements the reset driver op to return the status of a
* device's reset.
*
* Return: 0 if reset is deasserted, true if reset is asserted, else a
* corresponding error value
*/
static int ti_syscon_reset_status(struct reset_controller_dev *rcdev,
unsigned long id)
{
struct ti_syscon_reset_data *data = to_ti_syscon_reset_data(rcdev);
struct ti_syscon_reset_control *control;
unsigned int reset_state;
int ret;
if (id >= data->nr_controls)
return -EINVAL;
control = &data->controls[id];
if (control->flags & STATUS_NONE)
return -ENOTSUPP; /* status not supported for this reset */
ret = regmap_read(data->regmap, control->status_offset, &reset_state);
if (ret)
return ret;
return (reset_state & BIT(control->status_bit)) &&
(control->flags & STATUS_SET);
}
static struct reset_control_ops ti_syscon_reset_ops = {
.assert = ti_syscon_reset_assert,
.deassert = ti_syscon_reset_deassert,
.status = ti_syscon_reset_status,
};
static int ti_syscon_reset_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
struct ti_syscon_reset_data *data;
struct regmap *regmap;
const __be32 *list;
struct ti_syscon_reset_control *controls;
int size, nr_controls, i;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
regmap = syscon_node_to_regmap(np->parent);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
list = of_get_property(np, "ti,reset-bits", &size);
if (!list || (size / sizeof(*list)) % 7 != 0) {
dev_err(dev, "invalid DT reset description\n");
return -EINVAL;
}
nr_controls = (size / sizeof(*list)) / 7;
controls = devm_kzalloc(dev, nr_controls * sizeof(*controls), GFP_KERNEL);
if (!controls)
return -ENOMEM;
for (i = 0; i < nr_controls; i++) {
controls[i].assert_offset = be32_to_cpup(list++);
controls[i].assert_bit = be32_to_cpup(list++);
controls[i].deassert_offset = be32_to_cpup(list++);
controls[i].deassert_bit = be32_to_cpup(list++);
controls[i].status_offset = be32_to_cpup(list++);
controls[i].status_bit = be32_to_cpup(list++);
controls[i].flags = be32_to_cpup(list++);
}
data->rcdev.ops = &ti_syscon_reset_ops;
data->rcdev.owner = THIS_MODULE;
data->rcdev.of_node = np;
data->rcdev.nr_resets = nr_controls;
data->regmap = regmap;
data->controls = controls;
data->nr_controls = nr_controls;
platform_set_drvdata(pdev, data);
return devm_reset_controller_register(dev, &data->rcdev);
}
static const struct of_device_id ti_syscon_reset_of_match[] = {
{ .compatible = "ti,syscon-reset", },
{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, ti_syscon_reset_of_match);
static struct platform_driver ti_syscon_reset_driver = {
.probe = ti_syscon_reset_probe,
.driver = {
.name = "ti-syscon-reset",
.of_match_table = ti_syscon_reset_of_match,
},
};
module_platform_driver(ti_syscon_reset_driver);
MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
MODULE_AUTHOR("Suman Anna <s-anna@ti.com>");
MODULE_DESCRIPTION("TI SYSCON Regmap Reset Driver");
MODULE_LICENSE("GPL v2");
...@@ -64,4 +64,12 @@ ...@@ -64,4 +64,12 @@
#define PERIPH_RSDIST9_CARM_SOCDBG 0x507 #define PERIPH_RSDIST9_CARM_SOCDBG 0x507
#define PERIPH_RSDIST9_CARM_ETM 0x508 #define PERIPH_RSDIST9_CARM_ETM 0x508
#define MEDIA_G3D 0
#define MEDIA_CODEC_VPU 2
#define MEDIA_CODEC_JPEG 3
#define MEDIA_ISP 4
#define MEDIA_ADE 5
#define MEDIA_MMU 6
#define MEDIA_XG2RAM1 7
#endif /*_DT_BINDINGS_RESET_CONTROLLER_HI6220*/ #endif /*_DT_BINDINGS_RESET_CONTROLLER_HI6220*/
/*
* TI Syscon Reset definitions
*
* Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __DT_BINDINGS_RESET_TI_SYSCON_H__
#define __DT_BINDINGS_RESET_TI_SYSCON_H__
/*
* The reset does not support the feature and corresponding
* values are not valid
*/
#define ASSERT_NONE (1 << 0)
#define DEASSERT_NONE (1 << 1)
#define STATUS_NONE (1 << 2)
/* When set this function is activated by setting(vs clearing) this bit */
#define ASSERT_SET (1 << 3)
#define DEASSERT_SET (1 << 4)
#define STATUS_SET (1 << 5)
/* The following are the inverse of the above and are added for consistency */
#define ASSERT_CLEAR (0 << 3)
#define DEASSERT_CLEAR (0 << 4)
#define STATUS_CLEAR (0 << 5)
#endif
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