Commit 7e3c53a0 authored by Thierry Reding's avatar Thierry Reding

drm/tegra: gem: Rename paddr -> iova

The address can refer to either physical memory or IO virtual memory.
If referring to IO virtual memory, there will always be an associated
physical memory address. Rename this variable to "iova" to clarify in
all cases that this is the IO virtual memory, which in the absence of
an IOMMU is identical to the physical address.
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent aacdf198
...@@ -717,7 +717,7 @@ static void tegra_plane_atomic_update(struct drm_plane *plane, ...@@ -717,7 +717,7 @@ static void tegra_plane_atomic_update(struct drm_plane *plane,
for (i = 0; i < fb->format->num_planes; i++) { for (i = 0; i < fb->format->num_planes; i++) {
struct tegra_bo *bo = tegra_fb_get_plane(fb, i); struct tegra_bo *bo = tegra_fb_get_plane(fb, i);
window.base[i] = bo->paddr + fb->offsets[i]; window.base[i] = bo->iova + fb->offsets[i];
/* /*
* Tegra uses a shared stride for UV planes. Framebuffers are * Tegra uses a shared stride for UV planes. Framebuffers are
...@@ -869,11 +869,11 @@ static void tegra_cursor_atomic_update(struct drm_plane *plane, ...@@ -869,11 +869,11 @@ static void tegra_cursor_atomic_update(struct drm_plane *plane,
return; return;
} }
value |= (bo->paddr >> 10) & 0x3fffff; value |= (bo->iova >> 10) & 0x3fffff;
tegra_dc_writel(dc, value, DC_DISP_CURSOR_START_ADDR); tegra_dc_writel(dc, value, DC_DISP_CURSOR_START_ADDR);
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
value = (bo->paddr >> 32) & 0x3; value = (bo->iova >> 32) & 0x3;
tegra_dc_writel(dc, value, DC_DISP_CURSOR_START_ADDR_HI); tegra_dc_writel(dc, value, DC_DISP_CURSOR_START_ADDR_HI);
#endif #endif
......
...@@ -269,10 +269,10 @@ static int tegra_fbdev_probe(struct drm_fb_helper *helper, ...@@ -269,10 +269,10 @@ static int tegra_fbdev_probe(struct drm_fb_helper *helper,
} }
} }
drm->mode_config.fb_base = (resource_size_t)bo->paddr; drm->mode_config.fb_base = (resource_size_t)bo->iova;
info->screen_base = (void __iomem *)bo->vaddr + offset; info->screen_base = (void __iomem *)bo->vaddr + offset;
info->screen_size = size; info->screen_size = size;
info->fix.smem_start = (unsigned long)(bo->paddr + offset); info->fix.smem_start = (unsigned long)(bo->iova + offset);
info->fix.smem_len = size; info->fix.smem_len = size;
return 0; return 0;
......
...@@ -33,7 +33,7 @@ static dma_addr_t tegra_bo_pin(struct host1x_bo *bo, struct sg_table **sgt) ...@@ -33,7 +33,7 @@ static dma_addr_t tegra_bo_pin(struct host1x_bo *bo, struct sg_table **sgt)
*sgt = obj->sgt; *sgt = obj->sgt;
return obj->paddr; return obj->iova;
} }
static void tegra_bo_unpin(struct host1x_bo *bo, struct sg_table *sgt) static void tegra_bo_unpin(struct host1x_bo *bo, struct sg_table *sgt)
...@@ -133,9 +133,9 @@ static int tegra_bo_iommu_map(struct tegra_drm *tegra, struct tegra_bo *bo) ...@@ -133,9 +133,9 @@ static int tegra_bo_iommu_map(struct tegra_drm *tegra, struct tegra_bo *bo)
goto unlock; goto unlock;
} }
bo->paddr = bo->mm->start; bo->iova = bo->mm->start;
bo->size = iommu_map_sg(tegra->domain, bo->paddr, bo->sgt->sgl, bo->size = iommu_map_sg(tegra->domain, bo->iova, bo->sgt->sgl,
bo->sgt->nents, prot); bo->sgt->nents, prot);
if (!bo->size) { if (!bo->size) {
dev_err(tegra->drm->dev, "failed to map buffer\n"); dev_err(tegra->drm->dev, "failed to map buffer\n");
...@@ -161,7 +161,7 @@ static int tegra_bo_iommu_unmap(struct tegra_drm *tegra, struct tegra_bo *bo) ...@@ -161,7 +161,7 @@ static int tegra_bo_iommu_unmap(struct tegra_drm *tegra, struct tegra_bo *bo)
return 0; return 0;
mutex_lock(&tegra->mm_lock); mutex_lock(&tegra->mm_lock);
iommu_unmap(tegra->domain, bo->paddr, bo->size); iommu_unmap(tegra->domain, bo->iova, bo->size);
drm_mm_remove_node(bo->mm); drm_mm_remove_node(bo->mm);
mutex_unlock(&tegra->mm_lock); mutex_unlock(&tegra->mm_lock);
...@@ -209,7 +209,7 @@ static void tegra_bo_free(struct drm_device *drm, struct tegra_bo *bo) ...@@ -209,7 +209,7 @@ static void tegra_bo_free(struct drm_device *drm, struct tegra_bo *bo)
sg_free_table(bo->sgt); sg_free_table(bo->sgt);
kfree(bo->sgt); kfree(bo->sgt);
} else if (bo->vaddr) { } else if (bo->vaddr) {
dma_free_wc(drm->dev, bo->gem.size, bo->vaddr, bo->paddr); dma_free_wc(drm->dev, bo->gem.size, bo->vaddr, bo->iova);
} }
} }
...@@ -264,7 +264,7 @@ static int tegra_bo_alloc(struct drm_device *drm, struct tegra_bo *bo) ...@@ -264,7 +264,7 @@ static int tegra_bo_alloc(struct drm_device *drm, struct tegra_bo *bo)
} else { } else {
size_t size = bo->gem.size; size_t size = bo->gem.size;
bo->vaddr = dma_alloc_wc(drm->dev, size, &bo->paddr, bo->vaddr = dma_alloc_wc(drm->dev, size, &bo->iova,
GFP_KERNEL | __GFP_NOWARN); GFP_KERNEL | __GFP_NOWARN);
if (!bo->vaddr) { if (!bo->vaddr) {
dev_err(drm->dev, dev_err(drm->dev,
...@@ -365,7 +365,7 @@ static struct tegra_bo *tegra_bo_import(struct drm_device *drm, ...@@ -365,7 +365,7 @@ static struct tegra_bo *tegra_bo_import(struct drm_device *drm,
goto detach; goto detach;
} }
bo->paddr = sg_dma_address(bo->sgt->sgl); bo->iova = sg_dma_address(bo->sgt->sgl);
} }
bo->gem.import_attach = attach; bo->gem.import_attach = attach;
...@@ -461,7 +461,7 @@ int __tegra_gem_mmap(struct drm_gem_object *gem, struct vm_area_struct *vma) ...@@ -461,7 +461,7 @@ int __tegra_gem_mmap(struct drm_gem_object *gem, struct vm_area_struct *vma)
vma->vm_flags &= ~VM_PFNMAP; vma->vm_flags &= ~VM_PFNMAP;
vma->vm_pgoff = 0; vma->vm_pgoff = 0;
err = dma_mmap_wc(gem->dev->dev, vma, bo->vaddr, bo->paddr, err = dma_mmap_wc(gem->dev->dev, vma, bo->vaddr, bo->iova,
gem->size); gem->size);
if (err < 0) { if (err < 0) {
drm_gem_vm_close(vma); drm_gem_vm_close(vma);
...@@ -523,7 +523,7 @@ tegra_gem_prime_map_dma_buf(struct dma_buf_attachment *attach, ...@@ -523,7 +523,7 @@ tegra_gem_prime_map_dma_buf(struct dma_buf_attachment *attach,
if (sg_alloc_table(sgt, 1, GFP_KERNEL)) if (sg_alloc_table(sgt, 1, GFP_KERNEL))
goto free; goto free;
sg_dma_address(sgt->sgl) = bo->paddr; sg_dma_address(sgt->sgl) = bo->iova;
sg_dma_len(sgt->sgl) = gem->size; sg_dma_len(sgt->sgl) = gem->size;
} }
......
...@@ -31,7 +31,7 @@ struct tegra_bo { ...@@ -31,7 +31,7 @@ struct tegra_bo {
struct host1x_bo base; struct host1x_bo base;
unsigned long flags; unsigned long flags;
struct sg_table *sgt; struct sg_table *sgt;
dma_addr_t paddr; dma_addr_t iova;
void *vaddr; void *vaddr;
struct drm_mm_node *mm; struct drm_mm_node *mm;
......
...@@ -457,7 +457,7 @@ static void tegra_shared_plane_atomic_update(struct drm_plane *plane, ...@@ -457,7 +457,7 @@ static void tegra_shared_plane_atomic_update(struct drm_plane *plane,
tegra_plane_writel(p, 0, DC_WINBUF_CDE_CONTROL); tegra_plane_writel(p, 0, DC_WINBUF_CDE_CONTROL);
bo = tegra_fb_get_plane(fb, 0); bo = tegra_fb_get_plane(fb, 0);
base = bo->paddr; base = bo->iova;
tegra_plane_writel(p, state->format, DC_WIN_COLOR_DEPTH); tegra_plane_writel(p, state->format, DC_WIN_COLOR_DEPTH);
tegra_plane_writel(p, 0, DC_WIN_PRECOMP_WGRP_PARAMS); tegra_plane_writel(p, 0, DC_WIN_PRECOMP_WGRP_PARAMS);
......
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