Commit 7fb72a1f authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher

drm/amd/powerplay: export interface to DAL to init/change display configuration.

Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarDavid Rokhvarg <David.Rokhvarg@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarJammy Zhou <Jammy.Zhou@amd.com>
parent aceae1bf
......@@ -1639,6 +1639,7 @@ struct amdgpu_pm {
const struct amdgpu_dpm_funcs *funcs;
uint32_t pcie_gen_mask;
uint32_t pcie_mlw_mask;
struct amd_pp_display_configuration pm_display_cfg;/* set by DAL */
};
void amdgpu_get_pcie_info(struct amdgpu_device *adev);
......
......@@ -603,3 +603,19 @@ int amd_powerplay_fini(void *handle)
return 0;
}
/* export this function to DAL */
int amd_powerplay_display_configuration_change(void *handle, const void *input)
{
struct pp_hwmgr *hwmgr;
const struct amd_pp_display_configuration *display_config = input;
if (handle == NULL)
return -EINVAL;
hwmgr = ((struct pp_instance *)handle)->hwmgr;
phm_store_dal_configuration_data(hwmgr, display_config);
return 0;
}
......@@ -26,6 +26,7 @@
#include "power_state.h"
#include "pp_acpi.h"
#include "amd_acpi.h"
#include "amd_powerplay.h"
void phm_init_dynamic_caps(struct pp_hwmgr *hwmgr)
{
......@@ -244,3 +245,18 @@ int phm_check_states_equal(struct pp_hwmgr *hwmgr,
return hwmgr->hwmgr_func->check_states_equal(hwmgr, pstate1, pstate2, equal);
}
int phm_store_dal_configuration_data(struct pp_hwmgr *hwmgr,
const struct amd_pp_display_configuration *display_config)
{
if (hwmgr == NULL || hwmgr->hwmgr_func->store_cc6_data == NULL)
return -EINVAL;
/* to do pass other display configuration in furture */
return hwmgr->hwmgr_func->store_cc6_data(hwmgr,
display_config->cpu_pstate_separation_time,
display_config->cpu_cc6_disable,
display_config->cpu_pstate_disable,
display_config->nb_pstate_switch_disable);
}
......@@ -131,6 +131,13 @@ struct amd_pp_init {
uint32_t rev_id;
};
struct amd_pp_display_configuration {
bool nb_pstate_switch_disable;/* controls NB PState switch */
bool cpu_cc6_disable; /* controls CPU CState switch ( on or off) */
bool cpu_pstate_disable;
uint32_t cpu_pstate_separation_time;
};
enum {
PP_GROUP_UNKNOWN = 0,
PP_GROUP_GFX = 1,
......@@ -203,4 +210,6 @@ int amd_powerplay_init(struct amd_pp_init *pp_init,
struct amd_powerplay *amd_pp);
int amd_powerplay_fini(void *handle);
int amd_powerplay_display_configuration_change(void *handle, const void *input);
#endif /* _AMD_POWERPLAY_H_ */
......@@ -353,5 +353,8 @@ extern int phm_check_states_equal(struct pp_hwmgr *hwmgr,
const struct pp_hw_power_state *pstate2,
bool *equal);
extern int phm_store_dal_configuration_data(struct pp_hwmgr *hwmgr,
const struct amd_pp_display_configuration *display_config);
#endif /* _HARDWARE_MANAGER_H_ */
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment