Commit 840fa4a0 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'zynq-dt-for-4.14' of https://github.com/Xilinx/linux-xlnx into next/dt

Pull "arm: Xilinx Zynq DT fixes for v4.14" from Michal Simek:

- Remove earlycon
- Use C pre-processor
- Add fpga full region
- Add ethernet-phy as device-type
- Add adv7511 nodes to zc70x

* tag 'zynq-dt-for-4.14' of https://github.com/Xilinx/linux-xlnx:
  arm: zynq: Remove earlycon from bootargs
  arm: zynq: Use C pre-processor for includes in dts
  arm: zynq: Label whole PL part as fpga_full region
  arm: zynq: Add device-type property for zynq ethernet phy nodes
  arm: zynq: Add adv7511 on i2c bus for zc70x
parents a435adbe 21ad06cc
...@@ -42,6 +42,14 @@ cpu1: cpu@1 { ...@@ -42,6 +42,14 @@ cpu1: cpu@1 {
}; };
}; };
fpga_full: fpga-full {
compatible = "fpga-region";
fpga-mgr = <&devcfg>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
};
pmu@f8891000 { pmu@f8891000 {
compatible = "arm,cortex-a9-pmu"; compatible = "arm,cortex-a9-pmu";
interrupts = <0 5 4>, <0 6 4>; interrupts = <0 5 4>, <0 6 4>;
......
...@@ -34,7 +34,7 @@ memory@0 { ...@@ -34,7 +34,7 @@ memory@0 {
}; };
chosen { chosen {
bootargs = "earlycon root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait"; bootargs = "root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait";
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
}; };
...@@ -54,6 +54,7 @@ ethernet_phy: ethernet-phy@0 { ...@@ -54,6 +54,7 @@ ethernet_phy: ethernet-phy@0 {
compatible = "ethernet-phy-id0141.0e90", compatible = "ethernet-phy-id0141.0e90",
"ethernet-phy-ieee802.3-c22"; "ethernet-phy-ieee802.3-c22";
reg = <0>; reg = <0>;
device_type = "ethernet-phy";
marvell,reg-init = <0x3 0x10 0xff00 0x1e>, marvell,reg-init = <0x3 0x10 0xff00 0x1e>,
<0x3 0x11 0xfff0 0xa>; <0x3 0x11 0xfff0 0xa>;
}; };
......
...@@ -12,7 +12,7 @@ ...@@ -12,7 +12,7 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
/dts-v1/; /dts-v1/;
/include/ "zynq-7000.dtsi" #include "zynq-7000.dtsi"
/ { / {
model = "Zynq ZC702 Development Board"; model = "Zynq ZC702 Development Board";
...@@ -30,7 +30,7 @@ memory@0 { ...@@ -30,7 +30,7 @@ memory@0 {
}; };
chosen { chosen {
bootargs = "earlycon"; bootargs = "";
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
...@@ -97,6 +97,7 @@ &gem0 { ...@@ -97,6 +97,7 @@ &gem0 {
ethernet_phy: ethernet-phy@7 { ethernet_phy: ethernet-phy@7 {
reg = <7>; reg = <7>;
device_type = "ethernet-phy";
}; };
}; };
...@@ -131,6 +132,21 @@ si570: clock-generator@5d { ...@@ -131,6 +132,21 @@ si570: clock-generator@5d {
}; };
}; };
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
adv7511: hdmi-tx@39 {
compatible = "adi,adv7511";
reg = <0x39>;
adi,input-depth = <8>;
adi,input-colorspace = "yuv422";
adi,input-clock = "1x";
adi,input-style = <3>;
adi,input-justification = "right";
};
};
i2c@2 { i2c@2 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
...@@ -12,7 +12,7 @@ ...@@ -12,7 +12,7 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
/dts-v1/; /dts-v1/;
/include/ "zynq-7000.dtsi" #include "zynq-7000.dtsi"
/ { / {
model = "Zynq ZC706 Development Board"; model = "Zynq ZC706 Development Board";
...@@ -30,7 +30,7 @@ memory@0 { ...@@ -30,7 +30,7 @@ memory@0 {
}; };
chosen { chosen {
bootargs = "earlycon"; bootargs = "";
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
...@@ -53,6 +53,7 @@ &gem0 { ...@@ -53,6 +53,7 @@ &gem0 {
ethernet_phy: ethernet-phy@7 { ethernet_phy: ethernet-phy@7 {
reg = <7>; reg = <7>;
device_type = "ethernet-phy";
}; };
}; };
...@@ -87,6 +88,21 @@ si570: clock-generator@5d { ...@@ -87,6 +88,21 @@ si570: clock-generator@5d {
}; };
}; };
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
adv7511: hdmi-tx@39 {
compatible = "adi,adv7511";
reg = <0x39>;
adi,input-depth = <8>;
adi,input-colorspace = "yuv422";
adi,input-clock = "1x";
adi,input-style = <3>;
adi,input-justification = "evenly";
};
};
i2c@2 { i2c@2 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
...@@ -12,7 +12,7 @@ ...@@ -12,7 +12,7 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
/dts-v1/; /dts-v1/;
/include/ "zynq-7000.dtsi" #include "zynq-7000.dtsi"
/ { / {
model = "Zynq Zed Development Board"; model = "Zynq Zed Development Board";
...@@ -29,7 +29,7 @@ memory@0 { ...@@ -29,7 +29,7 @@ memory@0 {
}; };
chosen { chosen {
bootargs = "earlycon"; bootargs = "";
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
...@@ -50,6 +50,7 @@ &gem0 { ...@@ -50,6 +50,7 @@ &gem0 {
ethernet_phy: ethernet-phy@0 { ethernet_phy: ethernet-phy@0 {
reg = <0>; reg = <0>;
device_type = "ethernet-phy";
}; };
}; };
......
...@@ -12,7 +12,7 @@ ...@@ -12,7 +12,7 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
/dts-v1/; /dts-v1/;
/include/ "zynq-7000.dtsi" #include "zynq-7000.dtsi"
/ { / {
model = "Zynq ZYBO Development Board"; model = "Zynq ZYBO Development Board";
...@@ -29,7 +29,7 @@ memory@0 { ...@@ -29,7 +29,7 @@ memory@0 {
}; };
chosen { chosen {
bootargs = "earlycon"; bootargs = "";
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
...@@ -51,6 +51,7 @@ &gem0 { ...@@ -51,6 +51,7 @@ &gem0 {
ethernet_phy: ethernet-phy@0 { ethernet_phy: ethernet-phy@0 {
reg = <0>; reg = <0>;
device_type = "ethernet-phy";
}; };
}; };
......
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