Commit 892b1e31 authored by James Hogan's avatar James Hogan Committed by Chris Ball

mmc: dw_mmc: brackets in register access macros

Add brackets around use of the dev argument to the
mci_{read,write}{w,l,q}() macros, for extra safety.
Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Acked-by: default avatarWill Newton <will.newton@imgtec.com>
Signed-off-by: default avatarChris Ball <cjb@laptop.org>
parent 1791b13e
...@@ -134,22 +134,22 @@ ...@@ -134,22 +134,22 @@
/* Register access macros */ /* Register access macros */
#define mci_readl(dev, reg) \ #define mci_readl(dev, reg) \
__raw_readl(dev->regs + SDMMC_##reg) __raw_readl((dev)->regs + SDMMC_##reg)
#define mci_writel(dev, reg, value) \ #define mci_writel(dev, reg, value) \
__raw_writel((value), dev->regs + SDMMC_##reg) __raw_writel((value), (dev)->regs + SDMMC_##reg)
/* 16-bit FIFO access macros */ /* 16-bit FIFO access macros */
#define mci_readw(dev, reg) \ #define mci_readw(dev, reg) \
__raw_readw(dev->regs + SDMMC_##reg) __raw_readw((dev)->regs + SDMMC_##reg)
#define mci_writew(dev, reg, value) \ #define mci_writew(dev, reg, value) \
__raw_writew((value), dev->regs + SDMMC_##reg) __raw_writew((value), (dev)->regs + SDMMC_##reg)
/* 64-bit FIFO access macros */ /* 64-bit FIFO access macros */
#ifdef readq #ifdef readq
#define mci_readq(dev, reg) \ #define mci_readq(dev, reg) \
__raw_readq(dev->regs + SDMMC_##reg) __raw_readq((dev)->regs + SDMMC_##reg)
#define mci_writeq(dev, reg, value) \ #define mci_writeq(dev, reg, value) \
__raw_writeq((value), dev->regs + SDMMC_##reg) __raw_writeq((value), (dev)->regs + SDMMC_##reg)
#else #else
/* /*
* Dummy readq implementation for architectures that don't define it. * Dummy readq implementation for architectures that don't define it.
...@@ -160,9 +160,9 @@ ...@@ -160,9 +160,9 @@
* rest of the code free from ifdefs. * rest of the code free from ifdefs.
*/ */
#define mci_readq(dev, reg) \ #define mci_readq(dev, reg) \
(*(volatile u64 __force *)(dev->regs + SDMMC_##reg)) (*(volatile u64 __force *)((dev)->regs + SDMMC_##reg))
#define mci_writeq(dev, reg, value) \ #define mci_writeq(dev, reg, value) \
(*(volatile u64 __force *)(dev->regs + SDMMC_##reg) = value) (*(volatile u64 __force *)((dev)->regs + SDMMC_##reg) = (value))
#endif #endif
#endif /* _DW_MMC_H_ */ #endif /* _DW_MMC_H_ */
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