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nexedi
linux
Commits
8aa6a07c
Commit
8aa6a07c
authored
Sep 22, 2002
by
David Mosberger
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ia64: Incorporate no-flush-needed optimization from Andrew's asm-generic/tlb.h.
parent
73d429f9
Changes
1
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1 changed file
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39 additions
and
18 deletions
+39
-18
include/asm-ia64/tlb.h
include/asm-ia64/tlb.h
+39
-18
No files found.
include/asm-ia64/tlb.h
View file @
8aa6a07c
...
@@ -54,7 +54,8 @@
...
@@ -54,7 +54,8 @@
typedef
struct
{
typedef
struct
{
struct
mm_struct
*
mm
;
struct
mm_struct
*
mm
;
unsigned
int
nr
;
/* == ~0U => fast mode */
unsigned
int
nr
;
/* == ~0U => fast mode */
unsigned
int
fullmm
;
/* non-zero means full mm flush */
unsigned
char
fullmm
;
/* non-zero means full mm flush */
unsigned
char
need_flush
;
/* really unmapped some PTEs? */
unsigned
long
freed
;
/* number of pages freed */
unsigned
long
freed
;
/* number of pages freed */
unsigned
long
start_addr
;
unsigned
long
start_addr
;
unsigned
long
end_addr
;
unsigned
long
end_addr
;
...
@@ -73,6 +74,10 @@ ia64_tlb_flush_mmu (mmu_gather_t *tlb, unsigned long start, unsigned long end)
...
@@ -73,6 +74,10 @@ ia64_tlb_flush_mmu (mmu_gather_t *tlb, unsigned long start, unsigned long end)
{
{
unsigned
int
nr
;
unsigned
int
nr
;
if
(
!
tlb
->
need_flush
)
return
;
tlb
->
need_flush
=
0
;
if
(
tlb
->
fullmm
)
{
if
(
tlb
->
fullmm
)
{
/*
/*
* Tearing down the entire address space. This happens both as a result
* Tearing down the entire address space. This happens both as a result
...
@@ -167,18 +172,6 @@ tlb_finish_mmu (mmu_gather_t *tlb, unsigned long start, unsigned long end)
...
@@ -167,18 +172,6 @@ tlb_finish_mmu (mmu_gather_t *tlb, unsigned long start, unsigned long end)
check_pgt_cache
();
check_pgt_cache
();
}
}
/*
* Remove TLB entry for PTE mapped at virtual address ADDRESS. This is called for any
* PTE, not just those pointing to (normal) physical memory.
*/
static
inline
void
__tlb_remove_tlb_entry
(
mmu_gather_t
*
tlb
,
pte_t
*
ptep
,
unsigned
long
address
)
{
if
(
tlb
->
start_addr
==
~
0UL
)
tlb
->
start_addr
=
address
;
tlb
->
end_addr
=
address
+
PAGE_SIZE
;
}
/*
/*
* Logically, this routine frees PAGE. On MP machines, the actual freeing of the page
* Logically, this routine frees PAGE. On MP machines, the actual freeing of the page
* must be delayed until after the TLB has been flushed (see comments at the beginning of
* must be delayed until after the TLB has been flushed (see comments at the beginning of
...
@@ -187,6 +180,8 @@ __tlb_remove_tlb_entry (mmu_gather_t *tlb, pte_t *ptep, unsigned long address)
...
@@ -187,6 +180,8 @@ __tlb_remove_tlb_entry (mmu_gather_t *tlb, pte_t *ptep, unsigned long address)
static
inline
void
static
inline
void
tlb_remove_page
(
mmu_gather_t
*
tlb
,
struct
page
*
page
)
tlb_remove_page
(
mmu_gather_t
*
tlb
,
struct
page
*
page
)
{
{
tlb
->
need_flush
=
1
;
if
(
tlb_fast_mode
(
tlb
))
{
if
(
tlb_fast_mode
(
tlb
))
{
free_page_and_swap_cache
(
page
);
free_page_and_swap_cache
(
page
);
return
;
return
;
...
@@ -196,11 +191,37 @@ tlb_remove_page (mmu_gather_t *tlb, struct page *page)
...
@@ -196,11 +191,37 @@ tlb_remove_page (mmu_gather_t *tlb, struct page *page)
ia64_tlb_flush_mmu
(
tlb
,
tlb
->
start_addr
,
tlb
->
end_addr
);
ia64_tlb_flush_mmu
(
tlb
,
tlb
->
start_addr
,
tlb
->
end_addr
);
}
}
/*
* Remove TLB entry for PTE mapped at virtual address ADDRESS. This is called for any
* PTE, not just those pointing to (normal) physical memory.
*/
static
inline
void
__tlb_remove_tlb_entry
(
mmu_gather_t
*
tlb
,
pte_t
*
ptep
,
unsigned
long
address
)
{
if
(
tlb
->
start_addr
==
~
0UL
)
tlb
->
start_addr
=
address
;
tlb
->
end_addr
=
address
+
PAGE_SIZE
;
}
#define tlb_start_vma(tlb, vma) do { } while (0)
#define tlb_start_vma(tlb, vma) do { } while (0)
#define tlb_end_vma(tlb, vma) do { } while (0)
#define tlb_end_vma(tlb, vma) do { } while (0)
#define tlb_remove_tlb_entry(tlb, ptep, addr) __tlb_remove_tlb_entry(tlb, ptep, addr)
#define tlb_remove_tlb_entry(tlb, ptep, addr) \
#define pte_free_tlb(tlb, ptep) __pte_free_tlb(tlb, ptep)
do { \
#define pmd_free_tlb(tlb, ptep) __pmd_free_tlb(tlb, ptep)
tlb->need_flush = 1; \
__tlb_remove_tlb_entry(tlb, ptep, addr); \
} while (0)
#define pte_free_tlb(tlb, ptep) \
do { \
tlb->need_flush = 1; \
__pte_free_tlb(tlb, ptep); \
} while (0)
#define pmd_free_tlb(tlb, ptep) \
do { \
tlb->need_flush = 1; \
__pmd_free_tlb(tlb, ptep); \
} while (0)
#endif
/* _ASM_IA64_TLB_H */
#endif
/* _ASM_IA64_TLB_H */
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