Commit 906c110f authored by Ivo van Doorn's avatar Ivo van Doorn Committed by John W. Linville

rt2x00: Implement HW encryption (rt73usb)

rt73usb supports hardware encryption.
rt73usb supports up to 4 shared keys and up to 64 pairwise keys.
Signed-off-by: default avatarIvo van Doorn <IvDoorn@gmail.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 61e754f4
...@@ -156,6 +156,7 @@ config RT73USB ...@@ -156,6 +156,7 @@ config RT73USB
depends on USB depends on USB
select RT2X00_LIB_USB select RT2X00_LIB_USB
select RT2X00_LIB_FIRMWARE select RT2X00_LIB_FIRMWARE
select RT2X00_LIB_CRYPTO
select CRC_ITU_T select CRC_ITU_T
---help--- ---help---
This adds support for rt2501 wireless chipset family. This adds support for rt2501 wireless chipset family.
......
This diff is collapsed.
...@@ -92,6 +92,16 @@ ...@@ -92,6 +92,16 @@
#define PAIRWISE_KEY_TABLE_BASE 0x1200 #define PAIRWISE_KEY_TABLE_BASE 0x1200
#define PAIRWISE_TA_TABLE_BASE 0x1a00 #define PAIRWISE_TA_TABLE_BASE 0x1a00
#define SHARED_KEY_ENTRY(__idx) \
( SHARED_KEY_TABLE_BASE + \
((__idx) * sizeof(struct hw_key_entry)) )
#define PAIRWISE_KEY_ENTRY(__idx) \
( PAIRWISE_KEY_TABLE_BASE + \
((__idx) * sizeof(struct hw_key_entry)) )
#define PAIRWISE_TA_ENTRY(__idx) \
( PAIRWISE_TA_TABLE_BASE + \
((__idx) * sizeof(struct hw_pairwise_ta_entry)) )
struct hw_key_entry { struct hw_key_entry {
u8 key[16]; u8 key[16];
u8 tx_mic[8]; u8 tx_mic[8];
...@@ -100,7 +110,8 @@ struct hw_key_entry { ...@@ -100,7 +110,8 @@ struct hw_key_entry {
struct hw_pairwise_ta_entry { struct hw_pairwise_ta_entry {
u8 address[6]; u8 address[6];
u8 reserved[2]; u8 cipher;
u8 reserved;
} __attribute__ ((packed)); } __attribute__ ((packed));
/* /*
...@@ -563,6 +574,10 @@ struct hw_pairwise_ta_entry { ...@@ -563,6 +574,10 @@ struct hw_pairwise_ta_entry {
* SEC_CSR4: Pairwise key table lookup control. * SEC_CSR4: Pairwise key table lookup control.
*/ */
#define SEC_CSR4 0x30b0 #define SEC_CSR4 0x30b0
#define SEC_CSR4_ENABLE_BSS0 FIELD32(0x00000001)
#define SEC_CSR4_ENABLE_BSS1 FIELD32(0x00000002)
#define SEC_CSR4_ENABLE_BSS2 FIELD32(0x00000004)
#define SEC_CSR4_ENABLE_BSS3 FIELD32(0x00000008)
/* /*
* SEC_CSR5: shared key table security mode register. * SEC_CSR5: shared key table security mode register.
...@@ -1010,8 +1025,10 @@ struct hw_pairwise_ta_entry { ...@@ -1010,8 +1025,10 @@ struct hw_pairwise_ta_entry {
/* /*
* Word4 * Word4
* ICV: Received ICV of originally encrypted.
* NOTE: This is a guess, the official definition is "reserved"
*/ */
#define RXD_W4_RESERVED FIELD32(0xffffffff) #define RXD_W4_ICV FIELD32(0xffffffff)
/* /*
* the above 20-byte is called RXINFO and will be DMAed to MAC RX block * the above 20-byte is called RXINFO and will be DMAed to MAC RX block
......
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