ide-pmac: don't check kauai_lookup_timing() return value

kauai_lookup_timing() should always return non-zero return value:

* BUG() in kauai_lookup_timing() if the timing info cannot be found.

* Remove code checking for zero return value from all callers.
Acked-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
parent 39e5f590
...@@ -392,6 +392,7 @@ kauai_lookup_timing(struct kauai_timing* table, int cycle_time) ...@@ -392,6 +392,7 @@ kauai_lookup_timing(struct kauai_timing* table, int cycle_time)
for (i=0; table[i].cycle_time; i++) for (i=0; table[i].cycle_time; i++)
if (cycle_time > table[i+1].cycle_time) if (cycle_time > table[i+1].cycle_time)
return table[i].timing_reg; return table[i].timing_reg;
BUG();
return 0; return 0;
} }
...@@ -637,8 +638,6 @@ pmac_ide_set_pio_mode(ide_drive_t *drive, const u8 pio) ...@@ -637,8 +638,6 @@ pmac_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
case controller_sh_ata6: { case controller_sh_ata6: {
/* 133Mhz cell */ /* 133Mhz cell */
u32 tr = kauai_lookup_timing(shasta_pio_timings, cycle_time); u32 tr = kauai_lookup_timing(shasta_pio_timings, cycle_time);
if (tr == 0)
return;
*timings = ((*timings) & ~TR_133_PIOREG_PIO_MASK) | tr; *timings = ((*timings) & ~TR_133_PIOREG_PIO_MASK) | tr;
break; break;
} }
...@@ -646,8 +645,6 @@ pmac_ide_set_pio_mode(ide_drive_t *drive, const u8 pio) ...@@ -646,8 +645,6 @@ pmac_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
case controller_k2_ata6: { case controller_k2_ata6: {
/* 100Mhz cell */ /* 100Mhz cell */
u32 tr = kauai_lookup_timing(kauai_pio_timings, cycle_time); u32 tr = kauai_lookup_timing(kauai_pio_timings, cycle_time);
if (tr == 0)
return;
*timings = ((*timings) & ~TR_100_PIOREG_PIO_MASK) | tr; *timings = ((*timings) & ~TR_100_PIOREG_PIO_MASK) | tr;
break; break;
} }
...@@ -746,8 +743,6 @@ set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed) ...@@ -746,8 +743,6 @@ set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed)
if (speed > XFER_UDMA_5 || t == NULL) if (speed > XFER_UDMA_5 || t == NULL)
return 1; return 1;
tr = kauai_lookup_timing(kauai_udma_timings, (int)t->udma); tr = kauai_lookup_timing(kauai_udma_timings, (int)t->udma);
if (tr == 0)
return 1;
*ultra_timings = ((*ultra_timings) & ~TR_100_UDMAREG_UDMA_MASK) | tr; *ultra_timings = ((*ultra_timings) & ~TR_100_UDMAREG_UDMA_MASK) | tr;
*ultra_timings = (*ultra_timings) | TR_100_UDMAREG_UDMA_EN; *ultra_timings = (*ultra_timings) | TR_100_UDMAREG_UDMA_EN;
...@@ -766,8 +761,6 @@ set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed) ...@@ -766,8 +761,6 @@ set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed)
if (speed > XFER_UDMA_6 || t == NULL) if (speed > XFER_UDMA_6 || t == NULL)
return 1; return 1;
tr = kauai_lookup_timing(shasta_udma133_timings, (int)t->udma); tr = kauai_lookup_timing(shasta_udma133_timings, (int)t->udma);
if (tr == 0)
return 1;
*ultra_timings = ((*ultra_timings) & ~TR_133_UDMAREG_UDMA_MASK) | tr; *ultra_timings = ((*ultra_timings) & ~TR_133_UDMAREG_UDMA_MASK) | tr;
*ultra_timings = (*ultra_timings) | TR_133_UDMAREG_UDMA_EN; *ultra_timings = (*ultra_timings) | TR_133_UDMAREG_UDMA_EN;
...@@ -839,8 +832,6 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2, ...@@ -839,8 +832,6 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
case controller_sh_ata6: { case controller_sh_ata6: {
/* 133Mhz cell */ /* 133Mhz cell */
u32 tr = kauai_lookup_timing(shasta_mdma_timings, cycleTime); u32 tr = kauai_lookup_timing(shasta_mdma_timings, cycleTime);
if (tr == 0)
return 1;
*timings = ((*timings) & ~TR_133_PIOREG_MDMA_MASK) | tr; *timings = ((*timings) & ~TR_133_PIOREG_MDMA_MASK) | tr;
*timings2 = (*timings2) & ~TR_133_UDMAREG_UDMA_EN; *timings2 = (*timings2) & ~TR_133_UDMAREG_UDMA_EN;
} }
...@@ -848,8 +839,6 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2, ...@@ -848,8 +839,6 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
case controller_k2_ata6: { case controller_k2_ata6: {
/* 100Mhz cell */ /* 100Mhz cell */
u32 tr = kauai_lookup_timing(kauai_mdma_timings, cycleTime); u32 tr = kauai_lookup_timing(kauai_mdma_timings, cycleTime);
if (tr == 0)
return 1;
*timings = ((*timings) & ~TR_100_PIOREG_MDMA_MASK) | tr; *timings = ((*timings) & ~TR_100_PIOREG_MDMA_MASK) | tr;
*timings2 = (*timings2) & ~TR_100_UDMAREG_UDMA_EN; *timings2 = (*timings2) & ~TR_100_UDMAREG_UDMA_EN;
} }
......
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