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Commit 90e48970 authored by Dave Airlie's avatar Dave Airlie
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Merge branch 'drm-fixes-3.15' of git://people.freedesktop.org/~deathsimple/linux into drm-next 

1. Fixing PLL regressions
2. A couple of memory reclocking and DPM fixes
3. Small cleanups

* 'drm-fixes-3.15' of git://people.freedesktop.org/~deathsimple/linux:
  drm/radeon/ci: make sure mc ucode is loaded before checking the size
  drm/radeon/si: make sure mc ucode is loaded before checking the size
  drm/radeon: improve PLL params if we don't match exactly v2
  drm/radeon: memory leak on bo reservation failure. v2
  drm/radeon: fix VCE fence command
  drm/radeon: re-enable mclk dpm on R7 260X asics
  drm/radeon: add support for newer mc ucode on CI (v2)
  drm/radeon: add support for newer mc ucode on SI (v2)
  drm/radeon: apply more strict limits for PLL params v2
  drm/radeon: update CI DPM powertune settings
  drm/radeon: fix runpm handling on APUs (v4)
  drm/radeon: disable mclk dpm on R7 260X
parents 95c7d351 bcddee29
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Showing with 115 additions and 78 deletions
drivers/gpu/drm/radeon/ci_dpm.c
View file @ 90e48970
...@@ -21,8 +21,10 @@ ...@@ -21,8 +21,10 @@
* *
*/ */
#include <linux/firmware.h>
#include "drmP.h" #include "drmP.h"
#include "radeon.h" #include "radeon.h"
#include "radeon_ucode.h"
#include "cikd.h" #include "cikd.h"
#include "r600_dpm.h" #include "r600_dpm.h"
#include "ci_dpm.h" #include "ci_dpm.h"
...@@ -202,24 +204,29 @@ static void ci_initialize_powertune_defaults(struct radeon_device *rdev) ...@@ -202,24 +204,29 @@ static void ci_initialize_powertune_defaults(struct radeon_device *rdev)
struct ci_power_info *pi = ci_get_pi(rdev); struct ci_power_info *pi = ci_get_pi(rdev);
switch (rdev->pdev->device) { switch (rdev->pdev->device) {
case 0x6649:
case 0x6650: case 0x6650:
case 0x6651:
case 0x6658: case 0x6658:
case 0x665C: case 0x665C:
case 0x665D:
default: default:
pi->powertune_defaults = &defaults_bonaire_xt; pi->powertune_defaults = &defaults_bonaire_xt;
break; break;
case 0x6651:
case 0x665D:
pi->powertune_defaults = &defaults_bonaire_pro;
break;
case 0x6640: case 0x6640:
pi->powertune_defaults = &defaults_saturn_xt;
break;
case 0x6641: case 0x6641:
pi->powertune_defaults = &defaults_saturn_pro; case 0x6646:
case 0x6647:
pi->powertune_defaults = &defaults_saturn_xt;
break; break;
case 0x67B8: case 0x67B8:
case 0x67B0: case 0x67B0:
pi->powertune_defaults = &defaults_hawaii_xt;
break;
case 0x67BA:
case 0x67B1:
pi->powertune_defaults = &defaults_hawaii_pro;
break;
case 0x67A0: case 0x67A0:
case 0x67A1: case 0x67A1:
case 0x67A2: case 0x67A2:
...@@ -228,11 +235,7 @@ static void ci_initialize_powertune_defaults(struct radeon_device *rdev) ...@@ -228,11 +235,7 @@ static void ci_initialize_powertune_defaults(struct radeon_device *rdev)
case 0x67AA: case 0x67AA:
case 0x67B9: case 0x67B9:
case 0x67BE: case 0x67BE:
pi->powertune_defaults = &defaults_hawaii_xt; pi->powertune_defaults = &defaults_bonaire_xt;
break;
case 0x67BA:
case 0x67B1:
pi->powertune_defaults = &defaults_hawaii_pro;
break; break;
} }
...@@ -5146,6 +5149,12 @@ int ci_dpm_init(struct radeon_device *rdev) ...@@ -5146,6 +5149,12 @@ int ci_dpm_init(struct radeon_device *rdev)
pi->mclk_dpm_key_disabled = 0; pi->mclk_dpm_key_disabled = 0;
pi->pcie_dpm_key_disabled = 0; pi->pcie_dpm_key_disabled = 0;
/* mclk dpm is unstable on some R7 260X cards with the old mc ucode */
if ((rdev->pdev->device == 0x6658) &&
(rdev->mc_fw->size == (BONAIRE_MC_UCODE_SIZE * 4))) {
pi->mclk_dpm_key_disabled = 1;
}
pi->caps_sclk_ds = true; pi->caps_sclk_ds = true;
pi->mclk_strobe_mode_threshold = 40000; pi->mclk_strobe_mode_threshold = 40000;
......
drivers/gpu/drm/radeon/cik.c
View file @ 90e48970
...@@ -38,6 +38,7 @@ MODULE_FIRMWARE("radeon/BONAIRE_me.bin"); ...@@ -38,6 +38,7 @@ MODULE_FIRMWARE("radeon/BONAIRE_me.bin");
MODULE_FIRMWARE("radeon/BONAIRE_ce.bin"); MODULE_FIRMWARE("radeon/BONAIRE_ce.bin");
MODULE_FIRMWARE("radeon/BONAIRE_mec.bin"); MODULE_FIRMWARE("radeon/BONAIRE_mec.bin");
MODULE_FIRMWARE("radeon/BONAIRE_mc.bin"); MODULE_FIRMWARE("radeon/BONAIRE_mc.bin");
MODULE_FIRMWARE("radeon/BONAIRE_mc2.bin");
MODULE_FIRMWARE("radeon/BONAIRE_rlc.bin"); MODULE_FIRMWARE("radeon/BONAIRE_rlc.bin");
MODULE_FIRMWARE("radeon/BONAIRE_sdma.bin"); MODULE_FIRMWARE("radeon/BONAIRE_sdma.bin");
MODULE_FIRMWARE("radeon/BONAIRE_smc.bin"); MODULE_FIRMWARE("radeon/BONAIRE_smc.bin");
...@@ -46,6 +47,7 @@ MODULE_FIRMWARE("radeon/HAWAII_me.bin"); ...@@ -46,6 +47,7 @@ MODULE_FIRMWARE("radeon/HAWAII_me.bin");
MODULE_FIRMWARE("radeon/HAWAII_ce.bin"); MODULE_FIRMWARE("radeon/HAWAII_ce.bin");
MODULE_FIRMWARE("radeon/HAWAII_mec.bin"); MODULE_FIRMWARE("radeon/HAWAII_mec.bin");
MODULE_FIRMWARE("radeon/HAWAII_mc.bin"); MODULE_FIRMWARE("radeon/HAWAII_mc.bin");
MODULE_FIRMWARE("radeon/HAWAII_mc2.bin");
MODULE_FIRMWARE("radeon/HAWAII_rlc.bin"); MODULE_FIRMWARE("radeon/HAWAII_rlc.bin");
MODULE_FIRMWARE("radeon/HAWAII_sdma.bin"); MODULE_FIRMWARE("radeon/HAWAII_sdma.bin");
MODULE_FIRMWARE("radeon/HAWAII_smc.bin"); MODULE_FIRMWARE("radeon/HAWAII_smc.bin");
...@@ -1703,20 +1705,20 @@ int ci_mc_load_microcode(struct radeon_device *rdev) ...@@ -1703,20 +1705,20 @@ int ci_mc_load_microcode(struct radeon_device *rdev)
const __be32 *fw_data; const __be32 *fw_data;
u32 running, blackout = 0; u32 running, blackout = 0;
u32 *io_mc_regs; u32 *io_mc_regs;
int i, ucode_size, regs_size; int i, regs_size, ucode_size;
if (!rdev->mc_fw) if (!rdev->mc_fw)
return -EINVAL; return -EINVAL;
ucode_size = rdev->mc_fw->size / 4;
switch (rdev->family) { switch (rdev->family) {
case CHIP_BONAIRE: case CHIP_BONAIRE:
io_mc_regs = (u32 *)&bonaire_io_mc_regs; io_mc_regs = (u32 *)&bonaire_io_mc_regs;
ucode_size = CIK_MC_UCODE_SIZE;
regs_size = BONAIRE_IO_MC_REGS_SIZE; regs_size = BONAIRE_IO_MC_REGS_SIZE;
break; break;
case CHIP_HAWAII: case CHIP_HAWAII:
io_mc_regs = (u32 *)&hawaii_io_mc_regs; io_mc_regs = (u32 *)&hawaii_io_mc_regs;
ucode_size = HAWAII_MC_UCODE_SIZE;
regs_size = HAWAII_IO_MC_REGS_SIZE; regs_size = HAWAII_IO_MC_REGS_SIZE;
break; break;
default: default:
...@@ -1783,7 +1785,7 @@ static int cik_init_microcode(struct radeon_device *rdev) ...@@ -1783,7 +1785,7 @@ static int cik_init_microcode(struct radeon_device *rdev)
const char *chip_name; const char *chip_name;
size_t pfp_req_size, me_req_size, ce_req_size, size_t pfp_req_size, me_req_size, ce_req_size,
mec_req_size, rlc_req_size, mc_req_size = 0, mec_req_size, rlc_req_size, mc_req_size = 0,
sdma_req_size, smc_req_size = 0; sdma_req_size, smc_req_size = 0, mc2_req_size = 0;
char fw_name[30]; char fw_name[30];
int err; int err;
...@@ -1797,7 +1799,8 @@ static int cik_init_microcode(struct radeon_device *rdev) ...@@ -1797,7 +1799,8 @@ static int cik_init_microcode(struct radeon_device *rdev)
ce_req_size = CIK_CE_UCODE_SIZE * 4; ce_req_size = CIK_CE_UCODE_SIZE * 4;
mec_req_size = CIK_MEC_UCODE_SIZE * 4; mec_req_size = CIK_MEC_UCODE_SIZE * 4;
rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4; rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4;
mc_req_size = CIK_MC_UCODE_SIZE * 4; mc_req_size = BONAIRE_MC_UCODE_SIZE * 4;
mc2_req_size = BONAIRE_MC2_UCODE_SIZE * 4;
sdma_req_size = CIK_SDMA_UCODE_SIZE * 4; sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
smc_req_size = ALIGN(BONAIRE_SMC_UCODE_SIZE, 4); smc_req_size = ALIGN(BONAIRE_SMC_UCODE_SIZE, 4);
break; break;
...@@ -1809,6 +1812,7 @@ static int cik_init_microcode(struct radeon_device *rdev) ...@@ -1809,6 +1812,7 @@ static int cik_init_microcode(struct radeon_device *rdev)
mec_req_size = CIK_MEC_UCODE_SIZE * 4; mec_req_size = CIK_MEC_UCODE_SIZE * 4;
rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4; rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4;
mc_req_size = HAWAII_MC_UCODE_SIZE * 4; mc_req_size = HAWAII_MC_UCODE_SIZE * 4;
mc2_req_size = HAWAII_MC2_UCODE_SIZE * 4;
sdma_req_size = CIK_SDMA_UCODE_SIZE * 4; sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
smc_req_size = ALIGN(HAWAII_SMC_UCODE_SIZE, 4); smc_req_size = ALIGN(HAWAII_SMC_UCODE_SIZE, 4);
break; break;
...@@ -1904,16 +1908,22 @@ static int cik_init_microcode(struct radeon_device *rdev) ...@@ -1904,16 +1908,22 @@ static int cik_init_microcode(struct radeon_device *rdev)
/* No SMC, MC ucode on APUs */ /* No SMC, MC ucode on APUs */
if (!(rdev->flags & RADEON_IS_IGP)) { if (!(rdev->flags & RADEON_IS_IGP)) {
snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc2.bin", chip_name);
err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
if (err) if (err) {
goto out; snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name);
if (rdev->mc_fw->size != mc_req_size) { err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
if (err)
goto out;
}
if ((rdev->mc_fw->size != mc_req_size) &&
(rdev->mc_fw->size != mc2_req_size)){
printk(KERN_ERR printk(KERN_ERR
"cik_mc: Bogus length %zu in firmware \"%s\"\n", "cik_mc: Bogus length %zu in firmware \"%s\"\n",
rdev->mc_fw->size, fw_name); rdev->mc_fw->size, fw_name);
err = -EINVAL; err = -EINVAL;
} }
DRM_INFO("%s: %zu bytes\n", fw_name, rdev->mc_fw->size);
snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name);
err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev);
......
drivers/gpu/drm/radeon/radeon.h
View file @ 90e48970
...@@ -2321,6 +2321,7 @@ struct radeon_device { ...@@ -2321,6 +2321,7 @@ struct radeon_device {
bool have_disp_power_ref; bool have_disp_power_ref;
}; };
bool radeon_is_px(struct drm_device *dev);
int radeon_device_init(struct radeon_device *rdev, int radeon_device_init(struct radeon_device *rdev,
struct drm_device *ddev, struct drm_device *ddev,
struct pci_dev *pdev, struct pci_dev *pdev,
......
drivers/gpu/drm/radeon/radeon_atpx_handler.c
View file @ 90e48970
...@@ -59,7 +59,7 @@ struct atpx_mux { ...@@ -59,7 +59,7 @@ struct atpx_mux {
u16 mux; u16 mux;
} __packed; } __packed;
bool radeon_is_px(void) { bool radeon_has_atpx(void) {
return radeon_atpx_priv.atpx_detected; return radeon_atpx_priv.atpx_detected;
} }
......
drivers/gpu/drm/radeon/radeon_device.c
View file @ 90e48970
...@@ -102,11 +102,14 @@ static const char radeon_family_name[][16] = { ...@@ -102,11 +102,14 @@ static const char radeon_family_name[][16] = {
"LAST", "LAST",
}; };
#if defined(CONFIG_VGA_SWITCHEROO) bool radeon_is_px(struct drm_device *dev)
bool radeon_is_px(void); {
#else struct radeon_device *rdev = dev->dev_private;
static inline bool radeon_is_px(void) { return false; }
#endif if (rdev->flags & RADEON_IS_PX)
return true;
return false;
}
/** /**
* radeon_program_register_sequence - program an array of registers. * radeon_program_register_sequence - program an array of registers.
...@@ -1082,7 +1085,7 @@ static void radeon_switcheroo_set_state(struct pci_dev *pdev, enum vga_switchero ...@@ -1082,7 +1085,7 @@ static void radeon_switcheroo_set_state(struct pci_dev *pdev, enum vga_switchero
{ {
struct drm_device *dev = pci_get_drvdata(pdev); struct drm_device *dev = pci_get_drvdata(pdev);
if (radeon_is_px() && state == VGA_SWITCHEROO_OFF) if (radeon_is_px(dev) && state == VGA_SWITCHEROO_OFF)
return; return;
if (state == VGA_SWITCHEROO_ON) { if (state == VGA_SWITCHEROO_ON) {
...@@ -1301,9 +1304,7 @@ int radeon_device_init(struct radeon_device *rdev, ...@@ -1301,9 +1304,7 @@ int radeon_device_init(struct radeon_device *rdev,
* ignore it */ * ignore it */
vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode); vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode);
if (radeon_runtime_pm == 1) if (rdev->flags & RADEON_IS_PX)
runtime = true;
if ((radeon_runtime_pm == -1) && radeon_is_px())
runtime = true; runtime = true;
vga_switcheroo_register_client(rdev->pdev, &radeon_switcheroo_ops, runtime); vga_switcheroo_register_client(rdev->pdev, &radeon_switcheroo_ops, runtime);
if (runtime) if (runtime)
......
drivers/gpu/drm/radeon/radeon_display.c
View file @ 90e48970
...@@ -865,7 +865,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, ...@@ -865,7 +865,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
unsigned post_div_min, post_div_max, post_div; unsigned post_div_min, post_div_max, post_div;
unsigned ref_div_min, ref_div_max, ref_div; unsigned ref_div_min, ref_div_max, ref_div;
unsigned post_div_best, diff_best; unsigned post_div_best, diff_best;
unsigned nom, den, tmp; unsigned nom, den;
/* determine allowed feedback divider range */ /* determine allowed feedback divider range */
fb_div_min = pll->min_feedback_div; fb_div_min = pll->min_feedback_div;
...@@ -937,23 +937,27 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, ...@@ -937,23 +937,27 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
} }
post_div = post_div_best; post_div = post_div_best;
/* limit reference * post divider to a maximum */
ref_div_max = min(210 / post_div, ref_div_max);
/* get matching reference and feedback divider */ /* get matching reference and feedback divider */
ref_div = max(den / post_div, 1u); ref_div = max(DIV_ROUND_CLOSEST(den, post_div), 1u);
fb_div = nom; fb_div = DIV_ROUND_CLOSEST(nom * ref_div * post_div, den);
/* we're almost done, but reference and feedback /* we're almost done, but reference and feedback
divider might be to large now */ divider might be to large now */
tmp = ref_div; nom = fb_div;
den = ref_div;
if (fb_div > fb_div_max) { if (fb_div > fb_div_max) {
ref_div = ref_div * fb_div_max / fb_div; ref_div = DIV_ROUND_CLOSEST(den * fb_div_max, nom);
fb_div = fb_div_max; fb_div = fb_div_max;
} }
if (ref_div > ref_div_max) { if (ref_div > ref_div_max) {
ref_div = ref_div_max; ref_div = ref_div_max;
fb_div = nom * ref_div_max / tmp; fb_div = DIV_ROUND_CLOSEST(nom * ref_div_max, den);
} }
/* reduce the numbers to a simpler ratio once more */ /* reduce the numbers to a simpler ratio once more */
......
drivers/gpu/drm/radeon/radeon_drv.c
View file @ 90e48970
...@@ -115,6 +115,7 @@ extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, ...@@ -115,6 +115,7 @@ extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
unsigned int flags, unsigned int flags,
int *vpos, int *hpos, ktime_t *stime, int *vpos, int *hpos, ktime_t *stime,
ktime_t *etime); ktime_t *etime);
extern bool radeon_is_px(struct drm_device *dev);
extern const struct drm_ioctl_desc radeon_ioctls_kms[]; extern const struct drm_ioctl_desc radeon_ioctls_kms[];
extern int radeon_max_kms_ioctl; extern int radeon_max_kms_ioctl;
int radeon_mmap(struct file *filp, struct vm_area_struct *vma); int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
...@@ -144,11 +145,9 @@ void radeon_debugfs_cleanup(struct drm_minor *minor); ...@@ -144,11 +145,9 @@ void radeon_debugfs_cleanup(struct drm_minor *minor);
#if defined(CONFIG_VGA_SWITCHEROO) #if defined(CONFIG_VGA_SWITCHEROO)
void radeon_register_atpx_handler(void); void radeon_register_atpx_handler(void);
void radeon_unregister_atpx_handler(void); void radeon_unregister_atpx_handler(void);
bool radeon_is_px(void);
#else #else
static inline void radeon_register_atpx_handler(void) {} static inline void radeon_register_atpx_handler(void) {}
static inline void radeon_unregister_atpx_handler(void) {} static inline void radeon_unregister_atpx_handler(void) {}
static inline bool radeon_is_px(void) { return false; }
#endif #endif
int radeon_no_wb; int radeon_no_wb;
...@@ -405,12 +404,7 @@ static int radeon_pmops_runtime_suspend(struct device *dev) ...@@ -405,12 +404,7 @@ static int radeon_pmops_runtime_suspend(struct device *dev)
struct drm_device *drm_dev = pci_get_drvdata(pdev); struct drm_device *drm_dev = pci_get_drvdata(pdev);
int ret; int ret;
if (radeon_runtime_pm == 0) { if (!radeon_is_px(drm_dev)) {
pm_runtime_forbid(dev);
return -EBUSY;
}
if (radeon_runtime_pm == -1 && !radeon_is_px()) {
pm_runtime_forbid(dev); pm_runtime_forbid(dev);
return -EBUSY; return -EBUSY;
} }
...@@ -434,10 +428,7 @@ static int radeon_pmops_runtime_resume(struct device *dev) ...@@ -434,10 +428,7 @@ static int radeon_pmops_runtime_resume(struct device *dev)
struct drm_device *drm_dev = pci_get_drvdata(pdev); struct drm_device *drm_dev = pci_get_drvdata(pdev);
int ret; int ret;
if (radeon_runtime_pm == 0) if (!radeon_is_px(drm_dev))
return -EINVAL;
if (radeon_runtime_pm == -1 && !radeon_is_px())
return -EINVAL; return -EINVAL;
drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
...@@ -462,14 +453,7 @@ static int radeon_pmops_runtime_idle(struct device *dev) ...@@ -462,14 +453,7 @@ static int radeon_pmops_runtime_idle(struct device *dev)
struct drm_device *drm_dev = pci_get_drvdata(pdev); struct drm_device *drm_dev = pci_get_drvdata(pdev);
struct drm_crtc *crtc; struct drm_crtc *crtc;
if (radeon_runtime_pm == 0) { if (!radeon_is_px(drm_dev)) {
pm_runtime_forbid(dev);
return -EBUSY;
}
/* are we PX enabled? */
if (radeon_runtime_pm == -1 && !radeon_is_px()) {
DRM_DEBUG_DRIVER("failing to power off - not px\n");
pm_runtime_forbid(dev); pm_runtime_forbid(dev);
return -EBUSY; return -EBUSY;
} }
......
drivers/gpu/drm/radeon/radeon_family.h
View file @ 90e48970
...@@ -115,6 +115,7 @@ enum radeon_chip_flags { ...@@ -115,6 +115,7 @@ enum radeon_chip_flags {
RADEON_NEW_MEMMAP = 0x00400000UL, RADEON_NEW_MEMMAP = 0x00400000UL,
RADEON_IS_PCI = 0x00800000UL, RADEON_IS_PCI = 0x00800000UL,
RADEON_IS_IGPGART = 0x01000000UL, RADEON_IS_IGPGART = 0x01000000UL,
RADEON_IS_PX = 0x02000000UL,
}; };
#endif #endif
drivers/gpu/drm/radeon/radeon_kms.c
View file @ 90e48970
...@@ -35,9 +35,9 @@ ...@@ -35,9 +35,9 @@
#include <linux/pm_runtime.h> #include <linux/pm_runtime.h>
#if defined(CONFIG_VGA_SWITCHEROO) #if defined(CONFIG_VGA_SWITCHEROO)
bool radeon_is_px(void); bool radeon_has_atpx(void);
#else #else
static inline bool radeon_is_px(void) { return false; } static inline bool radeon_has_atpx(void) { return false; }
#endif #endif
/** /**
...@@ -107,6 +107,13 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags) ...@@ -107,6 +107,13 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
flags |= RADEON_IS_PCI; flags |= RADEON_IS_PCI;
} }
if (radeon_runtime_pm == 1)
flags |= RADEON_IS_PX;
else if ((radeon_runtime_pm == -1) &&
radeon_has_atpx() &&
((flags & RADEON_IS_IGP) == 0))
flags |= RADEON_IS_PX;
/* radeon_device_init should report only fatal error /* radeon_device_init should report only fatal error
* like memory allocation failure or iomapping failure, * like memory allocation failure or iomapping failure,
* or memory manager initialization failure, it must * or memory manager initialization failure, it must
...@@ -137,8 +144,7 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags) ...@@ -137,8 +144,7 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
"Error during ACPI methods call\n"); "Error during ACPI methods call\n");
} }
if ((radeon_runtime_pm == 1) || if (radeon_is_px(dev)) {
((radeon_runtime_pm == -1) && radeon_is_px())) {
pm_runtime_use_autosuspend(dev->dev); pm_runtime_use_autosuspend(dev->dev);
pm_runtime_set_autosuspend_delay(dev->dev, 5000); pm_runtime_set_autosuspend_delay(dev->dev, 5000);
pm_runtime_set_active(dev->dev); pm_runtime_set_active(dev->dev);
...@@ -568,12 +574,17 @@ int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv) ...@@ -568,12 +574,17 @@ int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
} }
r = radeon_vm_init(rdev, &fpriv->vm); r = radeon_vm_init(rdev, &fpriv->vm);
if (r) if (r) {
kfree(fpriv);
return r; return r;
}
r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false); r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false);
if (r) if (r) {
radeon_vm_fini(rdev, &fpriv->vm);
kfree(fpriv);
return r; return r;
}
/* map the ib pool buffer read only into /* map the ib pool buffer read only into
* virtual address space */ * virtual address space */
......
drivers/gpu/drm/radeon/radeon_ucode.h
View file @ 90e48970
...@@ -57,9 +57,14 @@ ...@@ -57,9 +57,14 @@
#define BTC_MC_UCODE_SIZE 6024 #define BTC_MC_UCODE_SIZE 6024
#define CAYMAN_MC_UCODE_SIZE 6037 #define CAYMAN_MC_UCODE_SIZE 6037
#define SI_MC_UCODE_SIZE 7769 #define SI_MC_UCODE_SIZE 7769
#define TAHITI_MC_UCODE_SIZE 7808
#define PITCAIRN_MC_UCODE_SIZE 7775
#define VERDE_MC_UCODE_SIZE 7875
#define OLAND_MC_UCODE_SIZE 7863 #define OLAND_MC_UCODE_SIZE 7863
#define CIK_MC_UCODE_SIZE 7866 #define BONAIRE_MC_UCODE_SIZE 7866
#define BONAIRE_MC2_UCODE_SIZE 7948
#define HAWAII_MC_UCODE_SIZE 7933 #define HAWAII_MC_UCODE_SIZE 7933
#define HAWAII_MC2_UCODE_SIZE 8091
/* SDMA */ /* SDMA */
#define CIK_SDMA_UCODE_SIZE 1050 #define CIK_SDMA_UCODE_SIZE 1050
......
drivers/gpu/drm/radeon/radeon_vce.c
View file @ 90e48970
...@@ -613,7 +613,7 @@ void radeon_vce_fence_emit(struct radeon_device *rdev, ...@@ -613,7 +613,7 @@ void radeon_vce_fence_emit(struct radeon_device *rdev,
struct radeon_fence *fence) struct radeon_fence *fence)
{ {
struct radeon_ring *ring = &rdev->ring[fence->ring]; struct radeon_ring *ring = &rdev->ring[fence->ring];
uint32_t addr = rdev->fence_drv[fence->ring].gpu_addr; uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr;
radeon_ring_write(ring, VCE_CMD_FENCE); radeon_ring_write(ring, VCE_CMD_FENCE);
radeon_ring_write(ring, addr); radeon_ring_write(ring, addr);
......
drivers/gpu/drm/radeon/si.c
View file @ 90e48970
...@@ -39,30 +39,35 @@ MODULE_FIRMWARE("radeon/TAHITI_pfp.bin"); ...@@ -39,30 +39,35 @@ MODULE_FIRMWARE("radeon/TAHITI_pfp.bin");
MODULE_FIRMWARE("radeon/TAHITI_me.bin"); MODULE_FIRMWARE("radeon/TAHITI_me.bin");
MODULE_FIRMWARE("radeon/TAHITI_ce.bin"); MODULE_FIRMWARE("radeon/TAHITI_ce.bin");
MODULE_FIRMWARE("radeon/TAHITI_mc.bin"); MODULE_FIRMWARE("radeon/TAHITI_mc.bin");
MODULE_FIRMWARE("radeon/TAHITI_mc2.bin");
MODULE_FIRMWARE("radeon/TAHITI_rlc.bin"); MODULE_FIRMWARE("radeon/TAHITI_rlc.bin");
MODULE_FIRMWARE("radeon/TAHITI_smc.bin"); MODULE_FIRMWARE("radeon/TAHITI_smc.bin");
MODULE_FIRMWARE("radeon/PITCAIRN_pfp.bin"); MODULE_FIRMWARE("radeon/PITCAIRN_pfp.bin");
MODULE_FIRMWARE("radeon/PITCAIRN_me.bin"); MODULE_FIRMWARE("radeon/PITCAIRN_me.bin");
MODULE_FIRMWARE("radeon/PITCAIRN_ce.bin"); MODULE_FIRMWARE("radeon/PITCAIRN_ce.bin");
MODULE_FIRMWARE("radeon/PITCAIRN_mc.bin"); MODULE_FIRMWARE("radeon/PITCAIRN_mc.bin");
MODULE_FIRMWARE("radeon/PITCAIRN_mc2.bin");
MODULE_FIRMWARE("radeon/PITCAIRN_rlc.bin"); MODULE_FIRMWARE("radeon/PITCAIRN_rlc.bin");
MODULE_FIRMWARE("radeon/PITCAIRN_smc.bin"); MODULE_FIRMWARE("radeon/PITCAIRN_smc.bin");
MODULE_FIRMWARE("radeon/VERDE_pfp.bin"); MODULE_FIRMWARE("radeon/VERDE_pfp.bin");
MODULE_FIRMWARE("radeon/VERDE_me.bin"); MODULE_FIRMWARE("radeon/VERDE_me.bin");
MODULE_FIRMWARE("radeon/VERDE_ce.bin"); MODULE_FIRMWARE("radeon/VERDE_ce.bin");
MODULE_FIRMWARE("radeon/VERDE_mc.bin"); MODULE_FIRMWARE("radeon/VERDE_mc.bin");
MODULE_FIRMWARE("radeon/VERDE_mc2.bin");
MODULE_FIRMWARE("radeon/VERDE_rlc.bin"); MODULE_FIRMWARE("radeon/VERDE_rlc.bin");
MODULE_FIRMWARE("radeon/VERDE_smc.bin"); MODULE_FIRMWARE("radeon/VERDE_smc.bin");
MODULE_FIRMWARE("radeon/OLAND_pfp.bin"); MODULE_FIRMWARE("radeon/OLAND_pfp.bin");
MODULE_FIRMWARE("radeon/OLAND_me.bin"); MODULE_FIRMWARE("radeon/OLAND_me.bin");
MODULE_FIRMWARE("radeon/OLAND_ce.bin"); MODULE_FIRMWARE("radeon/OLAND_ce.bin");
MODULE_FIRMWARE("radeon/OLAND_mc.bin"); MODULE_FIRMWARE("radeon/OLAND_mc.bin");
MODULE_FIRMWARE("radeon/OLAND_mc2.bin");
MODULE_FIRMWARE("radeon/OLAND_rlc.bin"); MODULE_FIRMWARE("radeon/OLAND_rlc.bin");
MODULE_FIRMWARE("radeon/OLAND_smc.bin"); MODULE_FIRMWARE("radeon/OLAND_smc.bin");
MODULE_FIRMWARE("radeon/HAINAN_pfp.bin"); MODULE_FIRMWARE("radeon/HAINAN_pfp.bin");
MODULE_FIRMWARE("radeon/HAINAN_me.bin"); MODULE_FIRMWARE("radeon/HAINAN_me.bin");
MODULE_FIRMWARE("radeon/HAINAN_ce.bin"); MODULE_FIRMWARE("radeon/HAINAN_ce.bin");
MODULE_FIRMWARE("radeon/HAINAN_mc.bin"); MODULE_FIRMWARE("radeon/HAINAN_mc.bin");
MODULE_FIRMWARE("radeon/HAINAN_mc2.bin");
MODULE_FIRMWARE("radeon/HAINAN_rlc.bin"); MODULE_FIRMWARE("radeon/HAINAN_rlc.bin");
MODULE_FIRMWARE("radeon/HAINAN_smc.bin"); MODULE_FIRMWARE("radeon/HAINAN_smc.bin");
...@@ -1467,36 +1472,33 @@ int si_mc_load_microcode(struct radeon_device *rdev) ...@@ -1467,36 +1472,33 @@ int si_mc_load_microcode(struct radeon_device *rdev)
const __be32 *fw_data; const __be32 *fw_data;
u32 running, blackout = 0; u32 running, blackout = 0;
u32 *io_mc_regs; u32 *io_mc_regs;
int i, ucode_size, regs_size; int i, regs_size, ucode_size;
if (!rdev->mc_fw) if (!rdev->mc_fw)
return -EINVAL; return -EINVAL;
ucode_size = rdev->mc_fw->size / 4;
switch (rdev->family) { switch (rdev->family) {
case CHIP_TAHITI: case CHIP_TAHITI:
io_mc_regs = (u32 *)&tahiti_io_mc_regs; io_mc_regs = (u32 *)&tahiti_io_mc_regs;
ucode_size = SI_MC_UCODE_SIZE;
regs_size = TAHITI_IO_MC_REGS_SIZE; regs_size = TAHITI_IO_MC_REGS_SIZE;
break; break;
case CHIP_PITCAIRN: case CHIP_PITCAIRN:
io_mc_regs = (u32 *)&pitcairn_io_mc_regs; io_mc_regs = (u32 *)&pitcairn_io_mc_regs;
ucode_size = SI_MC_UCODE_SIZE;
regs_size = TAHITI_IO_MC_REGS_SIZE; regs_size = TAHITI_IO_MC_REGS_SIZE;
break; break;
case CHIP_VERDE: case CHIP_VERDE:
default: default:
io_mc_regs = (u32 *)&verde_io_mc_regs; io_mc_regs = (u32 *)&verde_io_mc_regs;
ucode_size = SI_MC_UCODE_SIZE;
regs_size = TAHITI_IO_MC_REGS_SIZE; regs_size = TAHITI_IO_MC_REGS_SIZE;
break; break;
case CHIP_OLAND: case CHIP_OLAND:
io_mc_regs = (u32 *)&oland_io_mc_regs; io_mc_regs = (u32 *)&oland_io_mc_regs;
ucode_size = OLAND_MC_UCODE_SIZE;
regs_size = TAHITI_IO_MC_REGS_SIZE; regs_size = TAHITI_IO_MC_REGS_SIZE;
break; break;
case CHIP_HAINAN: case CHIP_HAINAN:
io_mc_regs = (u32 *)&hainan_io_mc_regs; io_mc_regs = (u32 *)&hainan_io_mc_regs;
ucode_size = OLAND_MC_UCODE_SIZE;
regs_size = TAHITI_IO_MC_REGS_SIZE; regs_size = TAHITI_IO_MC_REGS_SIZE;
break; break;
} }
...@@ -1552,7 +1554,7 @@ static int si_init_microcode(struct radeon_device *rdev) ...@@ -1552,7 +1554,7 @@ static int si_init_microcode(struct radeon_device *rdev)
const char *chip_name; const char *chip_name;
const char *rlc_chip_name; const char *rlc_chip_name;
size_t pfp_req_size, me_req_size, ce_req_size, rlc_req_size, mc_req_size; size_t pfp_req_size, me_req_size, ce_req_size, rlc_req_size, mc_req_size;
size_t smc_req_size; size_t smc_req_size, mc2_req_size;
char fw_name[30]; char fw_name[30];
int err; int err;
...@@ -1567,6 +1569,7 @@ static int si_init_microcode(struct radeon_device *rdev) ...@@ -1567,6 +1569,7 @@ static int si_init_microcode(struct radeon_device *rdev)
ce_req_size = SI_CE_UCODE_SIZE * 4; ce_req_size = SI_CE_UCODE_SIZE * 4;
rlc_req_size = SI_RLC_UCODE_SIZE * 4; rlc_req_size = SI_RLC_UCODE_SIZE * 4;
mc_req_size = SI_MC_UCODE_SIZE * 4; mc_req_size = SI_MC_UCODE_SIZE * 4;
mc2_req_size = TAHITI_MC_UCODE_SIZE * 4;
smc_req_size = ALIGN(TAHITI_SMC_UCODE_SIZE, 4); smc_req_size = ALIGN(TAHITI_SMC_UCODE_SIZE, 4);
break; break;
case CHIP_PITCAIRN: case CHIP_PITCAIRN:
...@@ -1577,6 +1580,7 @@ static int si_init_microcode(struct radeon_device *rdev) ...@@ -1577,6 +1580,7 @@ static int si_init_microcode(struct radeon_device *rdev)
ce_req_size = SI_CE_UCODE_SIZE * 4; ce_req_size = SI_CE_UCODE_SIZE * 4;
rlc_req_size = SI_RLC_UCODE_SIZE * 4; rlc_req_size = SI_RLC_UCODE_SIZE * 4;
mc_req_size = SI_MC_UCODE_SIZE * 4; mc_req_size = SI_MC_UCODE_SIZE * 4;
mc2_req_size = PITCAIRN_MC_UCODE_SIZE * 4;
smc_req_size = ALIGN(PITCAIRN_SMC_UCODE_SIZE, 4); smc_req_size = ALIGN(PITCAIRN_SMC_UCODE_SIZE, 4);
break; break;
case CHIP_VERDE: case CHIP_VERDE:
...@@ -1587,6 +1591,7 @@ static int si_init_microcode(struct radeon_device *rdev) ...@@ -1587,6 +1591,7 @@ static int si_init_microcode(struct radeon_device *rdev)
ce_req_size = SI_CE_UCODE_SIZE * 4; ce_req_size = SI_CE_UCODE_SIZE * 4;
rlc_req_size = SI_RLC_UCODE_SIZE * 4; rlc_req_size = SI_RLC_UCODE_SIZE * 4;
mc_req_size = SI_MC_UCODE_SIZE * 4; mc_req_size = SI_MC_UCODE_SIZE * 4;
mc2_req_size = VERDE_MC_UCODE_SIZE * 4;
smc_req_size = ALIGN(VERDE_SMC_UCODE_SIZE, 4); smc_req_size = ALIGN(VERDE_SMC_UCODE_SIZE, 4);
break; break;
case CHIP_OLAND: case CHIP_OLAND:
...@@ -1596,7 +1601,7 @@ static int si_init_microcode(struct radeon_device *rdev) ...@@ -1596,7 +1601,7 @@ static int si_init_microcode(struct radeon_device *rdev)
me_req_size = SI_PM4_UCODE_SIZE * 4; me_req_size = SI_PM4_UCODE_SIZE * 4;
ce_req_size = SI_CE_UCODE_SIZE * 4; ce_req_size = SI_CE_UCODE_SIZE * 4;
rlc_req_size = SI_RLC_UCODE_SIZE * 4; rlc_req_size = SI_RLC_UCODE_SIZE * 4;
mc_req_size = OLAND_MC_UCODE_SIZE * 4; mc_req_size = mc2_req_size = OLAND_MC_UCODE_SIZE * 4;
smc_req_size = ALIGN(OLAND_SMC_UCODE_SIZE, 4); smc_req_size = ALIGN(OLAND_SMC_UCODE_SIZE, 4);
break; break;
case CHIP_HAINAN: case CHIP_HAINAN:
...@@ -1606,7 +1611,7 @@ static int si_init_microcode(struct radeon_device *rdev) ...@@ -1606,7 +1611,7 @@ static int si_init_microcode(struct radeon_device *rdev)
me_req_size = SI_PM4_UCODE_SIZE * 4; me_req_size = SI_PM4_UCODE_SIZE * 4;
ce_req_size = SI_CE_UCODE_SIZE * 4; ce_req_size = SI_CE_UCODE_SIZE * 4;
rlc_req_size = SI_RLC_UCODE_SIZE * 4; rlc_req_size = SI_RLC_UCODE_SIZE * 4;
mc_req_size = OLAND_MC_UCODE_SIZE * 4; mc_req_size = mc2_req_size = OLAND_MC_UCODE_SIZE * 4;
smc_req_size = ALIGN(HAINAN_SMC_UCODE_SIZE, 4); smc_req_size = ALIGN(HAINAN_SMC_UCODE_SIZE, 4);
break; break;
default: BUG(); default: BUG();
...@@ -1659,16 +1664,22 @@ static int si_init_microcode(struct radeon_device *rdev) ...@@ -1659,16 +1664,22 @@ static int si_init_microcode(struct radeon_device *rdev)
err = -EINVAL; err = -EINVAL;
} }
snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc2.bin", chip_name);
err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
if (err) if (err) {
goto out; snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name);
if (rdev->mc_fw->size != mc_req_size) { err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
if (err)
goto out;
}
if ((rdev->mc_fw->size != mc_req_size) &&
(rdev->mc_fw->size != mc2_req_size)) {
printk(KERN_ERR printk(KERN_ERR
"si_mc: Bogus length %zu in firmware \"%s\"\n", "si_mc: Bogus length %zu in firmware \"%s\"\n",
rdev->mc_fw->size, fw_name); rdev->mc_fw->size, fw_name);
err = -EINVAL; err = -EINVAL;
} }
DRM_INFO("%s: %zu bytes\n", fw_name, rdev->mc_fw->size);
snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name);
err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev);
......
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