Commit 91ff3cb4 authored by Avi Kivity's avatar Avi Kivity

KVM: x86 emulator: put register operand fetch into a function

The code is repeated three times, put it into fetch_register_operand()
Signed-off-by: default avatarAvi Kivity <avi@redhat.com>
parent 3d9e77df
...@@ -539,6 +539,24 @@ static int test_cc(unsigned int condition, unsigned int flags) ...@@ -539,6 +539,24 @@ static int test_cc(unsigned int condition, unsigned int flags)
return (!!rc ^ (condition & 1)); return (!!rc ^ (condition & 1));
} }
static void fetch_register_operand(struct operand *op)
{
switch (op->bytes) {
case 1:
op->val = *(u8 *)op->addr.reg;
break;
case 2:
op->val = *(u16 *)op->addr.reg;
break;
case 4:
op->val = *(u32 *)op->addr.reg;
break;
case 8:
op->val = *(u64 *)op->addr.reg;
break;
}
}
static void decode_register_operand(struct operand *op, static void decode_register_operand(struct operand *op,
struct decode_cache *c, struct decode_cache *c,
int inhibit_bytereg) int inhibit_bytereg)
...@@ -551,23 +569,12 @@ static void decode_register_operand(struct operand *op, ...@@ -551,23 +569,12 @@ static void decode_register_operand(struct operand *op,
op->type = OP_REG; op->type = OP_REG;
if ((c->d & ByteOp) && !inhibit_bytereg) { if ((c->d & ByteOp) && !inhibit_bytereg) {
op->addr.reg = decode_register(reg, c->regs, highbyte_regs); op->addr.reg = decode_register(reg, c->regs, highbyte_regs);
op->val = *(u8 *)op->addr.reg;
op->bytes = 1; op->bytes = 1;
} else { } else {
op->addr.reg = decode_register(reg, c->regs, 0); op->addr.reg = decode_register(reg, c->regs, 0);
op->bytes = c->op_bytes; op->bytes = c->op_bytes;
switch (op->bytes) {
case 2:
op->val = *(u16 *)op->addr.reg;
break;
case 4:
op->val = *(u32 *)op->addr.reg;
break;
case 8:
op->val = *(u64 *) op->addr.reg;
break;
}
} }
fetch_register_operand(op);
op->orig_val = op->val; op->orig_val = op->val;
} }
...@@ -2507,20 +2514,7 @@ x86_decode_insn(struct x86_emulate_ctxt *ctxt) ...@@ -2507,20 +2514,7 @@ x86_decode_insn(struct x86_emulate_ctxt *ctxt)
c->src.type = OP_REG; c->src.type = OP_REG;
c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
c->src.addr.reg = &c->regs[VCPU_REGS_RAX]; c->src.addr.reg = &c->regs[VCPU_REGS_RAX];
switch (c->src.bytes) { fetch_register_operand(&c->src);
case 1:
c->src.val = *(u8 *)c->src.addr.reg;
break;
case 2:
c->src.val = *(u16 *)c->src.addr.reg;
break;
case 4:
c->src.val = *(u32 *)c->src.addr.reg;
break;
case 8:
c->src.val = *(u64 *)c->src.addr.reg;
break;
}
break; break;
case SrcOne: case SrcOne:
c->src.bytes = 1; c->src.bytes = 1;
...@@ -2606,20 +2600,7 @@ x86_decode_insn(struct x86_emulate_ctxt *ctxt) ...@@ -2606,20 +2600,7 @@ x86_decode_insn(struct x86_emulate_ctxt *ctxt)
c->dst.type = OP_REG; c->dst.type = OP_REG;
c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
c->dst.addr.reg = &c->regs[VCPU_REGS_RAX]; c->dst.addr.reg = &c->regs[VCPU_REGS_RAX];
switch (c->dst.bytes) { fetch_register_operand(&c->dst);
case 1:
c->dst.val = *(u8 *)c->dst.addr.reg;
break;
case 2:
c->dst.val = *(u16 *)c->dst.addr.reg;
break;
case 4:
c->dst.val = *(u32 *)c->dst.addr.reg;
break;
case 8:
c->dst.val = *(u64 *)c->dst.addr.reg;
break;
}
c->dst.orig_val = c->dst.val; c->dst.orig_val = c->dst.val;
break; break;
case DstDI: case DstDI:
......
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