Commit 92489120 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Simon Horman

ARM: dts: r7s72100: Rename the serial port clock to fck

The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 46ae0e37
...@@ -158,7 +158,7 @@ scif0: serial@e8007000 { ...@@ -158,7 +158,7 @@ scif0: serial@e8007000 {
<GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R7S72100_CLK_SCIF0>; clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
clock-names = "sci_ick"; clock-names = "fck";
power-domains = <&cpg_clocks>; power-domains = <&cpg_clocks>;
status = "disabled"; status = "disabled";
}; };
...@@ -171,7 +171,7 @@ scif1: serial@e8007800 { ...@@ -171,7 +171,7 @@ scif1: serial@e8007800 {
<GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R7S72100_CLK_SCIF1>; clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
clock-names = "sci_ick"; clock-names = "fck";
power-domains = <&cpg_clocks>; power-domains = <&cpg_clocks>;
status = "disabled"; status = "disabled";
}; };
...@@ -184,7 +184,7 @@ scif2: serial@e8008000 { ...@@ -184,7 +184,7 @@ scif2: serial@e8008000 {
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R7S72100_CLK_SCIF2>; clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
clock-names = "sci_ick"; clock-names = "fck";
power-domains = <&cpg_clocks>; power-domains = <&cpg_clocks>;
status = "disabled"; status = "disabled";
}; };
...@@ -197,7 +197,7 @@ scif3: serial@e8008800 { ...@@ -197,7 +197,7 @@ scif3: serial@e8008800 {
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R7S72100_CLK_SCIF3>; clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
clock-names = "sci_ick"; clock-names = "fck";
power-domains = <&cpg_clocks>; power-domains = <&cpg_clocks>;
status = "disabled"; status = "disabled";
}; };
...@@ -210,7 +210,7 @@ scif4: serial@e8009000 { ...@@ -210,7 +210,7 @@ scif4: serial@e8009000 {
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R7S72100_CLK_SCIF4>; clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
clock-names = "sci_ick"; clock-names = "fck";
power-domains = <&cpg_clocks>; power-domains = <&cpg_clocks>;
status = "disabled"; status = "disabled";
}; };
...@@ -223,7 +223,7 @@ scif5: serial@e8009800 { ...@@ -223,7 +223,7 @@ scif5: serial@e8009800 {
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R7S72100_CLK_SCIF5>; clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
clock-names = "sci_ick"; clock-names = "fck";
power-domains = <&cpg_clocks>; power-domains = <&cpg_clocks>;
status = "disabled"; status = "disabled";
}; };
...@@ -236,7 +236,7 @@ scif6: serial@e800a000 { ...@@ -236,7 +236,7 @@ scif6: serial@e800a000 {
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R7S72100_CLK_SCIF6>; clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
clock-names = "sci_ick"; clock-names = "fck";
power-domains = <&cpg_clocks>; power-domains = <&cpg_clocks>;
status = "disabled"; status = "disabled";
}; };
...@@ -249,7 +249,7 @@ scif7: serial@e800a800 { ...@@ -249,7 +249,7 @@ scif7: serial@e800a800 {
<GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R7S72100_CLK_SCIF7>; clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
clock-names = "sci_ick"; clock-names = "fck";
power-domains = <&cpg_clocks>; power-domains = <&cpg_clocks>;
status = "disabled"; status = "disabled";
}; };
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment