Commit 93eca613 authored by Quinn Tran's avatar Quinn Tran Committed by Martin K. Petersen

scsi: qla2xxx: Defer chip reset until target mode is enabled

For target mode, any chip reset triggered before target mode is enabled will
be held off until user is ready to enable.  This prevents the chip from
starting or running before it is intended.
Signed-off-by: default avatarQuinn Tran <quinn.tran@cavium.com>
Signed-off-by: default avatarHimanshu Madhani <himanshu.madhani@cavium.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 8d9bf0a9
...@@ -6047,12 +6047,27 @@ qla2x00_do_dpc(void *data) ...@@ -6047,12 +6047,27 @@ qla2x00_do_dpc(void *data)
if (test_and_clear_bit if (test_and_clear_bit
(ISP_ABORT_NEEDED, &base_vha->dpc_flags) && (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
!test_bit(UNLOADING, &base_vha->dpc_flags)) { !test_bit(UNLOADING, &base_vha->dpc_flags)) {
bool do_reset = true;
switch (ql2x_ini_mode) {
case QLA2XXX_INI_MODE_ENABLED:
break;
case QLA2XXX_INI_MODE_DISABLED:
if (!qla_tgt_mode_enabled(base_vha))
do_reset = false;
break;
case QLA2XXX_INI_MODE_DUAL:
if (!qla_dual_mode_enabled(base_vha))
do_reset = false;
break;
default:
break;
}
if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
&base_vha->dpc_flags))) {
ql_dbg(ql_dbg_dpc, base_vha, 0x4007, ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
"ISP abort scheduled.\n"); "ISP abort scheduled.\n");
if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
&base_vha->dpc_flags))) {
if (ha->isp_ops->abort_isp(base_vha)) { if (ha->isp_ops->abort_isp(base_vha)) {
/* failed. retry later */ /* failed. retry later */
set_bit(ISP_ABORT_NEEDED, set_bit(ISP_ABORT_NEEDED,
...@@ -6060,11 +6075,10 @@ qla2x00_do_dpc(void *data) ...@@ -6060,11 +6075,10 @@ qla2x00_do_dpc(void *data)
} }
clear_bit(ABORT_ISP_ACTIVE, clear_bit(ABORT_ISP_ACTIVE,
&base_vha->dpc_flags); &base_vha->dpc_flags);
}
ql_dbg(ql_dbg_dpc, base_vha, 0x4008, ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
"ISP abort end.\n"); "ISP abort end.\n");
} }
}
if (test_and_clear_bit(FCPORT_UPDATE_NEEDED, if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
&base_vha->dpc_flags)) { &base_vha->dpc_flags)) {
......
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