Commit 94b28211 authored by Mike Frysinger's avatar Mike Frysinger Committed by Bryan Wu

Blackfin arch: add ANOMALY_05000435 to our headers

Signed-off-by: default avatarMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: default avatarBryan Wu <cooloney@kernel.org>
parent b5e986c4
...@@ -151,6 +151,8 @@ ...@@ -151,6 +151,8 @@
#define ANOMALY_05000430 (ANOMALY_BF527 && __SILICON_REVISION__ > 1) #define ANOMALY_05000430 (ANOMALY_BF527 && __SILICON_REVISION__ > 1)
/* bfrom_SysControl() Does Not Clear SIC_IWR1 Before Executing PLL Programming Sequence */ /* bfrom_SysControl() Does Not Clear SIC_IWR1 Before Executing PLL Programming Sequence */
#define ANOMALY_05000432 (ANOMALY_BF526) #define ANOMALY_05000432 (ANOMALY_BF526)
/* Certain SIC Registers are not Reset After Soft or Core Double Fault Reset */
#define ANOMALY_05000435 (ANOMALY_BF526 && __SILICON_REVISION__ < 1 || ANOMALY_BF527)
/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
#define ANOMALY_05000443 (1) #define ANOMALY_05000443 (1)
......
...@@ -275,5 +275,6 @@ ...@@ -275,5 +275,6 @@
#define ANOMALY_05000323 (0) #define ANOMALY_05000323 (0)
#define ANOMALY_05000353 (1) #define ANOMALY_05000353 (1)
#define ANOMALY_05000386 (1) #define ANOMALY_05000386 (1)
#define ANOMALY_05000435 (0)
#endif #endif
...@@ -163,5 +163,6 @@ ...@@ -163,5 +163,6 @@
#define ANOMALY_05000353 (1) #define ANOMALY_05000353 (1)
#define ANOMALY_05000363 (0) #define ANOMALY_05000363 (0)
#define ANOMALY_05000386 (1) #define ANOMALY_05000386 (1)
#define ANOMALY_05000435 (0)
#endif #endif
...@@ -119,5 +119,6 @@ ...@@ -119,5 +119,6 @@
#define ANOMALY_05000353 (1) #define ANOMALY_05000353 (1)
#define ANOMALY_05000363 (0) #define ANOMALY_05000363 (0)
#define ANOMALY_05000386 (1) #define ANOMALY_05000386 (1)
#define ANOMALY_05000435 (0)
#endif #endif
...@@ -175,5 +175,6 @@ ...@@ -175,5 +175,6 @@
#define ANOMALY_05000311 (0) #define ANOMALY_05000311 (0)
#define ANOMALY_05000323 (0) #define ANOMALY_05000323 (0)
#define ANOMALY_05000363 (0) #define ANOMALY_05000363 (0)
#define ANOMALY_05000435 (0)
#endif #endif
...@@ -274,5 +274,6 @@ ...@@ -274,5 +274,6 @@
#define ANOMALY_05000311 (0) #define ANOMALY_05000311 (0)
#define ANOMALY_05000353 (1) #define ANOMALY_05000353 (1)
#define ANOMALY_05000386 (1) #define ANOMALY_05000386 (1)
#define ANOMALY_05000435 (0)
#endif #endif
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