Commit 976c032f authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman

Staging: slicoss: slichw.h cleanup

Lots of spaces->tabs cleanups for slichw.h

It's much more sane and "Linux-like" now.

Cc: Lior Dotan <liodot@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent a750c1c5
......@@ -43,7 +43,7 @@
#define PCI_VENDOR_ID_ALACRITECH 0x139A
#define SLIC_1GB_DEVICE_ID 0x0005
#define SLIC_2GB_DEVICE_ID 0x0007 /*Oasis Device ID */
#define SLIC_2GB_DEVICE_ID 0x0007 /* Oasis Device ID */
#define SLIC_1GB_CICADA_SUBSYS_ID 0x0008
......@@ -52,7 +52,8 @@
#define SLIC_RCVBUF_SIZE 2048
#define SLIC_RCVBUF_HEADSIZE 34
#define SLIC_RCVBUF_TAILSIZE 0
#define SLIC_RCVBUF_DATASIZE (SLIC_RCVBUF_SIZE - (SLIC_RCVBUF_HEADSIZE +\
#define SLIC_RCVBUF_DATASIZE (SLIC_RCVBUF_SIZE - \
(SLIC_RCVBUF_HEADSIZE + \
SLIC_RCVBUF_TAILSIZE))
#define VGBSTAT_XPERR 0x40000000
......@@ -222,19 +223,19 @@
#define SLIC_NBR_MACS 4
struct slic_rcvbuf {
unsigned char pad1[6];
ushort pad2;
u8 pad1[6];
u16 pad2;
u32 pad3;
u32 pad4;
u32 buffer;
u32 length;
u32 status;
u32 pad5;
ushort pad6;
unsigned char data[SLIC_RCVBUF_DATASIZE];
u16 pad6;
u8 data[SLIC_RCVBUF_DATASIZE];
};
struct slic_hddr_wds {
struct slic_hddr_wds {
union {
struct {
u32 frame_status;
......@@ -244,10 +245,10 @@ struct slic_rcvbuf {
} hdrs_14port;
struct {
u32 frame_status;
ushort ByteCnt;
ushort TpChksum;
ushort CtxHash;
ushort MacHash;
u16 ByteCnt;
u16 TpChksum;
u16 CtxHash;
u16 MacHash;
u32 BufLnk;
} hdrs_gbit;
} u0;
......@@ -266,11 +267,11 @@ struct slic_host64sg {
struct slic_host64_cmd {
u32 hosthandle;
u32 RSVD;
unsigned char command;
unsigned char flags;
u8 command;
u8 flags;
union {
ushort rsv1;
ushort rsv2;
u16 rsv1;
u16 rsv2;
} u0;
union {
struct {
......@@ -286,7 +287,6 @@ struct slic_rspbuf {
u32 pad1;
u32 status;
u32 pad2[4];
};
struct slic_regs {
......@@ -359,7 +359,7 @@ struct slic_regs {
u32 pad11;
#define SLIC_WPHY 0x0058
u32 slic_rcbar; /*Rcv Cmd buf addr reg*/
u32 slic_rcbar; /* Rcv Cmd buf addr reg */
u32 pad12;
#define SLIC_RCBAR 0x0060
......@@ -367,7 +367,7 @@ struct slic_regs {
u32 pad13;
#define SLIC_RCONFIG 0x0068
u32 slic_intagg; /* Interrupt aggregation time*/
u32 slic_intagg; /* Interrupt aggregation time */
u32 pad14;
#define SLIC_INTAGG 0x0070
......@@ -434,11 +434,11 @@ struct slic_regs {
u32 pad30;
#define SLIC_QUIESCE 0x00e8
u32 slic_reset_iface; /* reset interface queues */
u32 slic_reset_iface;/* reset interface queues */
u32 pad31;
#define SLIC_RESET_IFACE 0x00f0
u32 slic_addr_upper; /* Bits 63-32 for host i/f addrs */
u32 slic_addr_upper;/* Bits 63-32 for host i/f addrs */
u32 pad32;
#define SLIC_ADDR_UPPER 0x00f8 /*Register is only written when it has changed*/
......@@ -462,7 +462,7 @@ struct slic_regs {
u32 pad37;
#define SLIC_RCBAR64 0x0120
u32 slic_stats64; /*read statistics (64 bit UPR)*/
u32 slic_stats64; /* read statistics (64 bit UPR) */
u32 pad38;
#define SLIC_RSTAT64 0x0128
......@@ -499,7 +499,6 @@ struct slic_regs {
u32 slic_ticks_per_sec; /* Write card ticks per second */
u32 pad47;
#define SLIC_TICKS_PER_SEC 0x0170
};
enum UPR_REQUEST {
......@@ -517,8 +516,8 @@ enum UPR_REQUEST {
struct inicpm_wakepattern {
u32 patternlength;
unsigned char pattern[SLIC_PM_PATTERNSIZE];
unsigned char mask[SLIC_PM_PATTERNSIZE];
u8 pattern[SLIC_PM_PATTERNSIZE];
u8 mask[SLIC_PM_PATTERNSIZE];
};
struct inicpm_state {
......@@ -639,7 +638,7 @@ struct slic_stats {
#define rcv_drops_gb u.stats_GB.rcvGB.rcv_drops
struct slic_config_mac {
unsigned char macaddrA[6];
u8 macaddrA[6];
};
#define ATK_FRU_FORMAT 0x00
......@@ -650,42 +649,42 @@ struct slic_config_mac {
#define NO_FRU_FORMAT 0xFF
struct atk_fru {
unsigned char assembly[6];
unsigned char revision[2];
unsigned char serial[14];
unsigned char pad[3];
u8 assembly[6];
u8 revision[2];
u8 serial[14];
u8 pad[3];
};
struct vendor1_fru {
unsigned char commodity;
unsigned char assembly[4];
unsigned char revision[2];
unsigned char supplier[2];
unsigned char date[2];
unsigned char sequence[3];
unsigned char pad[13];
u8 commodity;
u8 assembly[4];
u8 revision[2];
u8 supplier[2];
u8 date[2];
u8 sequence[3];
u8 pad[13];
};
struct vendor2_fru {
unsigned char part[8];
unsigned char supplier[5];
unsigned char date[3];
unsigned char sequence[4];
unsigned char pad[7];
u8 part[8];
u8 supplier[5];
u8 date[3];
u8 sequence[4];
u8 pad[7];
};
struct vendor3_fru {
unsigned char assembly[6];
unsigned char revision[2];
unsigned char serial[14];
unsigned char pad[3];
u8 assembly[6];
u8 revision[2];
u8 serial[14];
u8 pad[3];
};
struct vendor4_fru {
unsigned char number[8];
unsigned char part[8];
unsigned char version[8];
unsigned char pad[3];
u8 number[8];
u8 part[8];
u8 version[8];
u8 pad[3];
};
union oemfru {
......@@ -696,38 +695,37 @@ union oemfru {
};
/*
SLIC EEPROM structure for Mojave
*/
* SLIC EEPROM structure for Mojave
*/
struct slic_eeprom {
ushort Id; /* 00 EEPROM/FLASH Magic code 'A5A5'*/
ushort EecodeSize; /* 01 Size of EEPROM Codes (bytes * 4)*/
ushort FlashSize; /* 02 Flash size */
ushort EepromSize; /* 03 EEPROM Size */
ushort VendorId; /* 04 Vendor ID */
ushort DeviceId; /* 05 Device ID */
unsigned char RevisionId; /* 06 Revision ID */
unsigned char ClassCode[3]; /* 07 Class Code */
unsigned char DbgIntPin; /* 08 Debug Interrupt pin */
unsigned char NetIntPin0; /* Network Interrupt Pin */
unsigned char MinGrant; /* 09 Minimum grant */
unsigned char MaxLat; /* Maximum Latency */
ushort PciStatus; /* 10 PCI Status */
ushort SubSysVId; /* 11 Subsystem Vendor Id */
ushort SubSysId; /* 12 Subsystem ID */
ushort DbgDevId; /* 13 Debug Device Id */
ushort DramRomFn; /* 14 Dram/Rom function */
ushort DSize2Pci; /* 15 DRAM size to PCI (bytes * 64K) */
ushort RSize2Pci; /* 16 ROM extension size to PCI (bytes * 4k) */
unsigned char NetIntPin1;/* 17 Network Interface Pin 1
u16 Id; /* 00 EEPROM/FLASH Magic code 'A5A5'*/
u16 EecodeSize; /* 01 Size of EEPROM Codes (bytes * 4)*/
u16 FlashSize; /* 02 Flash size */
u16 EepromSize; /* 03 EEPROM Size */
u16 VendorId; /* 04 Vendor ID */
u16 DeviceId; /* 05 Device ID */
u8 RevisionId; /* 06 Revision ID */
u8 ClassCode[3]; /* 07 Class Code */
u8 DbgIntPin; /* 08 Debug Interrupt pin */
u8 NetIntPin0; /* Network Interrupt Pin */
u8 MinGrant; /* 09 Minimum grant */
u8 MaxLat; /* Maximum Latency */
u16 PciStatus; /* 10 PCI Status */
u16 SubSysVId; /* 11 Subsystem Vendor Id */
u16 SubSysId; /* 12 Subsystem ID */
u16 DbgDevId; /* 13 Debug Device Id */
u16 DramRomFn; /* 14 Dram/Rom function */
u16 DSize2Pci; /* 15 DRAM size to PCI (bytes * 64K) */
u16 RSize2Pci; /* 16 ROM extension size to PCI (bytes * 4k) */
u8 NetIntPin1; /* 17 Network Interface Pin 1
(simba/leone only) */
unsigned char NetIntPin2; /*Network Interface Pin 2 (simba/leone only)*/
u8 NetIntPin2; /* Network Interface Pin 2 (simba/leone only)*/
union {
unsigned char NetIntPin3;/*18 Network Interface Pin 3
(simba only)*/
unsigned char FreeTime;/*FreeTime setting (leone/mojave only) */
u8 NetIntPin3; /* 18 Network Interface Pin 3 (simba only) */
u8 FreeTime; /* FreeTime setting (leone/mojave only) */
} u1;
unsigned char TBIctl; /* 10-bit interface control (Mojave only) */
ushort DramSize; /* 19 DRAM size (bytes * 64k) */
u8 TBIctl; /* 10-bit interface control (Mojave only) */
u16 DramSize; /* 19 DRAM size (bytes * 64k) */
union {
struct {
/* Mac Interface Specific portions */
......@@ -736,67 +734,64 @@ struct slic_eeprom {
struct {
/* use above struct for MAC access */
struct slic_config_mac pad[SLIC_NBR_MACS - 1];
ushort DeviceId2; /* Device ID for 2nd
PCI function */
unsigned char IntPin2; /* Interrupt pin for
2nd PCI function */
unsigned char ClassCode2[3]; /* Class Code for 2nd
PCI function */
u16 DeviceId2; /* Device ID for 2nd PCI function */
u8 IntPin2; /* Interrupt pin for 2nd PCI function */
u8 ClassCode2[3]; /* Class Code for 2nd PCI function */
} mojave; /* 2nd function access for gigabit board */
} u2;
ushort CfgByte6; /* Config Byte 6 */
ushort PMECapab; /* Power Mgment capabilities */
ushort NwClkCtrls; /* NetworkClockControls */
unsigned char FruFormat; /* Alacritech FRU format type */
u16 CfgByte6; /* Config Byte 6 */
u16 PMECapab; /* Power Mgment capabilities */
u16 NwClkCtrls; /* NetworkClockControls */
u8 FruFormat; /* Alacritech FRU format type */
struct atk_fru AtkFru; /* Alacritech FRU information */
unsigned char OemFruFormat; /* optional OEM FRU format type */
u8 OemFruFormat; /* optional OEM FRU format type */
union oemfru OemFru; /* optional OEM FRU information */
unsigned char Pad[4]; /* Pad to 128 bytes - includes 2 cksum bytes
*(if OEM FRU info exists) and two unusable
u8 Pad[4]; /* Pad to 128 bytes - includes 2 cksum bytes
* (if OEM FRU info exists) and two unusable
* bytes at the end */
};
/* SLIC EEPROM structure for Oasis */
struct oslic_eeprom {
ushort Id; /* 00 EEPROM/FLASH Magic code 'A5A5' */
ushort EecodeSize; /* 01 Size of EEPROM Codes (bytes * 4)*/
ushort FlashConfig0; /* 02 Flash Config for SPI device 0 */
ushort FlashConfig1; /* 03 Flash Config for SPI device 1 */
ushort VendorId; /* 04 Vendor ID */
ushort DeviceId; /* 05 Device ID (function 0) */
unsigned char RevisionId; /* 06 Revision ID */
unsigned char ClassCode[3]; /* 07 Class Code for PCI function 0 */
unsigned char IntPin1; /* 08 Interrupt pin for PCI function 1*/
unsigned char ClassCode2[3]; /* 09 Class Code for PCI function 1 */
unsigned char IntPin2; /* 10 Interrupt pin for PCI function 2*/
unsigned char IntPin0; /* Interrupt pin for PCI function 0*/
unsigned char MinGrant; /* 11 Minimum grant */
unsigned char MaxLat; /* Maximum Latency */
ushort SubSysVId; /* 12 Subsystem Vendor Id */
ushort SubSysId; /* 13 Subsystem ID */
ushort FlashSize; /* 14 Flash size (bytes / 4K) */
ushort DSize2Pci; /* 15 DRAM size to PCI (bytes / 64K) */
ushort RSize2Pci; /* 16 Flash (ROM extension) size to
PCI (bytes / 4K) */
ushort DeviceId1; /* 17 Device Id (function 1) */
ushort DeviceId2; /* 18 Device Id (function 2) */
ushort CfgByte6; /* 19 Device Status Config Bytes 6-7 */
ushort PMECapab; /* 20 Power Mgment capabilities */
unsigned char MSICapab; /* 21 MSI capabilities */
unsigned char ClockDivider; /* Clock divider */
ushort PciStatusLow; /* 22 PCI Status bits 15:0 */
ushort PciStatusHigh; /* 23 PCI Status bits 31:16 */
ushort DramConfigLow; /* 24 DRAM Configuration bits 15:0 */
ushort DramConfigHigh; /* 25 DRAM Configuration bits 31:16 */
ushort DramSize; /* 26 DRAM size (bytes / 64K) */
ushort GpioTbiCtl;/* 27 GPIO/TBI controls for functions 1/0 */
ushort EepromSize; /* 28 EEPROM Size */
u16 Id; /* 00 EEPROM/FLASH Magic code 'A5A5' */
u16 EecodeSize; /* 01 Size of EEPROM Codes (bytes * 4)*/
u16 FlashConfig0; /* 02 Flash Config for SPI device 0 */
u16 FlashConfig1; /* 03 Flash Config for SPI device 1 */
u16 VendorId; /* 04 Vendor ID */
u16 DeviceId; /* 05 Device ID (function 0) */
u8 RevisionId; /* 06 Revision ID */
u8 ClassCode[3]; /* 07 Class Code for PCI function 0 */
u8 IntPin1; /* 08 Interrupt pin for PCI function 1*/
u8 ClassCode2[3]; /* 09 Class Code for PCI function 1 */
u8 IntPin2; /* 10 Interrupt pin for PCI function 2*/
u8 IntPin0; /* Interrupt pin for PCI function 0*/
u8 MinGrant; /* 11 Minimum grant */
u8 MaxLat; /* Maximum Latency */
u16 SubSysVId; /* 12 Subsystem Vendor Id */
u16 SubSysId; /* 13 Subsystem ID */
u16 FlashSize; /* 14 Flash size (bytes / 4K) */
u16 DSize2Pci; /* 15 DRAM size to PCI (bytes / 64K) */
u16 RSize2Pci; /* 16 Flash (ROM extension) size to PCI
(bytes / 4K) */
u16 DeviceId1; /* 17 Device Id (function 1) */
u16 DeviceId2; /* 18 Device Id (function 2) */
u16 CfgByte6; /* 19 Device Status Config Bytes 6-7 */
u16 PMECapab; /* 20 Power Mgment capabilities */
u8 MSICapab; /* 21 MSI capabilities */
u8 ClockDivider; /* Clock divider */
u16 PciStatusLow; /* 22 PCI Status bits 15:0 */
u16 PciStatusHigh; /* 23 PCI Status bits 31:16 */
u16 DramConfigLow; /* 24 DRAM Configuration bits 15:0 */
u16 DramConfigHigh; /* 25 DRAM Configuration bits 31:16 */
u16 DramSize; /* 26 DRAM size (bytes / 64K) */
u16 GpioTbiCtl; /* 27 GPIO/TBI controls for functions 1/0 */
u16 EepromSize; /* 28 EEPROM Size */
struct slic_config_mac MacInfo[2]; /* 29 MAC addresses (2 ports) */
unsigned char FruFormat; /* 35 Alacritech FRU format type */
u8 FruFormat; /* 35 Alacritech FRU format type */
struct atk_fru AtkFru; /* Alacritech FRU information */
unsigned char OemFruFormat; /* optional OEM FRU format type */
u8 OemFruFormat; /* optional OEM FRU format type */
union oemfru OemFru; /* optional OEM FRU information */
unsigned char Pad[4]; /* Pad to 128 bytes - includes 2 checksum bytes
u8 Pad[4]; /* Pad to 128 bytes - includes 2 checksum bytes
* (if OEM FRU info exists) and two unusable
* bytes at the end
*/
......@@ -805,19 +800,20 @@ struct oslic_eeprom {
#define MAX_EECODE_SIZE sizeof(struct slic_eeprom)
#define MIN_EECODE_SIZE 0x62 /* code size without optional OEM FRU stuff */
/* SLIC CONFIG structure
This structure lives in the CARD structure and is valid for all
board types. It is filled in from the appropriate EEPROM structure
by SlicGetConfigData().
*/
/*
* SLIC CONFIG structure
*
* This structure lives in the CARD structure and is valid for all board types.
* It is filled in from the appropriate EEPROM structure by
* SlicGetConfigData()
*/
struct slic_config {
bool EepromValid; /* Valid EEPROM flag (checksum good?) */
ushort DramSize; /* DRAM size (bytes / 64K) */
u16 DramSize; /* DRAM size (bytes / 64K) */
struct slic_config_mac MacInfo[SLIC_NBR_MACS]; /* MAC addresses */
unsigned char FruFormat; /* Alacritech FRU format type */
u8 FruFormat; /* Alacritech FRU format type */
struct atk_fru AtkFru; /* Alacritech FRU information */
unsigned char OemFruFormat; /* optional OEM FRU format type */
u8 OemFruFormat; /* optional OEM FRU format type */
union {
struct vendor1_fru vendor1_fru;
struct vendor2_fru vendor2_fru;
......
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