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Commit 97ee967e authored by Mark Brown's avatar Mark Brown
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Merge branch 'asoc-5.9' into asoc-5.10

parents 534c0f43 ec96690d
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Showing with 75 additions and 45 deletions
sound/soc/codecs/rt700-sdw.c
View file @ 97ee967e
......@@ -490,6 +490,9 @@ static int __maybe_unused rt700_dev_suspend(struct device *dev)
if (!rt700->hw_init)
return 0;
cancel_delayed_work_sync(&rt700->jack_detect_work);
cancel_delayed_work_sync(&rt700->jack_btn_check_work);
regcache_cache_only(rt700->regmap, true);
return 0;
......
sound/soc/codecs/rt711-sdw.c
View file @ 97ee967e
......@@ -491,6 +491,10 @@ static int __maybe_unused rt711_dev_suspend(struct device *dev)
if (!rt711->hw_init)
return 0;
cancel_delayed_work_sync(&rt711->jack_detect_work);
cancel_delayed_work_sync(&rt711->jack_btn_check_work);
cancel_work_sync(&rt711->calibration_work);
regcache_cache_only(rt711->regmap, true);
return 0;
......
sound/soc/codecs/tas2770.c
View file @ 97ee967e
......@@ -57,7 +57,12 @@ static int tas2770_set_bias_level(struct snd_soc_component *component,
TAS2770_PWR_CTRL_MASK,
TAS2770_PWR_CTRL_ACTIVE);
break;
case SND_SOC_BIAS_STANDBY:
case SND_SOC_BIAS_PREPARE:
snd_soc_component_update_bits(component,
TAS2770_PWR_CTRL,
TAS2770_PWR_CTRL_MASK, TAS2770_PWR_CTRL_MUTE);
break;
case SND_SOC_BIAS_OFF:
snd_soc_component_update_bits(component,
TAS2770_PWR_CTRL,
......@@ -135,23 +140,18 @@ static int tas2770_dac_event(struct snd_soc_dapm_widget *w,
TAS2770_PWR_CTRL,
TAS2770_PWR_CTRL_MASK,
TAS2770_PWR_CTRL_MUTE);
if (ret)
goto end;
break;
case SND_SOC_DAPM_PRE_PMD:
ret = snd_soc_component_update_bits(component,
TAS2770_PWR_CTRL,
TAS2770_PWR_CTRL_MASK,
TAS2770_PWR_CTRL_SHUTDOWN);
if (ret)
goto end;
break;
default:
dev_err(tas2770->dev, "Not supported evevt\n");
return -EINVAL;
}
end:
if (ret < 0)
return ret;
......@@ -243,6 +243,9 @@ static int tas2770_set_bitwidth(struct tas2770_priv *tas2770, int bitwidth)
return -EINVAL;
}
if (ret < 0)
return ret;
tas2770->channel_size = bitwidth;
ret = snd_soc_component_update_bits(component,
......@@ -251,16 +254,15 @@ static int tas2770_set_bitwidth(struct tas2770_priv *tas2770, int bitwidth)
TAS2770_TDM_CFG_REG5_50_MASK,
TAS2770_TDM_CFG_REG5_VSNS_ENABLE |
tas2770->v_sense_slot);
if (ret)
goto end;
if (ret < 0)
return ret;
ret = snd_soc_component_update_bits(component,
TAS2770_TDM_CFG_REG6,
TAS2770_TDM_CFG_REG6_ISNS_MASK |
TAS2770_TDM_CFG_REG6_50_MASK,
TAS2770_TDM_CFG_REG6_ISNS_ENABLE |
tas2770->i_sense_slot);
end:
if (ret < 0)
return ret;
......@@ -278,36 +280,35 @@ static int tas2770_set_samplerate(struct tas2770_priv *tas2770, int samplerate)
TAS2770_TDM_CFG_REG0,
TAS2770_TDM_CFG_REG0_SMP_MASK,
TAS2770_TDM_CFG_REG0_SMP_48KHZ);
if (ret)
goto end;
if (ret < 0)
return ret;
ret = snd_soc_component_update_bits(component,
TAS2770_TDM_CFG_REG0,
TAS2770_TDM_CFG_REG0_31_MASK,
TAS2770_TDM_CFG_REG0_31_44_1_48KHZ);
if (ret)
goto end;
break;
case 44100:
ret = snd_soc_component_update_bits(component,
TAS2770_TDM_CFG_REG0,
TAS2770_TDM_CFG_REG0_SMP_MASK,
TAS2770_TDM_CFG_REG0_SMP_44_1KHZ);
if (ret)
goto end;
if (ret < 0)
return ret;
ret = snd_soc_component_update_bits(component,
TAS2770_TDM_CFG_REG0,
TAS2770_TDM_CFG_REG0_31_MASK,
TAS2770_TDM_CFG_REG0_31_44_1_48KHZ);
if (ret)
goto end;
break;
case 96000:
ret = snd_soc_component_update_bits(component,
TAS2770_TDM_CFG_REG0,
TAS2770_TDM_CFG_REG0_SMP_MASK,
TAS2770_TDM_CFG_REG0_SMP_48KHZ);
if (ret)
goto end;
if (ret < 0)
return ret;
ret = snd_soc_component_update_bits(component,
TAS2770_TDM_CFG_REG0,
TAS2770_TDM_CFG_REG0_31_MASK,
......@@ -318,8 +319,9 @@ static int tas2770_set_samplerate(struct tas2770_priv *tas2770, int samplerate)
TAS2770_TDM_CFG_REG0,
TAS2770_TDM_CFG_REG0_SMP_MASK,
TAS2770_TDM_CFG_REG0_SMP_44_1KHZ);
if (ret)
goto end;
if (ret < 0)
return ret;
ret = snd_soc_component_update_bits(component,
TAS2770_TDM_CFG_REG0,
TAS2770_TDM_CFG_REG0_31_MASK,
......@@ -330,22 +332,22 @@ static int tas2770_set_samplerate(struct tas2770_priv *tas2770, int samplerate)
TAS2770_TDM_CFG_REG0,
TAS2770_TDM_CFG_REG0_SMP_MASK,
TAS2770_TDM_CFG_REG0_SMP_48KHZ);
if (ret)
goto end;
if (ret < 0)
return ret;
ret = snd_soc_component_update_bits(component,
TAS2770_TDM_CFG_REG0,
TAS2770_TDM_CFG_REG0_31_MASK,
TAS2770_TDM_CFG_REG0_31_176_4_192KHZ);
if (ret)
goto end;
break;
case 17640:
ret = snd_soc_component_update_bits(component,
TAS2770_TDM_CFG_REG0,
TAS2770_TDM_CFG_REG0_SMP_MASK,
TAS2770_TDM_CFG_REG0_SMP_44_1KHZ);
if (ret)
goto end;
if (ret < 0)
return ret;
ret = snd_soc_component_update_bits(component,
TAS2770_TDM_CFG_REG0,
TAS2770_TDM_CFG_REG0_31_MASK,
......@@ -355,7 +357,6 @@ static int tas2770_set_samplerate(struct tas2770_priv *tas2770, int samplerate)
ret = -EINVAL;
}
end:
if (ret < 0)
return ret;
......@@ -575,6 +576,8 @@ static int tas2770_codec_probe(struct snd_soc_component *component)
tas2770->component = component;
tas2770_reset(tas2770);
return 0;
}
......@@ -701,29 +704,28 @@ static int tas2770_parse_dt(struct device *dev, struct tas2770_priv *tas2770)
rc = fwnode_property_read_u32(dev->fwnode, "ti,asi-format",
&tas2770->asi_format);
if (rc) {
dev_err(tas2770->dev, "Looking up %s property failed %d\n",
"ti,asi-format", rc);
goto end;
dev_info(tas2770->dev, "Property %s is missing setting default slot\n",
"ti,asi-format");
tas2770->asi_format = 0;
}
rc = fwnode_property_read_u32(dev->fwnode, "ti,imon-slot-no",
&tas2770->i_sense_slot);
if (rc) {
dev_err(tas2770->dev, "Looking up %s property failed %d\n",
"ti,imon-slot-no", rc);
goto end;
dev_info(tas2770->dev, "Property %s is missing setting default slot\n",
"ti,imon-slot-no");
tas2770->i_sense_slot = 0;
}
rc = fwnode_property_read_u32(dev->fwnode, "ti,vmon-slot-no",
&tas2770->v_sense_slot);
if (rc) {
dev_err(tas2770->dev, "Looking up %s property failed %d\n",
"ti,vmon-slot-no", rc);
goto end;
dev_info(tas2770->dev, "Property %s is missing setting default slot\n",
"ti,vmon-slot-no");
tas2770->v_sense_slot = 2;
}
end:
return rc;
return 0;
}
static int tas2770_i2c_probe(struct i2c_client *client,
......@@ -771,8 +773,6 @@ static int tas2770_i2c_probe(struct i2c_client *client,
tas2770->channel_size = 0;
tas2770->slot_width = 0;
tas2770_reset(tas2770);
result = tas2770_register_codec(tas2770);
if (result)
dev_err(tas2770->dev, "Register codec failed.\n");
......
sound/soc/codecs/tlv320aic32x4-clk.c
View file @ 97ee967e
......@@ -230,7 +230,14 @@ static int clk_aic32x4_pll_set_rate(struct clk_hw *hw,
if (ret < 0)
return -EINVAL;
return clk_aic32x4_pll_set_muldiv(pll, &settings);
ret = clk_aic32x4_pll_set_muldiv(pll, &settings);
if (ret)
return ret;
/* 10ms is the delay to wait before the clocks are stable */
msleep(10);
return 0;
}
static int clk_aic32x4_pll_set_parent(struct clk_hw *hw, u8 index)
......
sound/soc/codecs/tlv320aic32x4.c
View file @ 97ee967e
......@@ -688,7 +688,7 @@ static int aic32x4_set_processing_blocks(struct snd_soc_component *component,
}
static int aic32x4_setup_clocks(struct snd_soc_component *component,
unsigned int sample_rate, unsigned int channel,
unsigned int sample_rate, unsigned int channels,
unsigned int bit_depth)
{
u8 aosr;
......@@ -777,8 +777,9 @@ static int aic32x4_setup_clocks(struct snd_soc_component *component,
dosr);
clk_set_rate(clocks[5].clk,
sample_rate * channel *
sample_rate * channels *
bit_depth);
return 0;
}
}
......@@ -1030,6 +1031,14 @@ static int aic32x4_component_probe(struct snd_soc_component *component)
AIC32X4_LADC_EN | AIC32X4_RADC_EN);
snd_soc_component_write(component, AIC32X4_ADCSETUP, tmp_reg);
/*
* Enable the fast charging feature and ensure the needed 40ms ellapsed
* before using the analog circuits.
*/
snd_soc_component_write(component, AIC32X4_REFPOWERUP,
AIC32X4_REFPOWERUP_40MS);
msleep(40);
return 0;
}
......
sound/soc/codecs/tlv320aic32x4.h
View file @ 97ee967e
......@@ -96,6 +96,7 @@ int aic32x4_register_clocks(struct device *dev, const char *mclk_name);
#define AIC32X4_FLOATINGINPUT AIC32X4_REG(1, 58)
#define AIC32X4_LMICPGAVOL AIC32X4_REG(1, 59)
#define AIC32X4_RMICPGAVOL AIC32X4_REG(1, 60)
#define AIC32X4_REFPOWERUP AIC32X4_REG(1, 123)
/* Bits, masks, and shifts */
......@@ -205,6 +206,12 @@ int aic32x4_register_clocks(struct device *dev, const char *mclk_name);
#define AIC32X4_RMICPGANIN_IN1L_10K 0x10
#define AIC32X4_RMICPGANIN_CM1R_10K 0x40
/* AIC32X4_REFPOWERUP */
#define AIC32X4_REFPOWERUP_SLOW 0x04
#define AIC32X4_REFPOWERUP_40MS 0x05
#define AIC32X4_REFPOWERUP_80MS 0x06
#define AIC32X4_REFPOWERUP_120MS 0x07
/* Common mask and enable for all of the dividers */
#define AIC32X4_DIVEN BIT(7)
#define AIC32X4_DIV_MASK GENMASK(6, 0)
......
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