Commit 9994241a authored by Rafał Miłecki's avatar Rafał Miłecki Committed by Florian Fainelli

ARM: dts: BCM5301X: Describe Northstar pins mux controller

This describes hardware & will allow referencing pin functions. The
first usage is UART1 which allows supporting devices using it.
Signed-off-by: default avatarRafał Miłecki <rafal@milecki.pl>
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent 03e96644
...@@ -37,6 +37,8 @@ uart1: serial@400 { ...@@ -37,6 +37,8 @@ uart1: serial@400 {
reg = <0x0400 0x100>; reg = <0x0400 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&iprocslow>; clocks = <&iprocslow>;
pinctrl-names = "default";
pinctrl-0 = <&pinmux_uart1>;
status = "disabled"; status = "disabled";
}; };
}; };
...@@ -391,6 +393,48 @@ i2c0: i2c@18009000 { ...@@ -391,6 +393,48 @@ i2c0: i2c@18009000 {
status = "disabled"; status = "disabled";
}; };
dmu@1800c000 {
compatible = "simple-bus";
ranges = <0 0x1800c000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
cru@100 {
compatible = "simple-bus";
reg = <0x100 0x1a4>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
pin-controller@1c0 {
compatible = "brcm,bcm4708-pinmux";
reg = <0x1c0 0x24>;
reg-names = "cru_gpio_control";
spi-pins {
groups = "spi_grp";
function = "spi";
};
i2c {
groups = "i2c_grp";
function = "i2c";
};
pwm {
groups = "pwm0_grp", "pwm1_grp",
"pwm2_grp", "pwm3_grp";
function = "pwm";
};
pinmux_uart1: uart1 {
groups = "uart1_grp";
function = "uart1";
};
};
};
};
lcpll0: lcpll0@1800c100 { lcpll0: lcpll0@1800c100 {
#clock-cells = <1>; #clock-cells = <1>;
compatible = "brcm,nsp-lcpll0"; compatible = "brcm,nsp-lcpll0";
......
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