ath9k: implement buffer holding handling for EDMA FIFO
Inside one FIFO slot queue, EDMA chipsets have the same link pointer re-read race condition as older chipsets, so the same buffer holding logic needs to be used in order to avoid use-after-free bugs. Unlike on older chips, it can be skipped for the end of the queue. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Showing
Please register or sign in to comment