Commit 9b60b64b authored by Sujith Manoharan's avatar Sujith Manoharan Committed by John W. Linville

ath9k: Add custom parameters for CUS198

CUS198 is a card based on AR9485. There are differences
between the base reference design HB125 and CUS198.
Identify such cards based on the PCI subsystem IDs and
set HW parameters appropriately.

Addresses this bug - https://bugzilla.kernel.org/show_bug.cgi?id=49201

Cc: jkp@iki.fi
Cc: gfmichaud@gmail.com
Signed-off-by: default avatarSujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent b9db4478
...@@ -3563,16 +3563,22 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz) ...@@ -3563,16 +3563,22 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)
{ {
struct ath9k_hw_capabilities *pCap = &ah->caps; struct ath9k_hw_capabilities *pCap = &ah->caps;
int chain; int chain;
u32 regval, value; u32 regval, value, gpio;
static const u32 switch_chain_reg[AR9300_MAX_CHAINS] = { static const u32 switch_chain_reg[AR9300_MAX_CHAINS] = {
AR_PHY_SWITCH_CHAIN_0, AR_PHY_SWITCH_CHAIN_0,
AR_PHY_SWITCH_CHAIN_1, AR_PHY_SWITCH_CHAIN_1,
AR_PHY_SWITCH_CHAIN_2, AR_PHY_SWITCH_CHAIN_2,
}; };
if (AR_SREV_9485(ah) && (ar9003_hw_get_rx_gain_idx(ah) == 0)) if (AR_SREV_9485(ah) && (ar9003_hw_get_rx_gain_idx(ah) == 0)) {
if (ah->config.xlna_gpio)
gpio = ah->config.xlna_gpio;
else
gpio = AR9300_EXT_LNA_CTL_GPIO_AR9485;
ath9k_hw_cfg_output(ah, AR9300_EXT_LNA_CTL_GPIO_AR9485, ath9k_hw_cfg_output(ah, AR9300_EXT_LNA_CTL_GPIO_AR9485,
AR_GPIO_OUTPUT_MUX_AS_PCIE_ATTENTION_LED); AR_GPIO_OUTPUT_MUX_AS_PCIE_ATTENTION_LED);
}
value = ar9003_hw_ant_ctrl_common_get(ah, is2ghz); value = ar9003_hw_ant_ctrl_common_get(ah, is2ghz);
...@@ -3800,7 +3806,13 @@ static void ar9003_hw_atten_apply(struct ath_hw *ah, struct ath9k_channel *chan) ...@@ -3800,7 +3806,13 @@ static void ar9003_hw_atten_apply(struct ath_hw *ah, struct ath9k_channel *chan)
REG_RMW_FIELD(ah, ext_atten_reg[i], REG_RMW_FIELD(ah, ext_atten_reg[i],
AR_PHY_EXT_ATTEN_CTL_XATTEN1_DB, value); AR_PHY_EXT_ATTEN_CTL_XATTEN1_DB, value);
value = ar9003_hw_atten_chain_get_margin(ah, i, chan); if (AR_SREV_9485(ah) &&
(ar9003_hw_get_rx_gain_idx(ah) == 0) &&
ah->config.xatten_margin_cfg)
value = 5;
else
value = ar9003_hw_atten_chain_get_margin(ah, i, chan);
REG_RMW_FIELD(ah, ext_atten_reg[i], REG_RMW_FIELD(ah, ext_atten_reg[i],
AR_PHY_EXT_ATTEN_CTL_XATTEN1_MARGIN, AR_PHY_EXT_ATTEN_CTL_XATTEN1_MARGIN,
value); value);
......
...@@ -631,6 +631,8 @@ void ath_ant_comb_update(struct ath_softc *sc); ...@@ -631,6 +631,8 @@ void ath_ant_comb_update(struct ath_softc *sc);
/* Main driver core */ /* Main driver core */
/********************/ /********************/
#define ATH9K_PCI_CUS198 0x0001
/* /*
* Default cache line size, in bytes. * Default cache line size, in bytes.
* Used when PCI device not fully initialized by bootrom/BIOS * Used when PCI device not fully initialized by bootrom/BIOS
...@@ -715,6 +717,7 @@ struct ath_softc { ...@@ -715,6 +717,7 @@ struct ath_softc {
unsigned int hw_busy_count; unsigned int hw_busy_count;
unsigned long sc_flags; unsigned long sc_flags;
unsigned long driver_data;
u32 intrstatus; u32 intrstatus;
u16 ps_flags; /* PS_* */ u16 ps_flags; /* PS_* */
......
...@@ -307,6 +307,10 @@ struct ath9k_ops_config { ...@@ -307,6 +307,10 @@ struct ath9k_ops_config {
u16 spurchans[AR_EEPROM_MODAL_SPURS][2]; u16 spurchans[AR_EEPROM_MODAL_SPURS][2];
u8 max_txtrig_level; u8 max_txtrig_level;
u16 ani_poll_interval; /* ANI poll interval in ms */ u16 ani_poll_interval; /* ANI poll interval in ms */
/* Platform specific config */
u32 xlna_gpio;
bool xatten_margin_cfg;
}; };
enum ath9k_int { enum ath9k_int {
......
...@@ -513,6 +513,22 @@ static void ath9k_init_misc(struct ath_softc *sc) ...@@ -513,6 +513,22 @@ static void ath9k_init_misc(struct ath_softc *sc)
sc->spec_config.fft_period = 0xF; sc->spec_config.fft_period = 0xF;
} }
static void ath9k_init_platform(struct ath_softc *sc)
{
struct ath_hw *ah = sc->sc_ah;
struct ath_common *common = ath9k_hw_common(ah);
if (common->bus_ops->ath_bus_type != ATH_PCI)
return;
if (sc->driver_data & ATH9K_PCI_CUS198) {
ah->config.xlna_gpio = 9;
ah->config.xatten_margin_cfg = true;
ath_info(common, "Set parameters for CUS198\n");
}
}
static void ath9k_eeprom_request_cb(const struct firmware *eeprom_blob, static void ath9k_eeprom_request_cb(const struct firmware *eeprom_blob,
void *ctx) void *ctx)
{ {
...@@ -604,6 +620,11 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc, ...@@ -604,6 +620,11 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
common->btcoex_enabled = ath9k_btcoex_enable == 1; common->btcoex_enabled = ath9k_btcoex_enable == 1;
common->disable_ani = false; common->disable_ani = false;
/*
* Platform quirks.
*/
ath9k_init_platform(sc);
/* /*
* Enable Antenna diversity only when BTCOEX is disabled * Enable Antenna diversity only when BTCOEX is disabled
* and the user manually requests the feature. * and the user manually requests the feature.
......
...@@ -34,6 +34,34 @@ static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = { ...@@ -34,6 +34,34 @@ static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = {
{ PCI_VDEVICE(ATHEROS, 0x002D) }, /* PCI */ { PCI_VDEVICE(ATHEROS, 0x002D) }, /* PCI */
{ PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */ { PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */
{ PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */ { PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */
/* PCI-E CUS198 */
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
0x0032,
PCI_VENDOR_ID_AZWAVE,
0x2086),
.driver_data = ATH9K_PCI_CUS198 },
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
0x0032,
PCI_VENDOR_ID_AZWAVE,
0x1237),
.driver_data = ATH9K_PCI_CUS198 },
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
0x0032,
PCI_VENDOR_ID_AZWAVE,
0x2126),
.driver_data = ATH9K_PCI_CUS198 },
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
0x0032,
PCI_VENDOR_ID_AZWAVE,
0x2152),
.driver_data = ATH9K_PCI_CUS198 },
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
0x0032,
PCI_VENDOR_ID_FOXCONN,
0xE075),
.driver_data = ATH9K_PCI_CUS198 },
{ PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */ { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */
{ PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E AR9580 */ { PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E AR9580 */
{ PCI_VDEVICE(ATHEROS, 0x0034) }, /* PCI-E AR9462 */ { PCI_VDEVICE(ATHEROS, 0x0034) }, /* PCI-E AR9462 */
...@@ -221,6 +249,7 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) ...@@ -221,6 +249,7 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
sc->hw = hw; sc->hw = hw;
sc->dev = &pdev->dev; sc->dev = &pdev->dev;
sc->mem = pcim_iomap_table(pdev)[0]; sc->mem = pcim_iomap_table(pdev)[0];
sc->driver_data = id->driver_data;
/* Will be cleared in ath9k_start() */ /* Will be cleared in ath9k_start() */
set_bit(SC_OP_INVALID, &sc->sc_flags); set_bit(SC_OP_INVALID, &sc->sc_flags);
......
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