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Commit 9cd70164 authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'imx-dt-3.18' of... 

Merge tag 'imx-dt-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

Merge "ARM: imx: device tree changes for 3.18" from Shawn Guo:

The i.MX device tree changes for 3.18:
 - Device tree support for i.MX ADS and Armadeus APF9328 boards
 - Enable thermal sensor support for i.MX6SL
 - Add LCD support for i.MX6SL EVK board
 - Fix display duplicate name for a bunch of board dts files
 - Configure imx6qdl-sabresd board pins locally to remove the dependency
   on bootloader
 - A set of imx28-tx28 board dts updates from Lothar
 - Add pci config space as platform resource
 - Enable devices RTC, I2C and HDMI for nitrogen6x board
 - Split HummingBoard DT to support s/dl and d/q
 - mSATA and IR input support for HummingBoard
 - Add SSI baud clock for i.MX6 device trees
 - Add USB support for vf610-colibri and vf610-twr boards
 - A set of cleanup and updates on Gateworks boards

* tag 'imx-dt-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (86 commits)
  ARM: dts: imx6: make gpt per clock can be from OSC
  ARM: dts: imx: ventana: add canbus support for GW52xx
  ARM: dts: imx: ventana: cleanup pinctrl groups
  ARM: dts: imx: ventana: configure padconf for all pins
  ARM: dts: imx: ventana: use gpio constants
  ARM: dts: imx: ventana: remove unused aliases
  ARM: dts: imx: ventana: remove unsupported dt nodes
  ARM: dts: imx28-tx28: add alias for CAN XCVR regulator
  ARM: dts: imx28-tx28: add spi-gpio as alternative for spi-mxs
  ARM: dts: imx28-tx28: use GPIO flags
  ARM: dts: imx28-tx28: remove spidev labels and add third instance of spidev
  ARM: dts: imx6sl: add baud clock and clock-names for ssi
  ARM: dts: imx6qdl: add baud clock and clock-names for ssi
  ARM: dts: imx6qdl-sabresd: Configure the pins locally
  ARM: dts: imx28-m28evk: Fix display duplicate name warning
  ARM: dts: imx28-tx28: Fix display duplicate name warning
  ARM: dts: imx28-m28cu: Fix display duplicate name warning
  ARM: dts: imx28-cfa100: Fix display duplicate name warning
  ARM: dts: imx28-apf28dev: Fix display duplicate name warning
  ARM: dts: imx28-apx4devkit: Fix display duplicate name warning
  ...
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 7e9b2828 2b2244a3
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Showing with 3142 additions and 3087 deletions
Documentation/devicetree/bindings/i2c/trivial-devices.txt
View file @ 9cd70164
......@@ -44,7 +44,7 @@ dallas,ds1775 Tiny Digital Thermometer and Thermostat
dallas,ds3232 Extremely Accurate I²C RTC with Integrated Crystal and SRAM
dallas,ds4510 CPU Supervisor with Nonvolatile Memory and Programmable I/O
dallas,ds75 Digital Thermometer and Thermostat
dialog,da9053 DA9053: flexible system level PMIC with multicore support
dlg,da9053 DA9053: flexible system level PMIC with multicore support
epson,rx8025 High-Stability. I2C-Bus INTERFACE REAL TIME CLOCK MODULE
epson,rx8581 I2C-BUS INTERFACE REAL TIME CLOCK MODULE
fsl,mag3110 MAG3110: Xtrinsic High Accuracy, 3D Magnetometer
......
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
View file @ 9cd70164
......@@ -17,7 +17,9 @@ Example:
pcie@0x01000000 {
compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
reg = <0x01ffc000 0x4000>;
reg = <0x01ffc000 0x04000>,
<0x01f00000 0x80000>;
reg-names = "dbi", "config";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
......
Documentation/devicetree/bindings/regulator/da9210.txt
View file @ 9cd70164
......@@ -2,7 +2,7 @@
Required properties:
- compatible: must be "diasemi,da9210"
- compatible: must be "dlg,da9210"
- reg: the i2c slave address of the regulator. It should be 0x68.
Any standard regulator properties can be used to configure the single da9210
......@@ -11,7 +11,7 @@ DCDC.
Example:
da9210@68 {
compatible = "diasemi,da9210";
compatible = "dlg,da9210";
reg = <0x68>;
regulator-min-microvolt = <900000>;
......
Documentation/devicetree/bindings/vendor-prefixes.txt
View file @ 9cd70164
......@@ -38,6 +38,7 @@ dallas Maxim Integrated Products (formerly Dallas Semiconductor)
davicom DAVICOM Semiconductor, Inc.
denx Denx Software Engineering
digi Digi International Inc.
dlg Dialog Semiconductor
dlink D-Link Corporation
dmo Data Modul AG
ebv EBV Elektronik
......
arch/arm/boot/dts/Makefile
View file @ 9cd70164
......@@ -161,6 +161,8 @@ dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb
dtb-$(CONFIG_ARCH_MXC) += \
imx1-ads.dtb \
imx1-apf9328.dtb \
imx25-eukrea-mbimxsd25-baseboard.dtb \
imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dtb \
imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dtb \
......@@ -199,6 +201,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6dl-gw52xx.dtb \
imx6dl-gw53xx.dtb \
imx6dl-gw54xx.dtb \
imx6dl-gw552x.dtb \
imx6dl-hummingboard.dtb \
imx6dl-nitrogen6x.dtb \
imx6dl-phytec-pbab01.dtb \
......@@ -223,6 +226,8 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6q-gw53xx.dtb \
imx6q-gw5400-a.dtb \
imx6q-gw54xx.dtb \
imx6q-gw552x.dtb \
imx6q-hummingboard.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-rex-pro.dtb \
......@@ -240,7 +245,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6q-tx6q-1110.dtb \
imx6sl-evk.dtb \
imx6sx-sdb.dtb \
vf610-colibri.dtb \
vf610-colibri-eval-v3.dtb \
vf610-cosmic.dtb \
vf610-twr.dtb
dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
......
arch/arm/boot/dts/imx1-ads.dts 0 → 100644
View file @ 9cd70164
/*
* Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include "imx1.dtsi"
/ {
model = "Freescale MX1 ADS";
compatible = "fsl,imx1ads", "fsl,imx1";
chosen {
stdout-path = &uart1;
};
memory {
reg = <0x08000000 0x04000000>;
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
clk32 {
compatible = "fsl,imx-clk32", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32000>;
};
};
};
&cspi1 {
pinctrl-0 = <&pinctrl_cspi1>;
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
status = "okay";
};
&i2c {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c>;
status = "okay";
extgpio0: pcf8575@22 {
compatible = "nxp,pcf8575";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
};
extgpio1: pcf8575@24 {
compatible = "nxp,pcf8575";
reg = <0x24>;
gpio-controller;
#gpio-cells = <2>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
fsl,uart-has-rtscts;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
fsl,uart-has-rtscts;
status = "okay";
};
&weim {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_weim>;
status = "okay";
nor: nor@0,0 {
compatible = "cfi-flash";
reg = <0 0x00000000 0x02000000>;
bank-width = <4>;
fsl,weim-cs-timing = <0x00003e00 0x00000801>;
#address-cells = <1>;
#size-cells = <1>;
};
};
&iomuxc {
imx1-ads {
pinctrl_cspi1: cspi1grp {
fsl,pins = <
MX1_PAD_SPI1_MISO__SPI1_MISO 0x0
MX1_PAD_SPI1_MOSI__SPI1_MOSI 0x0
MX1_PAD_SPI1_RDY__SPI1_RDY 0x0
MX1_PAD_SPI1_SCLK__SPI1_SCLK 0x0
MX1_PAD_SPI1_SS__GPIO3_15 0x0
>;
};
pinctrl_i2c: i2cgrp {
fsl,pins = <
MX1_PAD_I2C_SCL__I2C_SCL 0x0
MX1_PAD_I2C_SDA__I2C_SDA 0x0
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX1_PAD_UART1_TXD__UART1_TXD 0x0
MX1_PAD_UART1_RXD__UART1_RXD 0x0
MX1_PAD_UART1_CTS__UART1_CTS 0x0
MX1_PAD_UART1_RTS__UART1_RTS 0x0
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX1_PAD_UART2_TXD__UART2_TXD 0x0
MX1_PAD_UART2_RXD__UART2_RXD 0x0
MX1_PAD_UART2_CTS__UART2_CTS 0x0
MX1_PAD_UART2_RTS__UART2_RTS 0x0
>;
};
pinctrl_weim: weimgrp {
fsl,pins = <
MX1_PAD_A0__A0 0x0
MX1_PAD_A16__A16 0x0
MX1_PAD_A17__A17 0x0
MX1_PAD_A18__A18 0x0
MX1_PAD_A19__A19 0x0
MX1_PAD_A20__A20 0x0
MX1_PAD_A21__A21 0x0
MX1_PAD_A22__A22 0x0
MX1_PAD_A23__A23 0x0
MX1_PAD_A24__A24 0x0
MX1_PAD_BCLK__BCLK 0x0
MX1_PAD_CS4__CS4 0x0
MX1_PAD_DTACK__DTACK 0x0
MX1_PAD_ECB__ECB 0x0
MX1_PAD_LBA__LBA 0x0
>;
};
};
};
arch/arm/boot/dts/imx1-apf9328.dts 0 → 100644
View file @ 9cd70164
/*
* Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include "imx1.dtsi"
/ {
model = "Armadeus APF9328";
compatible = "armadeus,imx1-apf9328", "fsl,imx1";
chosen {
stdout-path = &uart1;
};
memory {
reg = <0x08000000 0x00800000>;
};
};
&i2c {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
fsl,uart-has-rtscts;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
fsl,uart-has-rtscts;
status = "okay";
};
&weim {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_weim>;
status = "okay";
nor: nor@0,0 {
compatible = "cfi-flash";
reg = <0 0x00000000 0x02000000>;
bank-width = <2>;
fsl,weim-cs-timing = <0x00330e04 0x00000d01>;
#address-cells = <1>;
#size-cells = <1>;
};
eth: eth@4,c00000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_eth>;
compatible = "davicom,dm9000";
reg = <
4 0x00c00000 0x2
4 0x00c00002 0x2
>;
interrupt-parent = <&gpio2>;
interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
fsl,weim-cs-timing = <0x0000c700 0x19190d01>;
};
};
&iomuxc {
imx1-apf9328 {
pinctrl_eth: ethgrp {
fsl,pins = <
MX1_PAD_SIM_SVEN__GPIO2_14 0x0
>;
};
pinctrl_i2c: i2cgrp {
fsl,pins = <
MX1_PAD_I2C_SCL__I2C_SCL 0x0
MX1_PAD_I2C_SDA__I2C_SDA 0x0
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX1_PAD_UART1_TXD__UART1_TXD 0x0
MX1_PAD_UART1_RXD__UART1_RXD 0x0
MX1_PAD_UART1_CTS__UART1_CTS 0x0
MX1_PAD_UART1_RTS__UART1_RTS 0x0
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX1_PAD_UART2_TXD__UART2_TXD 0x0
MX1_PAD_UART2_RXD__UART2_RXD 0x0
MX1_PAD_UART2_CTS__UART2_CTS 0x0
MX1_PAD_UART2_RTS__UART2_RTS 0x0
>;
};
pinctrl_weim: weimgrp {
fsl,pins = <
MX1_PAD_A0__A0 0x0
MX1_PAD_A16__A16 0x0
MX1_PAD_A17__A17 0x0
MX1_PAD_A18__A18 0x0
MX1_PAD_A19__A19 0x0
MX1_PAD_A20__A20 0x0
MX1_PAD_A21__A21 0x0
MX1_PAD_A22__A22 0x0
MX1_PAD_A23__A23 0x0
MX1_PAD_A24__A24 0x0
MX1_PAD_BCLK__BCLK 0x0
MX1_PAD_CS4__CS4 0x0
MX1_PAD_DTACK__DTACK 0x0
MX1_PAD_ECB__ECB 0x0
MX1_PAD_LBA__LBA 0x0
>;
};
};
};
arch/arm/boot/dts/imx1-pinfunc.h 0 → 100644
View file @ 9cd70164
This diff is collapsed.
arch/arm/boot/dts/imx1.dtsi 0 → 100644
View file @ 9cd70164
/*
* Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#include "skeleton.dtsi"
#include "imx1-pinfunc.h"
#include <dt-bindings/clock/imx1-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
aliases {
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
gpio3 = &gpio4;
i2c0 = &i2c;
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
spi0 = &cspi1;
spi1 = &cspi2;
};
aitc: aitc-interrupt-controller@00223000 {
compatible = "fsl,imx1-aitc", "fsl,avic";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x00223000 0x1000>;
};
cpus {
#size-cells = <0>;
#address-cells = <1>;
cpu: cpu@0 {
device_type = "cpu";
compatible = "arm,arm920t";
operating-points = <200000 1900000>;
clock-latency = <62500>;
clocks = <&clks IMX1_CLK_MCU>;
voltage-tolerance = <5>;
};
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&aitc>;
ranges;
aipi@00200000 {
compatible = "fsl,aipi-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x00200000 0x10000>;
ranges;
gpt1: timer@00202000 {
compatible = "fsl,imx1-gpt";
reg = <0x00202000 0x1000>;
interrupts = <59>;
clocks = <&clks IMX1_CLK_HCLK>,
<&clks IMX1_CLK_PER1>;
clock-names = "ipg", "per";
};
gpt2: timer@00203000 {
compatible = "fsl,imx1-gpt";
reg = <0x00203000 0x1000>;
interrupts = <58>;
clocks = <&clks IMX1_CLK_HCLK>,
<&clks IMX1_CLK_PER1>;
clock-names = "ipg", "per";
};
fb: fb@00205000 {
compatible = "fsl,imx1-fb";
reg = <0x00205000 0x1000>;
interrupts = <14>;
clocks = <&clks IMX1_CLK_DUMMY>,
<&clks IMX1_CLK_DUMMY>,
<&clks IMX1_CLK_PER2>;
clock-names = "ipg", "ahb", "per";
status = "disabled";
};
uart1: serial@00206000 {
compatible = "fsl,imx1-uart";
reg = <0x00206000 0x1000>;
interrupts = <30 29 26>;
clocks = <&clks IMX1_CLK_HCLK>,
<&clks IMX1_CLK_PER1>;
clock-names = "ipg", "per";
status = "disabled";
};
uart2: serial@00207000 {
compatible = "fsl,imx1-uart";
reg = <0x00207000 0x1000>;
interrupts = <24 23 20>;
clocks = <&clks IMX1_CLK_HCLK>,
<&clks IMX1_CLK_PER1>;
clock-names = "ipg", "per";
status = "disabled";
};
pwm: pwm@00208000 {
#pwm-cells = <2>;
compatible = "fsl,imx1-pwm";
reg = <0x00208000 0x1000>;
interrupts = <34>;
clocks = <&clks IMX1_CLK_DUMMY>,
<&clks IMX1_CLK_PER1>;
clock-names = "ipg", "per";
};
dma: dma@00209000 {
compatible = "fsl,imx1-dma";
reg = <0x00209000 0x1000>;
interrupts = <61 60>;
clocks = <&clks IMX1_CLK_HCLK>,
<&clks IMX1_CLK_DMA_GATE>;
clock-names = "ipg", "ahb";
#dma-cells = <1>;
};
uart3: serial@0020a000 {
compatible = "fsl,imx1-uart";
reg = <0x0020a000 0x1000>;
interrupts = <54 4 1>;
clocks = <&clks IMX1_CLK_UART3_GATE>,
<&clks IMX1_CLK_PER1>;
clock-names = "ipg", "per";
status = "disabled";
};
};
aipi@00210000 {
compatible = "fsl,aipi-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x00210000 0x10000>;
ranges;
cspi1: cspi@00213000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx1-cspi";
reg = <0x00213000 0x1000>;
interrupts = <41>;
clocks = <&clks IMX1_CLK_DUMMY>,
<&clks IMX1_CLK_PER1>;
clock-names = "ipg", "per";
status = "disabled";
};
i2c: i2c@00217000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx1-i2c";
reg = <0x00217000 0x1000>;
interrupts = <39>;
clocks = <&clks IMX1_CLK_HCLK>;
status = "disabled";
};
cspi2: cspi@00219000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx1-cspi";
reg = <0x00219000 0x1000>;
interrupts = <40>;
clocks = <&clks IMX1_CLK_DUMMY>,
<&clks IMX1_CLK_PER1>;
clock-names = "ipg", "per";
status = "disabled";
};
clks: ccm@0021b000 {
compatible = "fsl,imx1-ccm";
reg = <0x0021b000 0x1000>;
#clock-cells = <1>;
};
iomuxc: iomuxc@0021c000 {
compatible = "fsl,imx1-iomuxc";
reg = <0x0021c000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
gpio1: gpio@0021c000 {
compatible = "fsl,imx1-gpio";
reg = <0x0021c000 0x100>;
interrupts = <11>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio2: gpio@0021c100 {
compatible = "fsl,imx1-gpio";
reg = <0x0021c100 0x100>;
interrupts = <12>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio3: gpio@0021c200 {
compatible = "fsl,imx1-gpio";
reg = <0x0021c200 0x100>;
interrupts = <13>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio4: gpio@0021c300 {
compatible = "fsl,imx1-gpio";
reg = <0x0021c300 0x100>;
interrupts = <62>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};
weim: weim@00220000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,imx1-weim";
reg = <0x00220000 0x1000>;
clocks = <&clks IMX1_CLK_DUMMY>;
ranges = <
0 0 0x10000000 0x02000000
1 0 0x12000000 0x01000000
2 0 0x13000000 0x01000000
3 0 0x14000000 0x01000000
4 0 0x15000000 0x01000000
5 0 0x16000000 0x01000000
>;
status = "disabled";
};
esram: esram@00300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x20000>;
};
};
};
arch/arm/boot/dts/imx23-evk.dts
View file @ 9cd70164
......@@ -60,10 +60,10 @@ lcdif@80030000 {
pinctrl-names = "default";
pinctrl-0 = <&lcdif_24bit_pins_a>;
lcd-supply = <&reg_lcd_3v3>;
display = <&display>;
display = <&display0>;
status = "okay";
display: display {
display0: display0 {
bits-per-pixel = <32>;
bus-width = <24>;
......
arch/arm/boot/dts/imx25-pinfunc.h
View file @ 9cd70164
......@@ -247,6 +247,7 @@
#define MX25_PAD_OE_ACD__GPIO_1_25 0x114 0x30c 0x000 0x15 0x000
#define MX25_PAD_CONTRAST__CONTRAST 0x118 0x310 0x000 0x10 0x000
#define MX25_PAD_CONTRAST__CC4 0x118 0x310 0x000 0x11 0x000
#define MX25_PAD_CONTRAST__PWM4_PWMO 0x118 0x310 0x000 0x14 0x000
#define MX25_PAD_CONTRAST__FEC_CRS 0x118 0x310 0x508 0x15 0x001
......@@ -260,6 +261,7 @@
#define MX25_PAD_CSI_D2__CSPI3_MOSI 0x120 0x318 0x000 0x17 0x000
#define MX25_PAD_CSI_D3__CSI_D3 0x124 0x31c 0x000 0x10 0x000
#define MX25_PAD_CSI_D3__UART5_TXD_MUX 0x124 0x31c 0x000 0x11 0x000
#define MX25_PAD_CSI_D3__GPIO_1_28 0x124 0x31c 0x000 0x15 0x000
#define MX25_PAD_CSI_D3__CSPI3_MISO 0x124 0x31c 0x4b4 0x17 0x001
......@@ -269,31 +271,46 @@
#define MX25_PAD_CSI_D4__CSPI3_SCLK 0x128 0x320 0x000 0x17 0x000
#define MX25_PAD_CSI_D5__CSI_D5 0x12c 0x324 0x000 0x10 0x000
#define MX25_PAD_CSI_D5__UART5_CTS 0x12c 0x324 0x000 0x11 0x001
#define MX25_PAD_CSI_D5__GPIO_1_30 0x12c 0x324 0x000 0x15 0x000
#define MX25_PAD_CSI_D5__CSPI3_RDY 0x12c 0x324 0x000 0x17 0x000
#define MX25_PAD_CSI_D6__CSI_D6 0x130 0x328 0x000 0x10 0x000
#define MX25_PAD_CSI_D6__SDHC2_CMD 0x130 0x328 0x4e0 0x12 0x001
#define MX25_PAD_CSI_D6__GPIO_1_31 0x130 0x328 0x000 0x15 0x000
#define MX25_PAD_CSI_D7__CSI_D7 0x134 0x32c 0x000 0x10 0x000
#define MX25_PAD_CSI_D7__SDHC2_DAT_CLK 0x134 0x32C 0x4dc 0x12 0x001
#define MX25_PAD_CSI_D7__GPIO_1_6 0x134 0x32c 0x000 0x15 0x000
#define MX25_PAD_CSI_D8__CSI_D8 0x138 0x330 0x000 0x10 0x000
#define MX25_PAD_CSI_D8__AUD6_RXC 0x138 0x330 0x000 0x12 0x001
#define MX25_PAD_CSI_D8__GPIO_1_7 0x138 0x330 0x000 0x15 0x000
#define MX25_PAD_CSI_D8__CSPI3_SS2 0x138 0x330 0x4c4 0x17 0x000
#define MX25_PAD_CSI_D9__CSI_D9 0x13c 0x334 0x000 0x10 0x000
#define MX25_PAD_CSI_D9__AUD6_RXFS 0x13c 0x334 0x000 0x12 0x001
#define MX25_PAD_CSI_D9__GPIO_4_21 0x13c 0x334 0x000 0x15 0x000
#define MX25_PAD_CSI_D9__CSPI3_SS3 0x13c 0x334 0x4c8 0x17 0x000
#define MX25_PAD_CSI_MCLK__CSI_MCLK 0x140 0x338 0x000 0x10 0x000
#define MX25_PAD_CSI_MCLK__AUD6_TXD 0x140 0x338 0x000 0x11 0x001
#define MX25_PAD_CSI_MCLK__SDHC2_DAT0 0x140 0x338 0x4e4 0x12 0x001
#define MX25_PAD_CSI_MCLK__GPIO_1_8 0x140 0x338 0x000 0x15 0x000
#define MX25_PAD_CSI_VSYNC__CSI_VSYNC 0x144 0x33c 0x000 0x10 0x000
#define MX25_PAD_CSI_VSYNC__AUD6_RXD 0x144 0x33c 0x000 0x11 0x001
#define MX25_PAD_CSI_VSYNC__SDHC2_DAT1 0x144 0x33c 0x4e8 0x12 0x001
#define MX25_PAD_CSI_VSYNC__GPIO_1_9 0x144 0x33c 0x000 0x15 0x000
#define MX25_PAD_CSI_HSYNC__CSI_HSYNC 0x148 0x340 0x000 0x10 0x000
#define MX25_PAD_CSI_HSYNC__AUD6_TXC 0x148 0x340 0x000 0x11 0x001
#define MX25_PAD_CSI_HSYNC__SDHC2_DAT2 0x148 0x340 0x4ec 0x12 0x001
#define MX25_PAD_CSI_HSYNC__GPIO_1_10 0x148 0x340 0x000 0x15 0x000
#define MX25_PAD_CSI_PIXCLK__CSI_PIXCLK 0x14c 0x344 0x000 0x10 0x000
#define MX25_PAD_CSI_PIXCLK__AUD6_TXFS 0x14c 0x344 0x000 0x11 0x001
#define MX25_PAD_CSI_PIXCLK__SDHC2_DAT3 0x14c 0x344 0x4f0 0x12 0x001
#define MX25_PAD_CSI_PIXCLK__GPIO_1_11 0x14c 0x344 0x000 0x15 0x000
#define MX25_PAD_I2C1_CLK__I2C1_CLK 0x150 0x348 0x000 0x10 0x000
......@@ -303,18 +320,24 @@
#define MX25_PAD_I2C1_DAT__GPIO_1_13 0x154 0x34c 0x000 0x15 0x000
#define MX25_PAD_CSPI1_MOSI__CSPI1_MOSI 0x158 0x350 0x000 0x10 0x000
#define MX25_PAD_CSPI1_MOSI__UART3_RXD 0x158 0x350 0x000 0x12 0x000
#define MX25_PAD_CSPI1_MOSI__GPIO_1_14 0x158 0x350 0x000 0x15 0x000
#define MX25_PAD_CSPI1_MISO__CSPI1_MISO 0x15c 0x354 0x000 0x10 0x000
#define MX25_PAD_CSPI1_MISO__UART3_TXD 0x15c 0x354 0x000 0x12 0x000
#define MX25_PAD_CSPI1_MISO__GPIO_1_15 0x15c 0x354 0x000 0x15 0x000
#define MX25_PAD_CSPI1_SS0__CSPI1_SS0 0x160 0x358 0x000 0x10 0x000
#define MX25_PAD_CSPI1_SS0__PWM2_PWMO 0x160 0x358 0x000 0x12 0x000
#define MX25_PAD_CSPI1_SS0__GPIO_1_16 0x160 0x358 0x000 0x15 0x000
#define MX25_PAD_CSPI1_SS1__CSPI1_SS1 0x164 0x35c 0x000 0x10 0x000
#define MX25_PAD_CSPI1_SS1__I2C3_DAT 0x164 0x35C 0x528 0x11 0x001
#define MX25_PAD_CSPI1_SS1__UART3_RTS 0x164 0x35c 0x000 0x12 0x000
#define MX25_PAD_CSPI1_SS1__GPIO_1_17 0x164 0x35c 0x000 0x15 0x000
#define MX25_PAD_CSPI1_SCLK__CSPI1_SCLK 0x168 0x360 0x000 0x10 0x000
#define MX25_PAD_CSPI1_SCLK__UART3_CTS 0x168 0x360 0x000 0x12 0x000
#define MX25_PAD_CSPI1_SCLK__GPIO_1_18 0x168 0x360 0x000 0x15 0x000
#define MX25_PAD_CSPI1_RDY__CSPI1_RDY 0x16c 0x364 0x000 0x10 0x000
......@@ -328,6 +351,7 @@
#define MX25_PAD_UART1_RTS__UART1_RTS 0x178 0x370 0x000 0x10 0x000
#define MX25_PAD_UART1_RTS__CSI_D0 0x178 0x370 0x488 0x11 0x001
#define MX25_PAD_UART1_RTS__CC3 0x178 0x370 0x000 0x12 0x000
#define MX25_PAD_UART1_RTS__GPIO_4_24 0x178 0x370 0x000 0x15 0x000
#define MX25_PAD_UART1_CTS__UART1_CTS 0x17c 0x374 0x000 0x10 0x000
......@@ -342,6 +366,7 @@
#define MX25_PAD_UART2_RTS__UART2_RTS 0x188 0x380 0x000 0x10 0x000
#define MX25_PAD_UART2_RTS__FEC_COL 0x188 0x380 0x504 0x12 0x002
#define MX25_PAD_UART2_RTS__CC1 0x188 0x380 0x000 0x13 0x000
#define MX25_PAD_UART2_RTS__GPIO_4_28 0x188 0x380 0x000 0x15 0x000
#define MX25_PAD_UART2_CTS__FEC_RX_ER 0x18c 0x384 0x518 0x12 0x002
......@@ -349,14 +374,17 @@
#define MX25_PAD_UART2_CTS__GPIO_4_29 0x18c 0x384 0x000 0x15 0x000
#define MX25_PAD_SD1_CMD__SD1_CMD 0x190 0x388 0x000 0x10 0x000
#define MX25_PAD_SD1_CMD__CSPI2_MOSI 0x190 0x388 0x4a0 0x11 0x001
#define MX25_PAD_SD1_CMD__FEC_RDATA2 0x190 0x388 0x50c 0x12 0x002
#define MX25_PAD_SD1_CMD__GPIO_2_23 0x190 0x388 0x000 0x15 0x000
#define MX25_PAD_SD1_CLK__SD1_CLK 0x194 0x38c 0x000 0x10 0x000
#define MX25_PAD_SD1_CLK__CSPI2_MISO 0x194 0x38c 0x49c 0x11 0x001
#define MX25_PAD_SD1_CLK__FEC_RDATA3 0x194 0x38c 0x510 0x12 0x002
#define MX25_PAD_SD1_CLK__GPIO_2_24 0x194 0x38c 0x000 0x15 0x000
#define MX25_PAD_SD1_DATA0__SD1_DATA0 0x198 0x390 0x000 0x10 0x000
#define MX25_PAD_SD1_DATA0__CSPI2_SCLK 0x198 0x390 0x494 0x11 0x001
#define MX25_PAD_SD1_DATA0__GPIO_2_25 0x198 0x390 0x000 0x15 0x000
#define MX25_PAD_SD1_DATA1__SD1_DATA1 0x19c 0x394 0x000 0x10 0x000
......@@ -457,14 +485,15 @@
#define MX25_PAD_GPIO_C__CAN2_TX 0x1fc 0x3f8 0x000 0x16 0x000
#define MX25_PAD_GPIO_D__GPIO_D 0x200 0x3fc 0x000 0x10 0x000
#define MX25_PAD_GPIO_E__LD16 0x204 0x400 0x000 0x02 0x000
#define MX25_PAD_GPIO_D__CAN2_RX 0x200 0x3fc 0x484 0x16 0x001
#define MX25_PAD_GPIO_E__GPIO_E 0x204 0x400 0x000 0x10 0x000
#define MX25_PAD_GPIO_F__LD17 0x208 0x404 0x000 0x02 0x000
#define MX25_PAD_GPIO_E__I2C3_CLK 0x204 0x400 0x524 0x11 0x002
#define MX25_PAD_GPIO_E__LD16 0x204 0x400 0x000 0x12 0x000
#define MX25_PAD_GPIO_E__AUD7_TXD 0x204 0x400 0x000 0x14 0x000
#define MX25_PAD_GPIO_F__GPIO_F 0x208 0x404 0x000 0x10 0x000
#define MX25_PAD_GPIO_F__LD17 0x208 0x404 0x000 0x12 0x000
#define MX25_PAD_GPIO_F__AUD7_TXC 0x208 0x404 0x000 0x14 0x000
#define MX25_PAD_EXT_ARMCLK__EXT_ARMCLK 0x20c 0x000 0x000 0x10 0x000
......
arch/arm/boot/dts/imx25.dtsi
View file @ 9cd70164
......@@ -239,6 +239,7 @@ spi2: cspi@50010000 {
};
ssi2: ssi@50014000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
reg = <0x50014000 0x4000>;
interrupts = <11>;
......@@ -274,6 +275,7 @@ tsc: tsc@50030000 {
};
ssi1: ssi@50034000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
reg = <0x50034000 0x4000>;
interrupts = <12>;
......@@ -453,7 +455,7 @@ gpio2: gpio@53fd0000 {
};
sdma: sdma@53fd4000 {
compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
compatible = "fsl,imx25-sdma";
reg = <0x53fd4000 0x4000>;
clocks = <&clks 112>, <&clks 68>;
clock-names = "ipg", "ahb";
......
arch/arm/boot/dts/imx27-apf27dev.dts
View file @ 9cd70164
......@@ -67,6 +67,16 @@ &cspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cspi1 &pinctrl_cspi1_cs>;
status = "okay";
adc@0 {
compatible = "maxim,max1027";
reg = <0>;
interrupt-parent = <&gpio5>;
interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_max1027>;
spi-max-frequency = <10000000>;
};
};
&cspi2 {
......@@ -189,6 +199,13 @@ MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
>;
};
pinctrl_max1027: max1027 {
fsl,pins = <
MX27_PAD_UART1_CTS__GPIO5_14 0x0 /* CNVST */
MX27_PAD_UART1_RTS__GPIO5_15 0x0 /* EOC */
>;
};
pinctrl_pwm: pwmgrp {
fsl,pins = <
MX27_PAD_PWMO__PWMO 0x0
......
arch/arm/boot/dts/imx28-apf28dev.dts
View file @ 9cd70164
......@@ -83,10 +83,10 @@ lcdif@80030000 {
pinctrl-names = "default";
pinctrl-0 = <&lcdif_16bit_pins_a
&lcdif_pins_apf28dev>;
display = <&display>;
display = <&display0>;
status = "okay";
display: display {
display0: display0 {
bits-per-pixel = <16>;
bus-width = <16>;
......
arch/arm/boot/dts/imx28-apx4devkit.dts
View file @ 9cd70164
......@@ -94,10 +94,10 @@ lcdif@80030000 {
pinctrl-names = "default";
pinctrl-0 = <&lcdif_24bit_pins_a
&lcdif_pins_apx4>;
display = <&display>;
display = <&display0>;
status = "okay";
display: display {
display0: display0 {
bits-per-pixel = <32>;
bus-width = <24>;
......
arch/arm/boot/dts/imx28-cfa10049.dts
View file @ 9cd70164
......@@ -177,10 +177,10 @@ lcdif@80030000 {
pinctrl-0 = <&lcdif_18bit_pins_cfa10049
&lcdif_pins_cfa10049
&lcdif_pins_cfa10049_pullup>;
display = <&display>;
display = <&display0>;
status = "okay";
display: display {
display0: display0 {
bits-per-pixel = <32>;
bus-width = <18>;
......
arch/arm/boot/dts/imx28-cfa10055.dts
View file @ 9cd70164
......@@ -92,10 +92,10 @@ lcdif@80030000 {
pinctrl-0 = <&lcdif_18bit_pins_cfa10055
&lcdif_pins_cfa10055
&lcdif_pins_cfa10055_pullup>;
display = <&display>;
display = <&display0>;
status = "okay";
display: display {
display0: display0 {
bits-per-pixel = <32>;
bus-width = <18>;
......
arch/arm/boot/dts/imx28-cfa10056.dts
View file @ 9cd70164
......@@ -64,10 +64,10 @@ lcdif@80030000 {
pinctrl-0 = <&lcdif_24bit_pins_a
&lcdif_pins_cfa10056
&lcdif_pins_cfa10056_pullup >;
display = <&display>;
display = <&display0>;
status = "okay";
display: display {
display0: display0 {
bits-per-pixel = <32>;
bus-width = <24>;
......
arch/arm/boot/dts/imx28-cfa10057.dts
View file @ 9cd70164
......@@ -78,10 +78,10 @@ lcdif@80030000 {
pinctrl-names = "default";
pinctrl-0 = <&lcdif_18bit_pins_cfa10057
&lcdif_pins_cfa10057>;
display = <&display>;
display = <&display0>;
status = "okay";
display: display {
display0: display0 {
bits-per-pixel = <32>;
bus-width = <18>;
......
arch/arm/boot/dts/imx28-cfa10058.dts
View file @ 9cd70164
......@@ -51,10 +51,10 @@ lcdif@80030000 {
pinctrl-names = "default";
pinctrl-0 = <&lcdif_24bit_pins_a
&lcdif_pins_cfa10058>;
display = <&display>;
display = <&display0>;
status = "okay";
display: display {
display0: display0 {
bits-per-pixel = <32>;
bus-width = <24>;
......
arch/arm/boot/dts/imx28-evk.dts
View file @ 9cd70164
......@@ -124,10 +124,10 @@ lcdif@80030000 {
pinctrl-0 = <&lcdif_24bit_pins_a
&lcdif_pins_evk>;
lcd-supply = <&reg_lcd_3v3>;
display = <&display>;
display = <&display0>;
status = "okay";
display: display {
display0: display0 {
bits-per-pixel = <32>;
bus-width = <24>;
......
arch/arm/boot/dts/imx28-m28cu3.dts
View file @ 9cd70164
......@@ -115,10 +115,10 @@ lcdif@80030000 {
pinctrl-names = "default";
pinctrl-0 = <&lcdif_24bit_pins_a
&lcdif_pins_m28>;
display = <&display>;
display = <&display0>;
status = "okay";
display: display0 {
display0: display0 {
bits-per-pixel = <32>;
bus-width = <24>;
......
arch/arm/boot/dts/imx28-m28evk.dts
View file @ 9cd70164
......@@ -81,10 +81,10 @@ lcdif@80030000 {
pinctrl-names = "default";
pinctrl-0 = <&lcdif_24bit_pins_a
&lcdif_pins_m28>;
display = <&display>;
display = <&display0>;
status = "okay";
display: display {
display0: display0 {
bits-per-pixel = <16>;
bus-width = <18>;
......
arch/arm/boot/dts/imx28-tx28.dts
View file @ 9cd70164
......@@ -21,12 +21,15 @@ / {
aliases {
can0 = &can0;
can1 = &can1;
display = &display;
display = &display0;
ds1339 = &ds1339;
gpio5 = &gpio5;
lcdif = &lcdif;
lcdif_23bit_pins = &tx28_lcdif_23bit_pins;
lcdif_24bit_pins = &lcdif_24bit_pins_a;
reg_can_xcvr = &reg_can_xcvr;
spi_gpio = &spi_gpio;
spi_mxs = &ssp3;
stk5led = &user_led;
usbotg = &usb0;
};
......@@ -37,7 +40,7 @@ memory {
onewire {
compatible = "w1-gpio";
gpios = <&gpio2 7 0>;
gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
......@@ -52,7 +55,7 @@ reg_usb0_vbus: regulator@0 {
regulator-name = "usb0_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio0 18 0>;
gpio = <&gpio0 18 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
......@@ -62,7 +65,7 @@ reg_usb1_vbus: regulator@1 {
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 27 0>;
gpio = <&gpio3 27 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
......@@ -90,7 +93,7 @@ reg_can_xcvr: regulator@4 {
regulator-name = "CAN XCVR";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 0 0>;
gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&tx28_flexcan_xcvr_pins>;
};
......@@ -101,7 +104,7 @@ reg_lcd: regulator@5 {
regulator-name = "LCD POWER";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 31 0>;
gpio = <&gpio1 31 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
......@@ -111,7 +114,7 @@ reg_lcd_reset: regulator@6 {
regulator-name = "LCD RESET";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 30 0>;
gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
startup-delay-us = <300000>;
enable-active-high;
regulator-always-on;
......@@ -143,7 +146,7 @@ leds {
user_led: user {
label = "Heartbeat";
gpios = <&gpio4 10 0>;
gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
......@@ -172,16 +175,16 @@ backlight {
matrix_keypad: matrix-keypad@0 {
compatible = "gpio-matrix-keypad";
col-gpios = <
&gpio5 0 0
&gpio5 1 0
&gpio5 2 0
&gpio5 3 0
&gpio5 0 GPIO_ACTIVE_HIGH
&gpio5 1 GPIO_ACTIVE_HIGH
&gpio5 2 GPIO_ACTIVE_HIGH
&gpio5 3 GPIO_ACTIVE_HIGH
>;
row-gpios = <
&gpio5 4 0
&gpio5 5 0
&gpio5 6 0
&gpio5 7 0
&gpio5 4 GPIO_ACTIVE_HIGH
&gpio5 5 GPIO_ACTIVE_HIGH
&gpio5 6 GPIO_ACTIVE_HIGH
&gpio5 7 GPIO_ACTIVE_HIGH
>;
/* sample keymap */
linux,keymap = <
......@@ -203,6 +206,44 @@ &gpio5 7 0
col-scan-delay-us = <5000>;
linux,no-autorepeat;
};
spi_gpio: spi-gpio {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&tx28_spi_gpio_pins>;
gpio-sck = <&gpio2 24 GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpio2 25 GPIO_ACTIVE_HIGH>;
gpio-miso = <&gpio2 26 GPIO_ACTIVE_HIGH>;
num-chipselects = <3>;
cs-gpios = <
&gpio2 27 GPIO_ACTIVE_LOW
&gpio3 8 GPIO_ACTIVE_LOW
&gpio3 9 GPIO_ACTIVE_LOW
>;
/* enable this and disable ssp3 below, if you need full duplex SPI transfer */
status = "disabled";
spi@0 {
compatible = "spidev";
reg = <0>;
spi-max-frequency = <57600000>;
};
spi@1 {
compatible = "spidev";
reg = <1>;
spi-max-frequency = <57600000>;
};
spi@2 {
compatible = "spidev";
reg = <2>;
spi-max-frequency = <57600000>;
};
};
};
/* 2nd TX-Std UART - (A)UART1 */
......@@ -284,8 +325,8 @@ polytouch: edt-ft5x06@38 {
pinctrl-0 = <&tx28_edt_ft5x06_pins>;
interrupt-parent = <&gpio2>;
interrupts = <5 0>;
reset-gpios = <&gpio2 6 1>;
wake-gpios = <&gpio4 9 0>;
reset-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
wake-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;
};
touchscreen: tsc2007@48 {
......@@ -295,7 +336,7 @@ touchscreen: tsc2007@48 {
pinctrl-0 = <&tx28_tsc2007_pins>;
interrupt-parent = <&gpio3>;
interrupts = <20 0>;
pendown-gpio = <&gpio3 20 1>;
pendown-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>;
ti,x-plate-ohms = /bits/ 16 <660>;
};
......@@ -309,10 +350,10 @@ &lcdif {
pinctrl-names = "default";
pinctrl-0 = <&lcdif_24bit_pins_a &lcdif_sync_pins_a &tx28_lcdif_ctrl_pins>;
lcd-supply = <&reg_lcd>;
display = <&display>;
display = <&display0>;
status = "okay";
display: display@0 {
display0: display0 {
bits-per-pixel = <32>;
bus-width = <24>;
display-timings {
......@@ -558,6 +599,20 @@ MX28_PAD_PWM3__GPIO_3_28
fsl,pull-up = <MXS_PULL_DISABLE>;
};
tx28_spi_gpio_pins: spi-gpiogrp {
fsl,pinmux-ids = <
MX28_PAD_AUART2_RX__GPIO_3_8
MX28_PAD_AUART2_TX__GPIO_3_9
MX28_PAD_SSP3_SCK__GPIO_2_24
MX28_PAD_SSP3_MOSI__GPIO_2_25
MX28_PAD_SSP3_MISO__GPIO_2_26
MX28_PAD_SSP3_SS0__GPIO_2_27
>;
fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
tx28_tsc2007_pins: tx28-tsc2007-pins {
fsl,pinmux-ids = <
MX28_PAD_SAIF0_MCLK__GPIO_3_20 /* TSC2007 IRQ */
......@@ -619,17 +674,23 @@ &ssp3 {
clock-frequency = <57600000>;
status = "okay";
spidev0: spi@0 {
spi@0 {
compatible = "spidev";
reg = <0>;
spi-max-frequency = <57600000>;
};
spidev1: spi@1 {
spi@1 {
compatible = "spidev";
reg = <1>;
spi-max-frequency = <57600000>;
};
spi@2 {
compatible = "spidev";
reg = <2>;
spi-max-frequency = <57600000>;
};
};
&usb0 {
......
arch/arm/boot/dts/imx28.dtsi
View file @ 9cd70164
......@@ -489,6 +489,38 @@ MX28_PAD_SSP0_SCK__SSP0_SCK
fsl,pull-up = <MXS_PULL_DISABLE>;
};
mmc1_4bit_pins_a: mmc1-4bit@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_GPMI_D00__SSP1_D0
MX28_PAD_GPMI_D01__SSP1_D1
MX28_PAD_GPMI_D02__SSP1_D2
MX28_PAD_GPMI_D03__SSP1_D3
MX28_PAD_GPMI_RDY1__SSP1_CMD
MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT
MX28_PAD_GPMI_WRN__SSP1_SCK
>;
fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_ENABLE>;
};
mmc1_cd_cfg: mmc1-cd-cfg {
fsl,pinmux-ids = <
MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT
>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
mmc1_sck_cfg: mmc1-sck-cfg {
fsl,pinmux-ids = <
MX28_PAD_GPMI_WRN__SSP1_SCK
>;
fsl,drive-strength = <MXS_DRIVE_12mA>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
mmc2_4bit_pins_a: mmc2-4bit@0 {
reg = <0>;
fsl,pinmux-ids = <
......@@ -553,6 +585,17 @@ MX28_PAD_PWM1__I2C1_SDA
fsl,pull-up = <MXS_PULL_ENABLE>;
};
i2c1_pins_b: i2c1@1 {
reg = <1>;
fsl,pinmux-ids = <
MX28_PAD_AUART2_CTS__I2C1_SCL
MX28_PAD_AUART2_RTS__I2C1_SDA
>;
fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_ENABLE>;
};
saif0_pins_a: saif0@0 {
reg = <0>;
fsl,pinmux-ids = <
......
arch/arm/boot/dts/imx35.dtsi
View file @ 9cd70164
......@@ -114,6 +114,7 @@ i2c2: i2c@43f98000 {
};
ssi1: ssi@43fa0000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx35-ssi", "fsl,imx21-ssi";
reg = <0x43fa0000 0x4000>;
interrupts = <11>;
......
arch/arm/boot/dts/imx50.dtsi
View file @ 9cd70164
......@@ -145,6 +145,7 @@ ecspi1: ecspi@50010000 {
};
ssi2: ssi@50014000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx50-ssi",
"fsl,imx51-ssi",
"fsl,imx21-ssi";
......@@ -454,6 +455,7 @@ i2c1: i2c@63fc8000 {
};
ssi1: ssi@63fcc000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx50-ssi", "fsl,imx51-ssi",
"fsl,imx21-ssi";
reg = <0x63fcc000 0x4000>;
......
arch/arm/boot/dts/imx51.dtsi
View file @ 9cd70164
......@@ -210,6 +210,7 @@ ecspi1: ecspi@70010000 {
};
ssi2: ssi@70014000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
reg = <0x70014000 0x4000>;
interrupts = <30>;
......@@ -499,6 +500,7 @@ i2c1: i2c@83fc8000 {
};
ssi1: ssi@83fcc000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
reg = <0x83fcc000 0x4000>;
interrupts = <29>;
......@@ -554,6 +556,7 @@ pata: pata@83fe0000 {
};
ssi3: ssi@83fe8000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
reg = <0x83fe8000 0x4000>;
interrupts = <96>;
......
arch/arm/boot/dts/imx53-smd.dts
View file @ 9cd70164
......@@ -265,7 +265,7 @@ camera: ov5642@3c {
};
pmic: dialog@48 {
compatible = "dialog,da9053", "dialog,da9052";
compatible = "dlg,da9053", "dlg,da9052";
reg = <0x48>;
};
};
......
arch/arm/boot/dts/imx53.dtsi
View file @ 9cd70164
......@@ -221,6 +221,7 @@ ecspi1: ecspi@50010000 {
};
ssi2: ssi@50014000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx53-ssi",
"fsl,imx51-ssi",
"fsl,imx21-ssi";
......@@ -661,6 +662,7 @@ i2c1: i2c@63fc8000 {
};
ssi1: ssi@63fcc000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx53-ssi", "fsl,imx51-ssi",
"fsl,imx21-ssi";
reg = <0x63fcc000 0x4000>;
......@@ -688,6 +690,7 @@ nfc: nand@63fdb000 {
};
ssi3: ssi@63fe8000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx53-ssi", "fsl,imx51-ssi",
"fsl,imx21-ssi";
reg = <0x63fe8000 0x4000>;
......@@ -744,5 +747,10 @@ ocram: sram@f8000000 {
reg = <0xf8000000 0x20000>;
clocks = <&clks IMX5_CLK_OCRAM>;
};
pmu {
compatible = "arm,cortex-a8-pmu";
interrupts = <77>;
};
};
};
arch/arm/boot/dts/imx6dl-gw552x.dts 0 → 100644
View file @ 9cd70164
/*
* Copyright 2014 Gateworks Corporation
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-gw552x.dtsi"
/ {
model = "Gateworks Ventana i.MX6 DualLite/Solo GW552X";
compatible = "gw,imx6dl-gw552x", "gw,ventana", "fsl,imx6dl";
};
arch/arm/boot/dts/imx6dl-hummingboard.dts
View file @ 9cd70164
/*
* Copyright (C) 2013,2014 Russell King
* Copyright (C) 2014 Rabeeh Khoury (rabeeh@solid-run.com)
* Based on dt work by Russell King
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-microsom.dtsi"
#include "imx6qdl-microsom-ar8035.dtsi"
#include "imx6qdl-hummingboard.dtsi"
/ {
model = "SolidRun HummingBoard DL/Solo";
compatible = "solidrun,hummingboard", "fsl,imx6dl";
chosen {
stdout-path = &uart1;
};
ir_recv: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio1 2 1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_gpio1_2>;
};
regulators {
compatible = "simple-bus";
reg_3p3v: 3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_usbh1_vbus: usb-h1-vbus {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 0 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbh1_vbus>;
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_usbotg_vbus: usb-otg-vbus {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio3 22 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbotg_vbus>;
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};
sound-spdif {
compatible = "fsl,imx-audio-spdif";
model = "On-board SPDIF";
/* IMX6 doesn't implement this yet */
spdif-controller = <&spdif>;
spdif-out;
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_flexcan1>;
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_hdmi>;
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_i2c1>;
/*
* Not fitted on Carrier-1 board... yet
status = "okay";
rtc: pcf8523@68 {
compatible = "nxp,pcf8523";
reg = <0x68>;
};
*/
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_i2c2>;
status = "okay";
};
&iomuxc {
hummingboard {
pinctrl_hummingboard_flexcan1: hummingboard-flexcan1 {
fsl,pins = <
MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x80000000
MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x80000000
>;
};
pinctrl_hummingboard_gpio1_2: hummingboard-gpio1_2 {
fsl,pins = <
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
>;
};
pinctrl_hummingboard_hdmi: hummingboard-hdmi {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
>;
};
pinctrl_hummingboard_i2c1: hummingboard-i2c1 {
fsl,pins = <
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>;
};
pinctrl_hummingboard_i2c2: hummingboard-i2c2 {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_hummingboard_spdif: hummingboard-spdif {
fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
};
pinctrl_hummingboard_usbh1_vbus: hummingboard-usbh1-vbus {
fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
};
pinctrl_hummingboard_usbotg_id: hummingboard-usbotg-id {
/*
* Similar to pinctrl_usbotg_2, but we want it
* pulled down for a fixed host connection.
*/
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
};
pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus {
fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
};
pinctrl_hummingboard_usdhc2_aux: hummingboard-usdhc2-aux {
fsl,pins = <
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071
>;
};
pinctrl_hummingboard_usdhc2: hummingboard-usdhc2 {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
>;
};
};
};
&spdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_spdif>;
status = "okay";
};
&usbh1 {
disable-over-current;
vbus-supply = <&reg_usbh1_vbus>;
status = "okay";
};
&usbotg {
disable-over-current;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>;
vbus-supply = <&reg_usbotg_vbus>;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <
&pinctrl_hummingboard_usdhc2_aux
&pinctrl_hummingboard_usdhc2
>;
vmmc-supply = <&reg_3p3v>;
cd-gpios = <&gpio1 4 0>;
status = "okay";
model = "SolidRun HummingBoard Solo/DualLite";
compatible = "solidrun,hummingboard/dl", "fsl,imx6dl";
};
arch/arm/boot/dts/imx6q-gw5400-a.dts
View file @ 9cd70164
......@@ -10,6 +10,7 @@
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx6q.dtsi"
/ {
......@@ -18,7 +19,6 @@ / {
/* these are used by bootloader for disabling nodes */
aliases {
ethernet0 = &fec;
ethernet1 = &eth1;
i2c0 = &i2c1;
i2c1 = &i2c2;
......@@ -26,12 +26,10 @@ aliases {
led0 = &led0;
led1 = &led1;
led2 = &led2;
sky2 = &eth1;
ssi0 = &ssi1;
spi0 = &ecspi1;
usb0 = &usbh1;
usb1 = &usbotg;
usdhc2 = &usdhc3;
};
chosen {
......@@ -40,23 +38,25 @@ chosen {
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
label = "user1";
gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 -> MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
label = "user2";
gpios = <&gpio4 10 0>; /* 106 -> MX6_PANLEDR */
gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* 106 -> MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
label = "user3";
gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* 111 -> MX6_LOCLED# */
default-state = "off";
};
};
......@@ -67,7 +67,9 @@ memory {
pps {
compatible = "pps-gpio";
gpios = <&gpio1 5 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
......@@ -109,7 +111,7 @@ reg_usb_otg_vbus: regulator@3 {
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 0>;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
......@@ -137,7 +139,7 @@ &audmux {
&ecspi1 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio3 19 0>;
cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
......@@ -153,7 +155,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio1 30 0>;
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
status = "okay";
};
......@@ -199,11 +201,6 @@ gpio: pca9555@23 {
#gpio-cells = <2>;
};
hwmon: gsc@29 {
compatible = "gw,gsp";
reg = <0x29>;
};
rtc: ds1672@68 {
compatible = "dallas,ds1672";
reg = <0x68>;
......@@ -314,16 +311,6 @@ vgen6_reg: vgen6 {
};
};
};
pciswitch: pex8609@3f {
compatible = "plx,pex8609";
reg = <0x3f>;
};
pciclkgen: si52147@6b {
compatible = "sil,si52147";
reg = <0x6b>;
};
};
&i2c3 {
......@@ -345,51 +332,73 @@ codec: sgtl5000@0a {
VDDIO-supply = <&reg_3p3v>;
};
hdmiin: adv7611@4c {
compatible = "adi,adv7611";
reg = <0x4c>;
};
touchscreen: egalax_ts@04 {
compatible = "eeti,egalax_ts";
reg = <0x04>;
interrupt-parent = <&gpio7>;
interrupts = <12 2>; /* gpio7_12 active low */
wakeup-gpios = <&gpio7 12 0>;
interrupts = <12 2>;
wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
};
};
videoout: adv7393@2a {
compatible = "adi,adv7393";
reg = <0x2a>;
};
&ldb {
status = "okay";
};
videoin: adv7180@20 {
compatible = "adi,adv7180";
reg = <0x20>;
&pcie {
reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
status = "okay";
eth1: sky2@8 { /* MAC/PHY on bus 8 */
compatible = "marvell,sky2";
};
};
&iomuxc {
&ssi1 {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
pinctrl-0 = <&pinctrl_uart5>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
};
&iomuxc {
imx6q-gw5400-a {
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 /* GPS_PPS */
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* user2 led */
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */
MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */
>;
};
pinctrl_audmux: audmuxgrp {
fsl,pins = <
......@@ -397,6 +406,7 @@ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
>;
};
......@@ -405,6 +415,7 @@ pinctrl_ecspi1: ecspi1grp {
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0 /* SPINOR_CS0# */
>;
};
......@@ -429,6 +440,14 @@ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
>;
};
pinctrl_gpio_leds: gpioledsgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 /* user1 led */
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 /* user2 led */
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 /* user3 led */
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
......@@ -450,6 +469,19 @@ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
>;
};
pinctrl_pps: ppsgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0 /* GPS_PPS */
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
......@@ -474,6 +506,7 @@ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
>;
};
......@@ -489,59 +522,3 @@ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
};
};
};
&ldb {
status = "okay";
};
&pcie {
reset-gpio = <&gpio1 29 0>;
status = "okay";
eth1: sky2@8 { /* MAC/PHY on bus 8 */
compatible = "marvell,sky2";
};
};
&ssi1 {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
cd-gpios = <&gpio7 0 0>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
};
arch/arm/boot/dts/imx6q-gw552x.dts 0 → 100644
View file @ 9cd70164
/*
* Copyright 2014 Gateworks Corporation
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-gw552x.dtsi"
/ {
model = "Gateworks Ventana i.MX6 Dual/Quad GW552X";
compatible = "gw,imx6q-gw552x", "gw,ventana", "fsl,imx6q";
};
&sata {
status = "okay";
};
arch/arm/boot/dts/imx6q-hummingboard.dts 0 → 100644
View file @ 9cd70164
/*
* Copyright (C) 2014 Rabeeh Khoury (rabeeh@solid-run.com)
* Based on dt work by Russell King
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-hummingboard.dtsi"
/ {
model = "SolidRun HummingBoard Dual/Quad";
compatible = "solidrun,hummingboard/q", "fsl,imx6q";
};
&sata {
status = "okay";
fsl,transmit-level-mV = <1025>;
fsl,transmit-boost-mdB = <3330>;
fsl,transmit-atten-16ths = <9>;
fsl,receive-eq-mdB = <3000>;
};
arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
View file @ 9cd70164
......@@ -9,11 +9,11 @@
* http://www.gnu.org/copyleft/gpl.html
*/
#include <dt-bindings/gpio/gpio.h>
/ {
/* these are used by bootloader for disabling nodes */
aliases {
can0 = &can1;
ethernet0 = &fec;
led0 = &led0;
led1 = &led1;
nand = &gpmi;
......@@ -27,17 +27,19 @@ chosen {
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
label = "user1";
gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
label = "user2";
gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
};
......@@ -48,7 +50,9 @@ memory {
pps {
compatible = "pps-gpio";
gpios = <&gpio1 26 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pps>;
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
status = "okay";
};
......@@ -81,7 +85,7 @@ reg_usb_otg_vbus: regulator@2 {
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 0>;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
......@@ -91,7 +95,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio1 30 0>;
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
status = "okay";
};
......@@ -143,11 +147,6 @@ gpio: pca9555@23 {
#gpio-cells = <2>;
};
hwmon: gsc@29 {
compatible = "gw,gsp";
reg = <0x29>;
};
rtc: ds1672@68 {
compatible = "dallas,ds1672";
reg = <0x68>;
......@@ -159,85 +158,60 @@ &i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
};
pmic: ltc3676@3c {
compatible = "lltc,ltc3676";
reg = <0x3c>;
regulators {
sw1_reg: ltc3676__sw1 {
regulator-min-microvolt = <1175000>;
regulator-max-microvolt = <1175000>;
regulator-boot-on;
regulator-always-on;
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
};
sw2_reg: ltc3676__sw2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
status = "okay";
};
sw3_reg: ltc3676__sw3 {
regulator-min-microvolt = <1175000>;
regulator-max-microvolt = <1175000>;
regulator-boot-on;
regulator-always-on;
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
sw4_reg: ltc3676__sw4 {
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
regulator-always-on;
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
ldo2_reg: ltc3676__ldo2 {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-boot-on;
regulator-always-on;
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "okay";
};
ldo4_reg: ltc3676__ldo4 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
};
};
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
status = "okay";
};
&i2c3 {
clock-frequency = <100000>;
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
status = "okay";
};
videoin: adv7180@20 {
compatible = "adi,adv7180";
reg = <0x20>;
};
&usbh1 {
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
imx6qdl-gw51xx {
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */
MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000 /* PCIE_RST# */
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
......@@ -256,6 +230,14 @@ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 /* PHY Reset */
>;
};
pinctrl_gpio_leds: gpioledsgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
>;
};
......@@ -301,6 +283,18 @@ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
>;
};
pinctrl_pps: ppsgrp {
fsl,pins = <
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
......@@ -332,48 +326,8 @@ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
>;
};
};
};
&pcie {
reset-gpio = <&gpio1 0 0>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
status = "okay";
};
&usbh1 {
status = "okay";
};
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
View file @ 9cd70164
......@@ -9,10 +9,11 @@
* http://www.gnu.org/copyleft/gpl.html
*/
#include <dt-bindings/gpio/gpio.h>
/ {
/* these are used by bootloader for disabling nodes */
aliases {
ethernet0 = &fec;
led0 = &led0;
led1 = &led1;
led2 = &led2;
......@@ -20,7 +21,6 @@ aliases {
ssi0 = &ssi1;
usb0 = &usbh1;
usb1 = &usbotg;
usdhc2 = &usdhc3;
};
chosen {
......@@ -36,23 +36,25 @@ backlight {
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
label = "user1";
gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
label = "user2";
gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
label = "user3";
gpios = <&gpio4 15 1>; /* 111 - MX6_LOCLED# */
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";
};
};
......@@ -63,7 +65,9 @@ memory {
pps {
compatible = "pps-gpio";
gpios = <&gpio1 26 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pps>;
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
status = "okay";
};
......@@ -115,7 +119,7 @@ reg_usb_otg_vbus: regulator@4 {
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 0>;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
......@@ -141,11 +145,17 @@ &audmux {
status = "okay";
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
status = "okay";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio1 30 0>;
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
status = "okay";
};
......@@ -197,11 +207,6 @@ gpio: pca9555@23 {
#gpio-cells = <2>;
};
hwmon: gsc@29 {
compatible = "gw,gsp";
reg = <0x29>;
};
rtc: ds1672@68 {
compatible = "dallas,ds1672";
reg = <0x68>;
......@@ -213,65 +218,6 @@ &i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
pciswitch: pex8609@3f {
compatible = "plx,pex8609";
reg = <0x3f>;
};
pmic: ltc3676@3c {
compatible = "lltc,ltc3676";
reg = <0x3c>;
regulators {
sw1_reg: ltc3676__sw1 {
regulator-min-microvolt = <1175000>;
regulator-max-microvolt = <1175000>;
regulator-boot-on;
regulator-always-on;
};
sw2_reg: ltc3676__sw2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
sw3_reg: ltc3676__sw3 {
regulator-min-microvolt = <1175000>;
regulator-max-microvolt = <1175000>;
regulator-boot-on;
regulator-always-on;
};
sw4_reg: ltc3676__sw4 {
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
regulator-always-on;
};
ldo2_reg: ltc3676__ldo2 {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-boot-on;
regulator-always-on;
};
ldo3_reg: ltc3676__ldo3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
ldo4_reg: ltc3676__ldo4 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
};
};
};
};
&i2c3 {
......@@ -280,11 +226,6 @@ &i2c3 {
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
accelerometer: fxos8700@1e {
compatible = "fsl,fxos8700";
reg = <0x13>;
};
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
......@@ -297,49 +238,101 @@ touchscreen: egalax_ts@04 {
compatible = "eeti,egalax_ts";
reg = <0x04>;
interrupt-parent = <&gpio7>;
interrupts = <12 2>; /* gpio7_12 active low */
wakeup-gpios = <&gpio7 12 0>;
interrupts = <12 2>;
wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
};
};
videoin: adv7180@20 {
compatible = "adi,adv7180";
reg = <0x20>;
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: hsd100pxn1 {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
};
&iomuxc {
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
status = "okay";
};
imx6qdl-gw52xx {
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */
MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x80000000 /* VIDDEC_PDN# */
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_PWDN */
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* USB_SEL_PCI */
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* LVDS_TCH# */
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_CD# */
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x80000000 /* UART2_EN# */
>;
};
&pwm4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4>;
status = "okay";
};
&ssi1 {
fsl,mode = "i2s-slave";
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
status = "okay";
};
&usbh1 {
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
};
&iomuxc {
imx6qdl-gw52xx {
pinctrl_audmux: audmuxgrp {
fsl,pins = <
MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
>;
};
......@@ -361,6 +354,23 @@ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 /* PHY Reset */
>;
};
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* CAN_STBY */
>;
};
pinctrl_gpio_leds: gpioledsgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
>;
};
......@@ -406,6 +416,18 @@ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE_RST# */
>;
};
pinctrl_pps: ppsgrp {
fsl,pins = <
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
>;
};
pinctrl_pwm4: pwm4grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
......@@ -436,6 +458,7 @@ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
>;
};
......@@ -447,85 +470,8 @@ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
>;
};
};
};
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: hsd100pxn1 {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
};
&pcie {
reset-gpio = <&gpio1 29 0>;
status = "okay";
};
&pwm4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4>;
status = "okay";
};
&ssi1 {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
status = "okay";
};
&usbh1 {
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
cd-gpios = <&gpio7 0 0>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
};
arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
View file @ 9cd70164
This diff is collapsed.
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
View file @ 9cd70164
......@@ -9,21 +9,19 @@
* http://www.gnu.org/copyleft/gpl.html
*/
#include <dt-bindings/gpio/gpio.h>
/ {
/* these are used by bootloader for disabling nodes */
aliases {
can0 = &can1;
ethernet0 = &fec;
ethernet1 = &eth1;
led0 = &led0;
led1 = &led1;
led2 = &led2;
nand = &gpmi;
sky2 = &eth1;
ssi0 = &ssi1;
usb0 = &usbh1;
usb1 = &usbotg;
usdhc2 = &usdhc3;
};
chosen {
......@@ -39,23 +37,25 @@ backlight {
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
label = "user1";
gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
label = "user2";
gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
label = "user3";
gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";
};
};
......@@ -66,7 +66,9 @@ memory {
pps {
compatible = "pps-gpio";
gpios = <&gpio1 26 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pps>;
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
status = "okay";
};
......@@ -108,7 +110,7 @@ reg_usb_otg_vbus: regulator@3 {
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 0>;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
......@@ -144,7 +146,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio1 30 0>;
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
status = "okay";
};
......@@ -196,11 +198,6 @@ gpio: pca9555@23 {
#gpio-cells = <2>;
};
hwmon: gsc@29 {
compatible = "gw,gsp";
reg = <0x29>;
};
rtc: ds1672@68 {
compatible = "dallas,ds1672";
reg = <0x68>;
......@@ -311,16 +308,6 @@ vgen6_reg: vgen6 {
};
};
};
pciswitch: pex8609@3f {
compatible = "plx,pex8609";
reg = <0x3f>;
};
pciclkgen: si52147@6b {
compatible = "sil,si52147";
reg = <0x6b>;
};
};
&i2c3 {
......@@ -329,11 +316,6 @@ &i2c3 {
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
accelerometer: fxos8700@1e {
compatible = "fsl,fxos8700";
reg = <0x1e>;
};
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
......@@ -342,59 +324,115 @@ codec: sgtl5000@0a {
VDDIO-supply = <&reg_3p3v>;
};
hdmiin: adv7611@4c {
compatible = "adi,adv7611";
reg = <0x4c>;
};
touchscreen: egalax_ts@04 {
compatible = "eeti,egalax_ts";
reg = <0x04>;
interrupt-parent = <&gpio7>;
interrupts = <12 2>; /* gpio7_12 active low */
wakeup-gpios = <&gpio7 12 0>;
interrupts = <12 2>;
wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
};
};
videoout: adv7393@2a {
compatible = "adi,adv7393";
reg = <0x2a>;
};
&ldb {
status = "okay";
lvds-channel@1 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "okay";
videoin: adv7180@20 {
compatible = "adi,adv7180";
reg = <0x20>;
display-timings {
native-mode = <&timing0>;
timing0: hsd100pxn1 {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
};
&iomuxc {
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
status = "okay";
imx6qdl-gw54xx {
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */
MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */
>;
eth1: sky2@8 { /* MAC/PHY on bus 8 */
compatible = "marvell,sky2";
};
};
&pwm4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4>;
status = "okay";
};
&ssi1 {
fsl,mode = "i2s-slave";
status = "okay";
};
&ssi2 {
fsl,mode = "i2s-slave";
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
};
&iomuxc {
imx6qdl-gw54xx {
pinctrl_audmux: audmuxgrp {
fsl,pins = <
MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
>;
};
......@@ -421,8 +459,17 @@ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
>;
};
pinctrl_gpio_leds: gpioledsgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
>;
};
......@@ -468,6 +515,19 @@ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
>;
};
pinctrl_pps: ppsgrp {
fsl,pins = <
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
>;
};
pinctrl_pwm4: pwm4grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
......@@ -498,6 +558,7 @@ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
>;
};
......@@ -513,90 +574,3 @@ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
};
};
};
&ldb {
status = "okay";
lvds-channel@1 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: hsd100pxn1 {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
};
&pcie {
reset-gpio = <&gpio1 29 0>;
status = "okay";
eth1: sky2@8 { /* MAC/PHY on bus 8 */
compatible = "marvell,sky2";
};
};
&pwm4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4>;
status = "okay";
};
&ssi1 {
status = "okay";
};
&ssi2 {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
cd-gpios = <&gpio7 0 0>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
};
arch/arm/boot/dts/imx6qdl-gw552x.dtsi 0 → 100644
View file @ 9cd70164
/*
* Copyright 2014 Gateworks Corporation
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#include <dt-bindings/gpio/gpio.h>
/ {
/* these are used by bootloader for disabling nodes */
aliases {
led0 = &led0;
led1 = &led1;
led2 = &led2;
nand = &gpmi;
usb0 = &usbh1;
usb1 = &usbotg;
};
chosen {
bootargs = "console=ttymxc1,115200";
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";
};
};
memory {
reg = <0x10000000 0x20000000>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_1p0v: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "1P0V";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
reg_3p3v: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_5p0v: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "5P0V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
};
};
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
status = "okay";
};
&hdmi {
ddc-i2c-bus = <&i2c3>;
status = "okay";
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
eeprom1: eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
eeprom2: eeprom@51 {
compatible = "atmel,24c02";
reg = <0x51>;
pagesize = <16>;
};
eeprom3: eeprom@52 {
compatible = "atmel,24c02";
reg = <0x52>;
pagesize = <16>;
};
eeprom4: eeprom@53 {
compatible = "atmel,24c02";
reg = <0x53>;
pagesize = <16>;
};
gpio: pca9555@23 {
compatible = "nxp,pca9555";
reg = <0x23>;
gpio-controller;
#gpio-cells = <2>;
};
rtc: ds1672@68 {
compatible = "dallas,ds1672";
reg = <0x68>;
};
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
status = "okay"; };
&usbh1 {
status = "okay";
};
&iomuxc {
imx6qdl-gw552x {
pinctrl_gpio_leds: gpioledsgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
>;
};
pinctrl_gpmi_nand: gpminandgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
>;
};
pinctrl_uart5: uart5grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
>;
};
};
};
arch/arm/boot/dts/imx6qdl-hummingboard.dtsi 0 → 100644
View file @ 9cd70164
/*
* Copyright (C) 2013,2014 Russell King
*/
#include "imx6qdl-microsom.dtsi"
#include "imx6qdl-microsom-ar8035.dtsi"
/ {
chosen {
stdout-path = &uart1;
};
ir_recv: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio3 5 1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_gpio3_5>;
};
regulators {
compatible = "simple-bus";
reg_3p3v: 3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_usbh1_vbus: usb-h1-vbus {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 0 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbh1_vbus>;
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_usbotg_vbus: usb-otg-vbus {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio3 22 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbotg_vbus>;
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};
sound-spdif {
compatible = "fsl,imx-audio-spdif";
model = "On-board SPDIF";
/* IMX6 doesn't implement this yet */
spdif-controller = <&spdif>;
spdif-out;
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_flexcan1>;
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_hdmi>;
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_i2c1>;
/*
* Not fitted on Carrier-1 board... yet
status = "okay";
rtc: pcf8523@68 {
compatible = "nxp,pcf8523";
reg = <0x68>;
};
*/
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_i2c2>;
status = "okay";
};
&iomuxc {
hummingboard {
pinctrl_hummingboard_flexcan1: hummingboard-flexcan1 {
fsl,pins = <
MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x80000000
MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x80000000
>;
};
pinctrl_hummingboard_gpio3_5: hummingboard-gpio3_5 {
fsl,pins = <
MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b0b1
>;
};
pinctrl_hummingboard_hdmi: hummingboard-hdmi {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
>;
};
pinctrl_hummingboard_i2c1: hummingboard-i2c1 {
fsl,pins = <
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>;
};
pinctrl_hummingboard_i2c2: hummingboard-i2c2 {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_hummingboard_spdif: hummingboard-spdif {
fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
};
pinctrl_hummingboard_usbh1_vbus: hummingboard-usbh1-vbus {
fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
};
pinctrl_hummingboard_usbotg_id: hummingboard-usbotg-id {
/*
* Similar to pinctrl_usbotg_2, but we want it
* pulled down for a fixed host connection.
*/
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
};
pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus {
fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
};
pinctrl_hummingboard_usdhc2_aux: hummingboard-usdhc2-aux {
fsl,pins = <
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071
>;
};
pinctrl_hummingboard_usdhc2: hummingboard-usdhc2 {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
>;
};
};
};
&spdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_spdif>;
status = "okay";
};
&usbh1 {
disable-over-current;
vbus-supply = <&reg_usbh1_vbus>;
status = "okay";
};
&usbotg {
disable-over-current;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>;
vbus-supply = <&reg_usbotg_vbus>;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <
&pinctrl_hummingboard_usdhc2_aux
&pinctrl_hummingboard_usdhc2
>;
vmmc-supply = <&reg_3p3v>;
cd-gpios = <&gpio1 4 0>;
status = "okay";
};
arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
View file @ 9cd70164
......@@ -174,6 +174,11 @@ &fec {
status = "okay";
};
&hdmi {
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
......@@ -187,6 +192,25 @@ codec: sgtl5000@0a {
VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>;
};
rtc: rtc@6f {
compatible = "isil,isl1208";
reg = <0x6f>;
};
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
};
&iomuxc {
......@@ -266,6 +290,20 @@ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
......
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
View file @ 9cd70164
......@@ -83,7 +83,7 @@ eeprom@50 {
};
pmic@58 {
compatible = "dialog,da9063";
compatible = "dlg,da9063";
reg = <0x58>;
interrupt-parent = <&gpio4>;
interrupts = <17 0x8>; /* active-low GPIO4_17 */
......
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
View file @ 9cd70164
......@@ -54,6 +54,19 @@ reg_audio: regulator@2 {
gpio = <&gpio4 10 0>;
enable-active-high;
};
reg_pcie: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie_reg>;
regulator-name = "MPCIE_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 19 0>;
regulator-always-on;
enable-active-high;
};
};
gpio-keys {
......@@ -314,15 +327,15 @@ &iomuxc {
imx6qdl-sabresd {
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
>;
};
......@@ -367,9 +380,9 @@ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
pinctrl_gpio_keys: gpio_keysgrp {
fsl,pins = <
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
>;
};
......@@ -396,7 +409,13 @@ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
>;
};
pinctrl_pcie_reg: pciereggrp {
fsl,pins = <
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0
>;
};
......@@ -468,7 +487,7 @@ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
gpio_leds {
pinctrl_gpio_leds: gpioledsgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
>;
};
};
......
arch/arm/boot/dts/imx6qdl.dtsi
View file @ 9cd70164
......@@ -137,7 +137,9 @@ L2: l2-cache@00a02000 {
pcie: pcie@0x01000000 {
compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
reg = <0x01ffc000 0x4000>; /* DBI */
reg = <0x01ffc000 0x04000>,
<0x01f00000 0x80000>;
reg-names = "dbi", "config";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
......@@ -273,11 +275,14 @@ esai: esai@02024000 {
};
ssi1: ssi@02028000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx6q-ssi",
"fsl,imx51-ssi";
reg = <0x02028000 0x4000>;
interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_SSI1_IPG>;
clocks = <&clks IMX6QDL_CLK_SSI1_IPG>,
<&clks IMX6QDL_CLK_SSI1>;
clock-names = "ipg", "baud";
dmas = <&sdma 37 1 0>,
<&sdma 38 1 0>;
dma-names = "rx", "tx";
......@@ -286,11 +291,14 @@ ssi1: ssi@02028000 {
};
ssi2: ssi@0202c000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx6q-ssi",
"fsl,imx51-ssi";
reg = <0x0202c000 0x4000>;
interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_SSI2_IPG>;
clocks = <&clks IMX6QDL_CLK_SSI2_IPG>,
<&clks IMX6QDL_CLK_SSI2>;
clock-names = "ipg", "baud";
dmas = <&sdma 41 1 0>,
<&sdma 42 1 0>;
dma-names = "rx", "tx";
......@@ -299,11 +307,14 @@ ssi2: ssi@0202c000 {
};
ssi3: ssi@02030000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx6q-ssi",
"fsl,imx51-ssi";
reg = <0x02030000 0x4000>;
interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_SSI3_IPG>;
clocks = <&clks IMX6QDL_CLK_SSI3_IPG>,
<&clks IMX6QDL_CLK_SSI3>;
clock-names = "ipg", "baud";
dmas = <&sdma 45 1 0>,
<&sdma 46 1 0>;
dma-names = "rx", "tx";
......@@ -396,8 +407,9 @@ gpt: gpt@02098000 {
reg = <0x02098000 0x4000>;
interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_GPT_IPG>,
<&clks IMX6QDL_CLK_GPT_IPG_PER>;
clock-names = "ipg", "per";
<&clks IMX6QDL_CLK_GPT_IPG_PER>,
<&clks IMX6QDL_CLK_GPT_3M>;
clock-names = "ipg", "per", "osc_per";
};
gpio1: gpio@0209c000 {
......
arch/arm/boot/dts/imx6sl-evk.dts
View file @ 9cd70164
......@@ -20,6 +20,13 @@ memory {
reg = <0x80000000 0x40000000>;
};
backlight {
compatible = "pwm-backlight";
pwms = <&pwm1 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
......@@ -74,6 +81,14 @@ reg_aud4v: regulator@3 {
regulator-max-microvolt = <4325000>;
regulator-boot-on;
};
reg_lcd_3v3: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "lcd-3v3";
gpio = <&gpio4 3 0>;
enable-active-high;
};
};
sound {
......@@ -329,12 +344,6 @@ MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_led: ledgrp {
fsl,pins = <
MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059
>;
};
pinctrl_kpp: kppgrp {
fsl,pins = <
MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010
......@@ -346,6 +355,51 @@ MX6SL_PAD_KEY_COL2__KEY_COL2 0x110b0
>;
};
pinctrl_lcd: lcdgrp {
fsl,pins = <
MX6SL_PAD_LCD_DAT0__LCD_DATA00 0x1b0b0
MX6SL_PAD_LCD_DAT1__LCD_DATA01 0x1b0b0
MX6SL_PAD_LCD_DAT2__LCD_DATA02 0x1b0b0
MX6SL_PAD_LCD_DAT3__LCD_DATA03 0x1b0b0
MX6SL_PAD_LCD_DAT4__LCD_DATA04 0x1b0b0
MX6SL_PAD_LCD_DAT5__LCD_DATA05 0x1b0b0
MX6SL_PAD_LCD_DAT6__LCD_DATA06 0x1b0b0
MX6SL_PAD_LCD_DAT7__LCD_DATA07 0x1b0b0
MX6SL_PAD_LCD_DAT8__LCD_DATA08 0x1b0b0
MX6SL_PAD_LCD_DAT9__LCD_DATA09 0x1b0b0
MX6SL_PAD_LCD_DAT10__LCD_DATA10 0x1b0b0
MX6SL_PAD_LCD_DAT11__LCD_DATA11 0x1b0b0
MX6SL_PAD_LCD_DAT12__LCD_DATA12 0x1b0b0
MX6SL_PAD_LCD_DAT13__LCD_DATA13 0x1b0b0
MX6SL_PAD_LCD_DAT14__LCD_DATA14 0x1b0b0
MX6SL_PAD_LCD_DAT15__LCD_DATA15 0x1b0b0
MX6SL_PAD_LCD_DAT16__LCD_DATA16 0x1b0b0
MX6SL_PAD_LCD_DAT17__LCD_DATA17 0x1b0b0
MX6SL_PAD_LCD_DAT18__LCD_DATA18 0x1b0b0
MX6SL_PAD_LCD_DAT19__LCD_DATA19 0x1b0b0
MX6SL_PAD_LCD_DAT20__LCD_DATA20 0x1b0b0
MX6SL_PAD_LCD_DAT21__LCD_DATA21 0x1b0b0
MX6SL_PAD_LCD_DAT22__LCD_DATA22 0x1b0b0
MX6SL_PAD_LCD_DAT23__LCD_DATA23 0x1b0b0
MX6SL_PAD_LCD_CLK__LCD_CLK 0x1b0b0
MX6SL_PAD_LCD_ENABLE__LCD_ENABLE 0x1b0b0
MX6SL_PAD_LCD_HSYNC__LCD_HSYNC 0x1b0b0
MX6SL_PAD_LCD_VSYNC__LCD_VSYNC 0x1b0b0
>;
};
pinctrl_led: ledgrp {
fsl,pins = <
MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059
>;
};
pinctrl_pwm1: pwmgrp {
fsl,pins = <
MX6SL_PAD_PWM1__PWM1_OUT 0x110b0
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1
......@@ -488,6 +542,44 @@ MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP) /* ROW2, COL1 */
status = "okay";
};
&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd>;
lcd-supply = <&reg_lcd_3v3>;
display = <&display0>;
status = "okay";
display0: display0 {
bits-per-pixel = <32>;
bus-width = <24>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <33500000>;
hactive = <800>;
vactive = <480>;
hback-porch = <89>;
hfront-porch = <164>;
vback-porch = <23>;
vfront-porch = <10>;
hsync-len = <10>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&ssi2 {
status = "okay";
};
......
arch/arm/boot/dts/imx6sl.dtsi
View file @ 9cd70164
......@@ -226,11 +226,14 @@ uart2: serial@02024000 {
};
ssi1: ssi@02028000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx6sl-ssi",
"fsl,imx51-ssi";
reg = <0x02028000 0x4000>;
interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SL_CLK_SSI1>;
clocks = <&clks IMX6SL_CLK_SSI1_IPG>,
<&clks IMX6SL_CLK_SSI1>;
clock-names = "ipg", "baud";
dmas = <&sdma 37 1 0>,
<&sdma 38 1 0>;
dma-names = "rx", "tx";
......@@ -239,11 +242,14 @@ ssi1: ssi@02028000 {
};
ssi2: ssi@0202c000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx6sl-ssi",
"fsl,imx51-ssi";
reg = <0x0202c000 0x4000>;
interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SL_CLK_SSI2>;
clocks = <&clks IMX6SL_CLK_SSI2_IPG>,
<&clks IMX6SL_CLK_SSI2>;
clock-names = "ipg", "baud";
dmas = <&sdma 41 1 0>,
<&sdma 42 1 0>;
dma-names = "rx", "tx";
......@@ -252,11 +258,14 @@ ssi2: ssi@0202c000 {
};
ssi3: ssi@02030000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx6sl-ssi",
"fsl,imx51-ssi";
reg = <0x02030000 0x4000>;
interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SL_CLK_SSI3>;
clocks = <&clks IMX6SL_CLK_SSI3_IPG>,
<&clks IMX6SL_CLK_SSI3>;
clock-names = "ipg", "baud";
dmas = <&sdma 45 1 0>,
<&sdma 46 1 0>;
dma-names = "rx", "tx";
......@@ -529,6 +538,14 @@ reg_soc: regulator-vddsoc@140 {
};
};
tempmon: tempmon {
compatible = "fsl,imx6q-tempmon";
interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
fsl,tempmon = <&anatop>;
fsl,tempmon-data = <&ocotp>;
clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>;
};
usbphy1: usbphy@020c9000 {
compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy";
reg = <0x020c9000 0x1000>;
......@@ -627,8 +644,14 @@ epdc: epdc@020f4000 {
};
lcdif: lcdif@020f8000 {
compatible = "fsl,imx6sl-lcdif", "fsl,imx28-lcdif";
reg = <0x020f8000 0x4000>;
interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SL_CLK_LCDIF_PIX>,
<&clks IMX6SL_CLK_LCDIF_AXI>,
<&clks IMX6SL_CLK_DUMMY>;
clock-names = "pix", "axi", "disp_axi";
status = "disabled";
};
dcp: dcp@020fc000 {
......@@ -784,7 +807,7 @@ weim: weim@021b8000 {
};
ocotp: ocotp@021bc000 {
compatible = "fsl,imx6sl-ocotp";
compatible = "fsl,imx6sl-ocotp", "syscon";
reg = <0x021bc000 0x4000>;
};
......
arch/arm/boot/dts/imx6sx-sdb.dts
View file @ 9cd70164
......@@ -24,6 +24,13 @@ memory {
reg = <0x80000000 0x40000000>;
};
backlight {
compatible = "pwm-backlight";
pwms = <&pwm3 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
......@@ -90,6 +97,14 @@ reg_psu_5v: regulator@3 {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_lcd_3v3: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "lcd-3v3";
gpio = <&gpio3 27 0>;
enable-active-high;
};
};
sound {
......@@ -251,6 +266,44 @@ codec: wm8962@1a {
};
};
&lcdif1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd>;
lcd-supply = <&reg_lcd_3v3>;
display = <&display0>;
status = "okay";
display0: display0 {
bits-per-pixel = <16>;
bus-width = <24>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <33500000>;
hactive = <800>;
vactive = <480>;
hback-porch = <89>;
hfront-porch = <164>;
vback-porch = <23>;
vfront-porch = <10>;
hsync-len = <10>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
};
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
status = "okay";
};
&ssi2 {
status = "okay";
};
......@@ -365,6 +418,46 @@ MX6SX_PAD_CSI_DATA06__I2C4_SCL 0x4001b8b1
>;
};
pinctrl_lcd: lcdgrp {
fsl,pins = <
MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0
MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0
MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0
MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0
MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0
MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0
MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0
MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0
MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0
MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0
MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0
MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0
MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0
MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0
MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0
MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0
MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0
MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0
MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0
MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0
MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0
MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0
MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0
MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0
MX6SX_PAD_LCD1_CLK__LCDIF1_CLK 0x4001b0b0
MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0
MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0
MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0
MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0
>;
};
pinctrl_pwm3: pwm3grp-1 {
fsl,pins = <
MX6SX_PAD_SD1_DATA2__PWM3_OUT 0x110b0
>;
};
pinctrl_vcc_sd3: vccsd3grp {
fsl,pins = <
MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059
......
arch/arm/boot/dts/imx6sx.dtsi
View file @ 9cd70164
......@@ -298,6 +298,7 @@ esai: esai@02024000 {
};
ssi1: ssi@02028000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi";
reg = <0x02028000 0x4000>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
......@@ -311,6 +312,7 @@ ssi1: ssi@02028000 {
};
ssi2: ssi@0202c000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi";
reg = <0x0202c000 0x4000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
......@@ -324,6 +326,7 @@ ssi2: ssi@0202c000 {
};
ssi3: ssi@02030000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi";
reg = <0x02030000 0x4000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
......@@ -418,7 +421,7 @@ gpt: gpt@02098000 {
reg = <0x02098000 0x4000>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_GPT_BUS>,
<&clks IMX6SX_CLK_GPT_SERIAL>;
<&clks IMX6SX_CLK_GPT_3M>;
clock-names = "ipg", "per";
};
......@@ -1062,6 +1065,7 @@ csi2: csi@0221c000 {
};
lcdif1: lcdif@02220000 {
compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif";
reg = <0x02220000 0x4000>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_LCDIF1_PIX>,
......@@ -1072,6 +1076,7 @@ lcdif1: lcdif@02220000 {
};
lcdif2: lcdif@02224000 {
compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif";
reg = <0x02224000 0x4000>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_LCDIF2_PIX>,
......
arch/arm/boot/dts/r8a7790-lager.dts
View file @ 9cd70164
......@@ -392,7 +392,7 @@ &iic3 {
status = "okay";
vdd_dvfs: regulator@68 {
compatible = "diasemi,da9210";
compatible = "dlg,da9210";
reg = <0x68>;
regulator-min-microvolt = <1000000>;
......
arch/arm/boot/dts/r8a7791-koelsch.dts
View file @ 9cd70164
......@@ -437,7 +437,7 @@ &i2c6 {
clock-frequency = <100000>;
vdd_dvfs: regulator@68 {
compatible = "diasemi,da9210";
compatible = "dlg,da9210";
reg = <0x68>;
regulator-min-microvolt = <1000000>;
......
arch/arm/boot/dts/vf610-colibri-eval-v3.dts 0 → 100644
View file @ 9cd70164
/*
* Copyright 2014 Toradex AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
/dts-v1/;
#include "vf610-colibri.dtsi"
/ {
model = "Toradex Colibri VF61 on Colibri Evaluation Board";
compatible = "toradex,vf610-colibri_vf61-on-eval", "toradex,vf610-colibri_vf61", "fsl,vf610";
chosen {
bootargs = "console=ttyLP0,115200";
};
};
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>;
bus-width = <4>;
status = "okay";
};
&fec1 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
arch/arm/boot/dts/vf610-colibri.dts → arch/arm/boot/dts/vf610-colibri.dtsi
View file @ 9cd70164
......@@ -7,16 +7,11 @@
* (at your option) any later version.
*/
/dts-v1/;
#include "vf610.dtsi"
/ {
model = "Toradex Colibri VF61 COM";
compatible = "toradex,vf610-colibri", "fsl,vf610";
chosen {
bootargs = "console=ttyLP0,115200";
};
compatible = "toradex,vf610-colibri_vf61", "fsl,vf610";
memory {
reg = <0x80000000 0x10000000>;
......@@ -36,14 +31,12 @@ &esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>;
bus-width = <4>;
status = "okay";
};
&fec1 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
status = "okay";
};
&L2 {
......@@ -54,25 +47,32 @@ &L2 {
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
};
&usbdev0 {
disable-over-current;
status = "okay";
};
&usbh1 {
disable-over-current;
status = "okay";
};
&iomuxc {
vf610-colibri {
pinctrl_esdhc1: esdhc1grp {
fsl,fsl,pins = <
fsl,pins = <
VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
......
arch/arm/boot/dts/vf610-twr.dts
View file @ 9cd70164
......@@ -76,7 +76,6 @@ sound {
simple-audio-card,cpu {
sound-dai = <&sai2>;
master-clkdir-out;
frame-master;
bitclock-master;
};
......@@ -221,8 +220,6 @@ VF610_PAD_PTB0__FTM0_CH0 0x1582
VF610_PAD_PTB1__FTM0_CH1 0x1582
VF610_PAD_PTB2__FTM0_CH2 0x1582
VF610_PAD_PTB3__FTM0_CH3 0x1582
VF610_PAD_PTB6__FTM0_CH6 0x1582
VF610_PAD_PTB7__FTM0_CH7 0x1582
>;
};
......@@ -244,6 +241,13 @@ VF610_PAD_PTB4__UART1_TX 0x21a2
VF610_PAD_PTB5__UART1_RX 0x21a1
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
VF610_PAD_PTB6__UART2_TX 0x21a2
VF610_PAD_PTB7__UART2_RX 0x21a1
>;
};
};
};
......@@ -265,3 +269,19 @@ &uart1 {
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&usbdev0 {
disable-over-current;
status = "okay";
};
&usbh1 {
disable-over-current;
status = "okay";
};
arch/arm/boot/dts/vf610.dtsi
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arch/arm/configs/imx_v4_v5_defconfig
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arch/arm/configs/imx_v6_v7_defconfig
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arch/arm/mach-imx/Kconfig
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arch/arm/mach-imx/Makefile
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arch/arm/mach-imx/anatop.c
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arch/arm/mach-imx/board-pcm038.h deleted 100644 → 0
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arch/arm/mach-imx/clk-gate-exclusive.c 0 → 100644
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arch/arm/mach-imx/clk-imx6q.c
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arch/arm/mach-imx/clk-imx6sl.c
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arch/arm/mach-imx/clk-imx6sx.c
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arch/arm/mach-imx/clk-pllv3.c
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arch/arm/mach-imx/clk-vf610.c
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arch/arm/mach-imx/clk.h
View file @ 9cd70164
......@@ -36,6 +36,9 @@ struct clk *clk_register_gate2(struct device *dev, const char *name,
struct clk * imx_obtain_fixed_clock(
const char *name, unsigned long rate);
struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
void __iomem *reg, u8 shift, u32 exclusive_mask);
static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
void __iomem *reg, u8 shift)
{
......
arch/arm/mach-imx/common.h
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arch/arm/mach-imx/cpuidle-imx6q.c
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arch/arm/mach-imx/eukrea-baseboards.h
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arch/arm/mach-imx/eukrea_mbimx27-baseboard.c deleted 100644 → 0
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arch/arm/mach-imx/imx1-dt.c 0 → 100644
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arch/arm/mach-imx/iomux-imx31.c
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arch/arm/mach-imx/iomux-v1.c
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arch/arm/mach-imx/iomux-v3.c
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arch/arm/mach-imx/mach-armadillo5x0.c
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arch/arm/mach-imx/mach-cpuimx27.c deleted 100644 → 0
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arch/arm/mach-imx/mach-imx6sx.c
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arch/arm/mach-imx/mach-mx1ads.c deleted 100644 → 0
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arch/arm/mach-imx/mach-mx31_3ds.c
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arch/arm/mach-imx/mach-mx31lite.c
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arch/arm/mach-imx/mach-mxt_td60.c deleted 100644 → 0
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arch/arm/mach-imx/mach-pcm037.c
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arch/arm/mach-imx/mach-pcm038.c deleted 100644 → 0
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arch/arm/mach-imx/mxc.h
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arch/arm/mach-imx/pcm970-baseboard.c deleted 100644 → 0
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arch/arm/mach-imx/platsmp.c
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arch/arm/mach-imx/time.c
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drivers/mfd/da9055-core.c
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include/dt-bindings/clock/imx6qdl-clock.h
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include/dt-bindings/clock/imx6sl-clock.h
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include/dt-bindings/clock/imx6sx-clock.h
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include/dt-bindings/clock/vf610-clock.h
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