Commit a01194d7 authored by Angus Ainslie (Purism)'s avatar Angus Ainslie (Purism) Committed by Shawn Guo

arm64: dts: fsl: imx8mq: add the snvs power key node

Add a node for the snvs power key, "disabled" by default.
Signed-off-by: default avatarAngus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 57aa1bc7
...@@ -8,6 +8,7 @@ ...@@ -8,6 +8,7 @@
#include <dt-bindings/power/imx8mq-power.h> #include <dt-bindings/power/imx8mq-power.h>
#include <dt-bindings/reset/imx8mq-reset.h> #include <dt-bindings/reset/imx8mq-reset.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include "dt-bindings/input/input.h"
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h> #include <dt-bindings/thermal/thermal.h>
#include "imx8mq-pinfunc.h" #include "imx8mq-pinfunc.h"
...@@ -463,6 +464,15 @@ snvs_rtc: snvs-rtc-lp{ ...@@ -463,6 +464,15 @@ snvs_rtc: snvs-rtc-lp{
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
}; };
snvs_pwrkey: snvs-powerkey {
compatible = "fsl,sec-v4.0-pwrkey";
regmap = <&snvs>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
linux,keycode = <KEY_POWER>;
wakeup-source;
status = "disabled";
};
}; };
clk: clock-controller@30380000 { clk: clock-controller@30380000 {
......
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