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nexedi
linux
Commits
a01e7b32
Commit
a01e7b32
authored
Apr 10, 2015
by
Jason Cooper
Browse files
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Merge branch 'irqchip/stacked-irq_set_wake' into irqchip/core
Conflicts: drivers/irqchip/irq-gic.c
parents
fb414e90
008e4d67
Changes
6
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6 changed files
with
10 additions
and
14 deletions
+10
-14
arch/arm/mach-shmobile/intc-sh73a0.c
arch/arm/mach-shmobile/intc-sh73a0.c
+1
-6
arch/arm/mach-shmobile/setup-r8a7779.c
arch/arm/mach-shmobile/setup-r8a7779.c
+1
-6
arch/arm/mach-ux500/cpu.c
arch/arm/mach-ux500/cpu.c
+1
-1
arch/arm/mach-zynq/common.c
arch/arm/mach-zynq/common.c
+1
-1
drivers/irqchip/irq-gic.c
drivers/irqchip/irq-gic.c
+5
-0
include/linux/irqchip/arm-gic.h
include/linux/irqchip/arm-gic.h
+1
-0
No files found.
arch/arm/mach-shmobile/intc-sh73a0.c
View file @
a01e7b32
...
@@ -252,11 +252,6 @@ static irqreturn_t sh73a0_intcs_demux(int irq, void *dev_id)
...
@@ -252,11 +252,6 @@ static irqreturn_t sh73a0_intcs_demux(int irq, void *dev_id)
return
IRQ_HANDLED
;
return
IRQ_HANDLED
;
}
}
static
int
sh73a0_set_wake
(
struct
irq_data
*
data
,
unsigned
int
on
)
{
return
0
;
/* always allow wakeup */
}
#define PINTER0_PHYS 0xe69000a0
#define PINTER0_PHYS 0xe69000a0
#define PINTER1_PHYS 0xe69000a4
#define PINTER1_PHYS 0xe69000a4
#define PINTER0_VIRT IOMEM(0xe69000a0)
#define PINTER0_VIRT IOMEM(0xe69000a0)
...
@@ -318,8 +313,8 @@ void __init sh73a0_init_irq(void)
...
@@ -318,8 +313,8 @@ void __init sh73a0_init_irq(void)
void
__iomem
*
gic_cpu_base
=
IOMEM
(
0xf0000100
);
void
__iomem
*
gic_cpu_base
=
IOMEM
(
0xf0000100
);
void
__iomem
*
intevtsa
=
ioremap_nocache
(
0xffd20100
,
PAGE_SIZE
);
void
__iomem
*
intevtsa
=
ioremap_nocache
(
0xffd20100
,
PAGE_SIZE
);
gic_set_irqchip_flags
(
IRQCHIP_SKIP_SET_WAKE
);
gic_init
(
0
,
29
,
gic_dist_base
,
gic_cpu_base
);
gic_init
(
0
,
29
,
gic_dist_base
,
gic_cpu_base
);
gic_arch_extn
.
irq_set_wake
=
sh73a0_set_wake
;
register_intc_controller
(
&
intcs_desc
);
register_intc_controller
(
&
intcs_desc
);
register_intc_controller
(
&
intc_pint0_desc
);
register_intc_controller
(
&
intc_pint0_desc
);
...
...
arch/arm/mach-shmobile/setup-r8a7779.c
View file @
a01e7b32
...
@@ -713,18 +713,13 @@ void __init r8a7779_init_late(void)
...
@@ -713,18 +713,13 @@ void __init r8a7779_init_late(void)
}
}
#ifdef CONFIG_USE_OF
#ifdef CONFIG_USE_OF
static
int
r8a7779_set_wake
(
struct
irq_data
*
data
,
unsigned
int
on
)
{
return
0
;
/* always allow wakeup */
}
void
__init
r8a7779_init_irq_dt
(
void
)
void
__init
r8a7779_init_irq_dt
(
void
)
{
{
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
void
__iomem
*
gic_dist_base
=
ioremap_nocache
(
0xf0001000
,
0x1000
);
void
__iomem
*
gic_dist_base
=
ioremap_nocache
(
0xf0001000
,
0x1000
);
void
__iomem
*
gic_cpu_base
=
ioremap_nocache
(
0xf0000100
,
0x1000
);
void
__iomem
*
gic_cpu_base
=
ioremap_nocache
(
0xf0000100
,
0x1000
);
#endif
#endif
gic_
arch_extn
.
irq_set_wake
=
r8a7779_set_wake
;
gic_
set_irqchip_flags
(
IRQCHIP_SKIP_SET_WAKE
)
;
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
gic_init
(
0
,
29
,
gic_dist_base
,
gic_cpu_base
);
gic_init
(
0
,
29
,
gic_dist_base
,
gic_cpu_base
);
...
...
arch/arm/mach-ux500/cpu.c
View file @
a01e7b32
...
@@ -52,7 +52,7 @@ void ux500_restart(enum reboot_mode mode, const char *cmd)
...
@@ -52,7 +52,7 @@ void ux500_restart(enum reboot_mode mode, const char *cmd)
*/
*/
void
__init
ux500_init_irq
(
void
)
void
__init
ux500_init_irq
(
void
)
{
{
gic_
arch_extn
.
flags
=
IRQCHIP_SKIP_SET_WAKE
|
IRQCHIP_MASK_ON_SUSPEND
;
gic_
set_irqchip_flags
(
IRQCHIP_SKIP_SET_WAKE
|
IRQCHIP_MASK_ON_SUSPEND
)
;
irqchip_init
();
irqchip_init
();
/*
/*
...
...
arch/arm/mach-zynq/common.c
View file @
a01e7b32
...
@@ -186,7 +186,7 @@ static void __init zynq_map_io(void)
...
@@ -186,7 +186,7 @@ static void __init zynq_map_io(void)
static
void
__init
zynq_irq_init
(
void
)
static
void
__init
zynq_irq_init
(
void
)
{
{
gic_
arch_extn
.
flags
=
IRQCHIP_SKIP_SET_WAKE
|
IRQCHIP_MASK_ON_SUSPEND
;
gic_
set_irqchip_flags
(
IRQCHIP_SKIP_SET_WAKE
|
IRQCHIP_MASK_ON_SUSPEND
)
;
irqchip_init
();
irqchip_init
();
}
}
...
...
drivers/irqchip/irq-gic.c
View file @
a01e7b32
...
@@ -880,6 +880,11 @@ static const struct irq_domain_ops gic_irq_domain_ops = {
...
@@ -880,6 +880,11 @@ static const struct irq_domain_ops gic_irq_domain_ops = {
.
xlate
=
gic_irq_domain_xlate
,
.
xlate
=
gic_irq_domain_xlate
,
};
};
void
gic_set_irqchip_flags
(
unsigned
long
flags
)
{
gic_chip
.
flags
|=
flags
;
}
void
__init
gic_init_bases
(
unsigned
int
gic_nr
,
int
irq_start
,
void
__init
gic_init_bases
(
unsigned
int
gic_nr
,
int
irq_start
,
void
__iomem
*
dist_base
,
void
__iomem
*
cpu_base
,
void
__iomem
*
dist_base
,
void
__iomem
*
cpu_base
,
u32
percpu_offset
,
struct
device_node
*
node
)
u32
percpu_offset
,
struct
device_node
*
node
)
...
...
include/linux/irqchip/arm-gic.h
View file @
a01e7b32
...
@@ -97,6 +97,7 @@ struct device_node;
...
@@ -97,6 +97,7 @@ struct device_node;
extern
struct
irq_chip
gic_arch_extn
;
extern
struct
irq_chip
gic_arch_extn
;
void
gic_set_irqchip_flags
(
unsigned
long
flags
);
void
gic_init_bases
(
unsigned
int
,
int
,
void
__iomem
*
,
void
__iomem
*
,
void
gic_init_bases
(
unsigned
int
,
int
,
void
__iomem
*
,
void
__iomem
*
,
u32
offset
,
struct
device_node
*
);
u32
offset
,
struct
device_node
*
);
void
gic_cascade_irq
(
unsigned
int
gic_nr
,
unsigned
int
irq
);
void
gic_cascade_irq
(
unsigned
int
gic_nr
,
unsigned
int
irq
);
...
...
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