serial: sh-sci: Replace buggy big #ifdef by runtime logic
The #ifdef logic to clear SCxSR bits using RMW on SCIFA/SCIFB and SCIF variants with some SCIFA features (sh7705/SH7720/sh7721) has several drawbacks: - It wasn't updated for newer R-Mobile variants (APE6), - It doesn't correctly handle SoCs with both SCIF and SCIFA/B (e.g. R-Car Gen2, but also legacy sh7723/sh7724), - It doesn't play well with ARM multi-platform kernels: on R-Car Gen2, SCIF/SCIFA/SCIFB/HSCIF were handled differently, depending on whether r8a7740 or sh73a0 support was enabled or not, Replace the #ifdef logic by runtime logic to fix this. SCIFA/SCIFB and SCIF on sh7705/sh7720/sh7721 use RMW to clear error bits, other variants use plain stores, as before. Note that this changes behavior for SCIFA on sh7723/sh7724 (these SoCs have both SCIF and SCIFA), which didn't use RMW before. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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