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Commit a20dc9f2 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman
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ARM: dts: r8a7790: Add SCIF fallback compatibility strings 

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent b2ac44fa
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Showing with 20 additions and 10 deletions
arch/arm/boot/dts/r8a7790.dtsi
View file @ a20dc9f2
...@@ -585,7 +585,8 @@ sdhi3: sd@ee160000 { ...@@ -585,7 +585,8 @@ sdhi3: sd@ee160000 {
}; };
scifa0: serial@e6c40000 { scifa0: serial@e6c40000 {
compatible = "renesas,scifa-r8a7790", "renesas,scifa"; compatible = "renesas,scifa-r8a7790",
"renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe6c40000 0 64>; reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>; clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;
...@@ -597,7 +598,8 @@ scifa0: serial@e6c40000 { ...@@ -597,7 +598,8 @@ scifa0: serial@e6c40000 {
}; };
scifa1: serial@e6c50000 { scifa1: serial@e6c50000 {
compatible = "renesas,scifa-r8a7790", "renesas,scifa"; compatible = "renesas,scifa-r8a7790",
"renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe6c50000 0 64>; reg = <0 0xe6c50000 0 64>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>; clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>;
...@@ -609,7 +611,8 @@ scifa1: serial@e6c50000 { ...@@ -609,7 +611,8 @@ scifa1: serial@e6c50000 {
}; };
scifa2: serial@e6c60000 { scifa2: serial@e6c60000 {
compatible = "renesas,scifa-r8a7790", "renesas,scifa"; compatible = "renesas,scifa-r8a7790",
"renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe6c60000 0 64>; reg = <0 0xe6c60000 0 64>;
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>; clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>;
...@@ -621,7 +624,8 @@ scifa2: serial@e6c60000 { ...@@ -621,7 +624,8 @@ scifa2: serial@e6c60000 {
}; };
scifb0: serial@e6c20000 { scifb0: serial@e6c20000 {
compatible = "renesas,scifb-r8a7790", "renesas,scifb"; compatible = "renesas,scifb-r8a7790",
"renesas,rcar-gen2-scifb", "renesas,scifb";
reg = <0 0xe6c20000 0 64>; reg = <0 0xe6c20000 0 64>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>; clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>;
...@@ -633,7 +637,8 @@ scifb0: serial@e6c20000 { ...@@ -633,7 +637,8 @@ scifb0: serial@e6c20000 {
}; };
scifb1: serial@e6c30000 { scifb1: serial@e6c30000 {
compatible = "renesas,scifb-r8a7790", "renesas,scifb"; compatible = "renesas,scifb-r8a7790",
"renesas,rcar-gen2-scifb", "renesas,scifb";
reg = <0 0xe6c30000 0 64>; reg = <0 0xe6c30000 0 64>;
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>; clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>;
...@@ -645,7 +650,8 @@ scifb1: serial@e6c30000 { ...@@ -645,7 +650,8 @@ scifb1: serial@e6c30000 {
}; };
scifb2: serial@e6ce0000 { scifb2: serial@e6ce0000 {
compatible = "renesas,scifb-r8a7790", "renesas,scifb"; compatible = "renesas,scifb-r8a7790",
"renesas,rcar-gen2-scifb", "renesas,scifb";
reg = <0 0xe6ce0000 0 64>; reg = <0 0xe6ce0000 0 64>;
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>; clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>;
...@@ -657,7 +663,8 @@ scifb2: serial@e6ce0000 { ...@@ -657,7 +663,8 @@ scifb2: serial@e6ce0000 {
}; };
scif0: serial@e6e60000 { scif0: serial@e6e60000 {
compatible = "renesas,scif-r8a7790", "renesas,scif"; compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
"renesas,scif";
reg = <0 0xe6e60000 0 64>; reg = <0 0xe6e60000 0 64>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp7_clks R8A7790_CLK_SCIF0>; clocks = <&mstp7_clks R8A7790_CLK_SCIF0>;
...@@ -669,7 +676,8 @@ scif0: serial@e6e60000 { ...@@ -669,7 +676,8 @@ scif0: serial@e6e60000 {
}; };
scif1: serial@e6e68000 { scif1: serial@e6e68000 {
compatible = "renesas,scif-r8a7790", "renesas,scif"; compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
"renesas,scif";
reg = <0 0xe6e68000 0 64>; reg = <0 0xe6e68000 0 64>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp7_clks R8A7790_CLK_SCIF1>; clocks = <&mstp7_clks R8A7790_CLK_SCIF1>;
...@@ -681,7 +689,8 @@ scif1: serial@e6e68000 { ...@@ -681,7 +689,8 @@ scif1: serial@e6e68000 {
}; };
hscif0: serial@e62c0000 { hscif0: serial@e62c0000 {
compatible = "renesas,hscif-r8a7790", "renesas,hscif"; compatible = "renesas,hscif-r8a7790",
"renesas,rcar-gen2-hscif", "renesas,hscif";
reg = <0 0xe62c0000 0 96>; reg = <0 0xe62c0000 0 96>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>; clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>;
...@@ -693,7 +702,8 @@ hscif0: serial@e62c0000 { ...@@ -693,7 +702,8 @@ hscif0: serial@e62c0000 {
}; };
hscif1: serial@e62c8000 { hscif1: serial@e62c8000 {
compatible = "renesas,hscif-r8a7790", "renesas,hscif"; compatible = "renesas,hscif-r8a7790",
"renesas,rcar-gen2-hscif", "renesas,hscif";
reg = <0 0xe62c8000 0 96>; reg = <0 0xe62c8000 0 96>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>; clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>;
......
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