Commit a3e39ed1 authored by Mark Brown's avatar Mark Brown

Merge remote-tracking branches 'asoc/fix/amd', 'asoc/fix/hdmi-codec',...

Merge remote-tracking branches 'asoc/fix/amd', 'asoc/fix/hdmi-codec', 'asoc/fix/rt5651', 'asoc/fix/samsung', 'asoc/fix/sgtl5000', 'asoc/fix/sunxi' and 'asoc/fix/wm-adsp' into asoc-linus
...@@ -9925,6 +9925,13 @@ F: Documentation/ABI/stable/sysfs-bus-nvmem ...@@ -9925,6 +9925,13 @@ F: Documentation/ABI/stable/sysfs-bus-nvmem
F: include/linux/nvmem-consumer.h F: include/linux/nvmem-consumer.h
F: include/linux/nvmem-provider.h F: include/linux/nvmem-provider.h
NXP SGTL5000 DRIVER
M: Fabio Estevam <fabio.estevam@nxp.com>
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
S: Maintained
F: Documentation/devicetree/bindings/sound/sgtl5000.txt
F: sound/soc/codecs/sgtl5000*
NXP TDA998X DRM DRIVER NXP TDA998X DRM DRIVER
M: Russell King <linux@armlinux.org.uk> M: Russell King <linux@armlinux.org.uk>
S: Supported S: Supported
...@@ -12107,6 +12114,7 @@ M: Sylwester Nawrocki <s.nawrocki@samsung.com> ...@@ -12107,6 +12114,7 @@ M: Sylwester Nawrocki <s.nawrocki@samsung.com>
L: alsa-devel@alsa-project.org (moderated for non-subscribers) L: alsa-devel@alsa-project.org (moderated for non-subscribers)
S: Supported S: Supported
F: sound/soc/samsung/ F: sound/soc/samsung/
F: Documentation/devicetree/bindings/sound/samsung*
SAMSUNG EXYNOS PSEUDO RANDOM NUMBER GENERATOR (RNG) DRIVER SAMSUNG EXYNOS PSEUDO RANDOM NUMBER GENERATOR (RNG) DRIVER
M: Krzysztof Kozlowski <krzk@kernel.org> M: Krzysztof Kozlowski <krzk@kernel.org>
......
...@@ -579,13 +579,6 @@ static int acp_init(void __iomem *acp_mmio, u32 asic_type) ...@@ -579,13 +579,6 @@ static int acp_init(void __iomem *acp_mmio, u32 asic_type)
for (bank = 1; bank < 48; bank++) for (bank = 1; bank < 48; bank++)
acp_set_sram_bank_state(acp_mmio, bank, false); acp_set_sram_bank_state(acp_mmio, bank, false);
} }
/* Stoney supports 16bit resolution */
if (asic_type == CHIP_STONEY) {
val = acp_reg_read(acp_mmio, mmACP_I2S_16BIT_RESOLUTION_EN);
val |= 0x03;
acp_reg_write(val, acp_mmio, mmACP_I2S_16BIT_RESOLUTION_EN);
}
return 0; return 0;
} }
...@@ -774,6 +767,7 @@ static int acp_dma_hw_params(struct snd_pcm_substream *substream, ...@@ -774,6 +767,7 @@ static int acp_dma_hw_params(struct snd_pcm_substream *substream,
{ {
int status; int status;
uint64_t size; uint64_t size;
u32 val = 0;
struct page *pg; struct page *pg;
struct snd_pcm_runtime *runtime; struct snd_pcm_runtime *runtime;
struct audio_substream_data *rtd; struct audio_substream_data *rtd;
...@@ -786,6 +780,14 @@ static int acp_dma_hw_params(struct snd_pcm_substream *substream, ...@@ -786,6 +780,14 @@ static int acp_dma_hw_params(struct snd_pcm_substream *substream,
if (WARN_ON(!rtd)) if (WARN_ON(!rtd))
return -EINVAL; return -EINVAL;
if (adata->asic_type == CHIP_STONEY) {
val = acp_reg_read(adata->acp_mmio, mmACP_I2S_16BIT_RESOLUTION_EN);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
val |= ACP_I2S_SP_16BIT_RESOLUTION_EN;
else
val |= ACP_I2S_MIC_16BIT_RESOLUTION_EN;
acp_reg_write(val, adata->acp_mmio, mmACP_I2S_16BIT_RESOLUTION_EN);
}
size = params_buffer_bytes(params); size = params_buffer_bytes(params);
status = snd_pcm_lib_malloc_pages(substream, size); status = snd_pcm_lib_malloc_pages(substream, size);
if (status < 0) if (status < 0)
......
...@@ -70,6 +70,8 @@ ...@@ -70,6 +70,8 @@
#define CAPTURE_END_DMA_DESCR_CH15 7 #define CAPTURE_END_DMA_DESCR_CH15 7
#define mmACP_I2S_16BIT_RESOLUTION_EN 0x5209 #define mmACP_I2S_16BIT_RESOLUTION_EN 0x5209
#define ACP_I2S_MIC_16BIT_RESOLUTION_EN 0x01
#define ACP_I2S_SP_16BIT_RESOLUTION_EN 0x02
enum acp_dma_priority_level { enum acp_dma_priority_level {
/* 0x0 Specifies the DMA channel is given normal priority */ /* 0x0 Specifies the DMA channel is given normal priority */
ACP_DMA_PRIORITY_LEVEL_NORMAL = 0x0, ACP_DMA_PRIORITY_LEVEL_NORMAL = 0x0,
......
...@@ -798,12 +798,7 @@ static int hdmi_codec_probe(struct platform_device *pdev) ...@@ -798,12 +798,7 @@ static int hdmi_codec_probe(struct platform_device *pdev)
static int hdmi_codec_remove(struct platform_device *pdev) static int hdmi_codec_remove(struct platform_device *pdev)
{ {
struct device *dev = &pdev->dev; snd_soc_unregister_codec(&pdev->dev);
struct hdmi_codec_priv *hcp;
hcp = dev_get_drvdata(dev);
kfree(hcp->chmap_info);
snd_soc_unregister_codec(dev);
return 0; return 0;
} }
......
...@@ -1722,6 +1722,7 @@ static const struct regmap_config rt5651_regmap = { ...@@ -1722,6 +1722,7 @@ static const struct regmap_config rt5651_regmap = {
.num_reg_defaults = ARRAY_SIZE(rt5651_reg), .num_reg_defaults = ARRAY_SIZE(rt5651_reg),
.ranges = rt5651_ranges, .ranges = rt5651_ranges,
.num_ranges = ARRAY_SIZE(rt5651_ranges), .num_ranges = ARRAY_SIZE(rt5651_ranges),
.use_single_rw = true,
}; };
#if defined(CONFIG_OF) #if defined(CONFIG_OF)
......
...@@ -529,10 +529,15 @@ static const struct snd_kcontrol_new sgtl5000_snd_controls[] = { ...@@ -529,10 +529,15 @@ static const struct snd_kcontrol_new sgtl5000_snd_controls[] = {
static int sgtl5000_digital_mute(struct snd_soc_dai *codec_dai, int mute) static int sgtl5000_digital_mute(struct snd_soc_dai *codec_dai, int mute)
{ {
struct snd_soc_codec *codec = codec_dai->codec; struct snd_soc_codec *codec = codec_dai->codec;
u16 adcdac_ctrl = SGTL5000_DAC_MUTE_LEFT | SGTL5000_DAC_MUTE_RIGHT; u16 i2s_pwr = SGTL5000_I2S_IN_POWERUP;
snd_soc_update_bits(codec, SGTL5000_CHIP_ADCDAC_CTRL, /*
adcdac_ctrl, mute ? adcdac_ctrl : 0); * During 'digital mute' do not mute DAC
* because LINE_IN would be muted aswell. We want to mute
* only I2S block - this can be done by powering it off
*/
snd_soc_update_bits(codec, SGTL5000_CHIP_DIG_POWER,
i2s_pwr, mute ? 0 : i2s_pwr);
return 0; return 0;
} }
...@@ -871,15 +876,26 @@ static int sgtl5000_pcm_hw_params(struct snd_pcm_substream *substream, ...@@ -871,15 +876,26 @@ static int sgtl5000_pcm_hw_params(struct snd_pcm_substream *substream,
static int sgtl5000_set_bias_level(struct snd_soc_codec *codec, static int sgtl5000_set_bias_level(struct snd_soc_codec *codec,
enum snd_soc_bias_level level) enum snd_soc_bias_level level)
{ {
struct sgtl5000_priv *sgtl = snd_soc_codec_get_drvdata(codec);
int ret;
switch (level) { switch (level) {
case SND_SOC_BIAS_ON: case SND_SOC_BIAS_ON:
case SND_SOC_BIAS_PREPARE: case SND_SOC_BIAS_PREPARE:
case SND_SOC_BIAS_STANDBY: case SND_SOC_BIAS_STANDBY:
regcache_cache_only(sgtl->regmap, false);
ret = regcache_sync(sgtl->regmap);
if (ret) {
regcache_cache_only(sgtl->regmap, true);
return ret;
}
snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER, snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER,
SGTL5000_REFTOP_POWERUP, SGTL5000_REFTOP_POWERUP,
SGTL5000_REFTOP_POWERUP); SGTL5000_REFTOP_POWERUP);
break; break;
case SND_SOC_BIAS_OFF: case SND_SOC_BIAS_OFF:
regcache_cache_only(sgtl->regmap, true);
snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER, snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER,
SGTL5000_REFTOP_POWERUP, 0); SGTL5000_REFTOP_POWERUP, 0);
break; break;
...@@ -1237,6 +1253,10 @@ static int sgtl5000_probe(struct snd_soc_codec *codec) ...@@ -1237,6 +1253,10 @@ static int sgtl5000_probe(struct snd_soc_codec *codec)
*/ */
snd_soc_write(codec, SGTL5000_DAP_CTRL, 0); snd_soc_write(codec, SGTL5000_DAP_CTRL, 0);
/* Unmute DAC after start */
snd_soc_update_bits(codec, SGTL5000_CHIP_ADCDAC_CTRL,
SGTL5000_DAC_MUTE_LEFT | SGTL5000_DAC_MUTE_RIGHT, 0);
return 0; return 0;
err: err:
......
...@@ -1204,12 +1204,14 @@ static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl) ...@@ -1204,12 +1204,14 @@ static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl)
kcontrol->put = wm_coeff_put_acked; kcontrol->put = wm_coeff_put_acked;
break; break;
default: default:
kcontrol->get = wm_coeff_get; if (kcontrol->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
kcontrol->put = wm_coeff_put;
ctl->bytes_ext.max = ctl->len; ctl->bytes_ext.max = ctl->len;
ctl->bytes_ext.get = wm_coeff_tlv_get; ctl->bytes_ext.get = wm_coeff_tlv_get;
ctl->bytes_ext.put = wm_coeff_tlv_put; ctl->bytes_ext.put = wm_coeff_tlv_put;
} else {
kcontrol->get = wm_coeff_get;
kcontrol->put = wm_coeff_put;
}
break; break;
} }
......
...@@ -104,7 +104,7 @@ ...@@ -104,7 +104,7 @@
#define SUN8I_I2S_CHAN_CFG_REG 0x30 #define SUN8I_I2S_CHAN_CFG_REG 0x30
#define SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM_MASK GENMASK(6, 4) #define SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM_MASK GENMASK(6, 4)
#define SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM(chan) (chan - 1) #define SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM(chan) ((chan - 1) << 4)
#define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM_MASK GENMASK(2, 0) #define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM_MASK GENMASK(2, 0)
#define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM(chan) (chan - 1) #define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM(chan) (chan - 1)
......
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