Commit a8fdb80f authored by Manish Narani's avatar Manish Narani Committed by Michal Simek

arm64: zynqmp: Add ZynqMP SDHCI compatible string

Add the new compatible string for ZynqMP SD Host Controller for its use
in the Arasan SDHCI driver for some of the ZynqMP specific operations.
Add required properties for the same.
Signed-off-by: default avatarManish Narani <manish.narani@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent e42617b8
...@@ -522,21 +522,25 @@ sata: ahci@fd0c0000 { ...@@ -522,21 +522,25 @@ sata: ahci@fd0c0000 {
}; };
sdhci0: mmc@ff160000 { sdhci0: mmc@ff160000 {
compatible = "arasan,sdhci-8.9a"; compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "disabled"; status = "disabled";
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
interrupts = <0 48 4>; interrupts = <0 48 4>;
reg = <0x0 0xff160000 0x0 0x1000>; reg = <0x0 0xff160000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb"; clock-names = "clk_xin", "clk_ahb";
#clock-cells = <1>;
clock-output-names = "clk_out_sd0", "clk_in_sd0";
}; };
sdhci1: mmc@ff170000 { sdhci1: mmc@ff170000 {
compatible = "arasan,sdhci-8.9a"; compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "disabled"; status = "disabled";
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
interrupts = <0 49 4>; interrupts = <0 49 4>;
reg = <0x0 0xff170000 0x0 0x1000>; reg = <0x0 0xff170000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb"; clock-names = "clk_xin", "clk_ahb";
#clock-cells = <1>;
clock-output-names = "clk_out_sd1", "clk_in_sd1";
}; };
smmu: smmu@fd800000 { smmu: smmu@fd800000 {
......
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