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Commit ac513a88 authored by Larry Finger's avatar Larry Finger Committed by Greg Kroah-Hartman
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staging: rtl8192e: Cleanup checkpatch -f warnings and errors - Part I 

Signed-off-by: default avatarLarry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 75bf74b9
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Inline Side-by-side
Showing with 278 additions and 252 deletions
drivers/staging/rtl8192e/r8190P_def.h
View file @ ac513a88
...@@ -39,7 +39,7 @@ enum rtl819x_loopback { ...@@ -39,7 +39,7 @@ enum rtl819x_loopback {
#define RESET_DELAY_8185 20 #define RESET_DELAY_8185 20
#define RT_IBSS_INT_MASKS (IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER) #define RT_IBSS_INT_MASKS (IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER)
#define DESC90_RATE1M 0x00 #define DESC90_RATE1M 0x00
#define DESC90_RATE2M 0x01 #define DESC90_RATE2M 0x01
...@@ -85,7 +85,7 @@ enum rtl819x_loopback { ...@@ -85,7 +85,7 @@ enum rtl819x_loopback {
#define BT_QA_BOARD 1 #define BT_QA_BOARD 1
#define BT_FPGA 2 #define BT_FPGA 2
#define Rx_Smooth_Factor 20 #define RX_SMOOTH 20
#define QSLT_BK 0x1 #define QSLT_BK 0x1
#define QSLT_BE 0x0 #define QSLT_BE 0x0
...@@ -130,7 +130,7 @@ enum rtl819x_loopback { ...@@ -130,7 +130,7 @@ enum rtl819x_loopback {
enum version_8190_loopback { enum version_8190_loopback {
VERSION_8190_BD=0x3, VERSION_8190_BD = 0x3,
VERSION_8190_BE VERSION_8190_BE
}; };
...@@ -139,9 +139,9 @@ enum version_8190_loopback { ...@@ -139,9 +139,9 @@ enum version_8190_loopback {
#define IC_VersionCut_E 0x4 #define IC_VersionCut_E 0x4
enum rf_optype { enum rf_optype {
RF_OP_By_SW_3wire = 0, RF_OP_By_SW_3wire = 0,
RF_OP_By_FW, RF_OP_By_FW,
RF_OP_MAX RF_OP_MAX
}; };
...@@ -303,41 +303,41 @@ struct phy_sts_cck_819xpci { ...@@ -303,41 +303,41 @@ struct phy_sts_cck_819xpci {
#define PHY_Beacon_RSSI_SLID_WIN_MAX 10 #define PHY_Beacon_RSSI_SLID_WIN_MAX 10
struct tx_desc { struct tx_desc {
u16 PktSize; u16 PktSize;
u8 Offset; u8 Offset;
u8 Reserved1:3; u8 Reserved1:3;
u8 CmdInit:1; u8 CmdInit:1;
u8 LastSeg:1; u8 LastSeg:1;
u8 FirstSeg:1; u8 FirstSeg:1;
u8 LINIP:1; u8 LINIP:1;
u8 OWN:1; u8 OWN:1;
u8 TxFWInfoSize; u8 TxFWInfoSize;
u8 RATid:3; u8 RATid:3;
u8 DISFB:1; u8 DISFB:1;
u8 USERATE:1; u8 USERATE:1;
u8 MOREFRAG:1; u8 MOREFRAG:1;
u8 NoEnc:1; u8 NoEnc:1;
u8 PIFS:1; u8 PIFS:1;
u8 QueueSelect:5; u8 QueueSelect:5;
u8 NoACM:1; u8 NoACM:1;
u8 Resv:2; u8 Resv:2;
u8 SecCAMID:5; u8 SecCAMID:5;
u8 SecDescAssign:1; u8 SecDescAssign:1;
u8 SecType:2; u8 SecType:2;
u16 TxBufferSize; u16 TxBufferSize;
u8 PktId:7; u8 PktId:7;
u8 Resv1:1; u8 Resv1:1;
u8 Reserved2; u8 Reserved2;
u32 TxBuffAddr; u32 TxBuffAddr;
u32 NextDescAddress; u32 NextDescAddress;
u32 Reserved5; u32 Reserved5;
u32 Reserved6; u32 Reserved6;
u32 Reserved7; u32 Reserved7;
}; };
......
drivers/staging/rtl8192e/r8190P_rtl8256.c
View file @ ac513a88
...@@ -22,41 +22,59 @@ ...@@ -22,41 +22,59 @@
#include "r8192E_phy.h" #include "r8192E_phy.h"
#include "r8190P_rtl8256.h" #include "r8190P_rtl8256.h"
void PHY_SetRF8256Bandwidth(struct net_device* dev , enum ht_channel_width Bandwidth) void PHY_SetRF8256Bandwidth(struct net_device *dev,
enum ht_channel_width Bandwidth)
{ {
u8 eRFPath; u8 eRFPath;
struct r8192_priv *priv = rtllib_priv(dev); struct r8192_priv *priv = rtllib_priv(dev);
for (eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++) { for (eRFPath = 0; eRFPath < priv->NumTotalRFPath; eRFPath++) {
if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath)) if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
continue; continue;
switch (Bandwidth) { switch (Bandwidth) {
case HT_CHANNEL_WIDTH_20: case HT_CHANNEL_WIDTH_20:
if (priv->card_8192_version == VERSION_8190_BD || priv->card_8192_version == VERSION_8190_BE) { if (priv->card_8192_version == VERSION_8190_BD ||
rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x0b, bMask12Bits, 0x100); priv->card_8192_version == VERSION_8190_BE) {
rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x2c, bMask12Bits, 0x3d7); rtl8192_phy_SetRFReg(dev,
rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x0e, bMask12Bits, 0x021); (enum rf90_radio_path)eRFPath,
0x0b, bMask12Bits, 0x100);
rtl8192_phy_SetRFReg(dev,
(enum rf90_radio_path)eRFPath,
0x2c, bMask12Bits, 0x3d7);
rtl8192_phy_SetRFReg(dev,
(enum rf90_radio_path)eRFPath,
0x0e, bMask12Bits, 0x021);
} else { } else {
RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n"); RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): "
"unknown hardware version\n");
} }
break; break;
case HT_CHANNEL_WIDTH_20_40: case HT_CHANNEL_WIDTH_20_40:
if (priv->card_8192_version == VERSION_8190_BD ||priv->card_8192_version == VERSION_8190_BE) { if (priv->card_8192_version == VERSION_8190_BD ||
rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x0b, bMask12Bits, 0x300); priv->card_8192_version == VERSION_8190_BE) {
rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x2c, bMask12Bits, 0x3ff); rtl8192_phy_SetRFReg(dev,
rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x0e, bMask12Bits, 0x0e1); (enum rf90_radio_path)eRFPath,
0x0b, bMask12Bits, 0x300);
rtl8192_phy_SetRFReg(dev,
(enum rf90_radio_path)eRFPath,
0x2c, bMask12Bits, 0x3ff);
rtl8192_phy_SetRFReg(dev,
(enum rf90_radio_path)eRFPath,
0x0e, bMask12Bits, 0x0e1);
} else { } else {
RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n"); RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): "
"unknown hardware version\n");
} }
break; break;
default: default:
RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth ); RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown "
"Bandwidth: %#X\n", Bandwidth);
break; break;
} }
...@@ -64,7 +82,7 @@ void PHY_SetRF8256Bandwidth(struct net_device* dev , enum ht_channel_width Bandw ...@@ -64,7 +82,7 @@ void PHY_SetRF8256Bandwidth(struct net_device* dev , enum ht_channel_width Bandw
return; return;
} }
bool PHY_RF8256_Config(struct net_device* dev) bool PHY_RF8256_Config(struct net_device *dev)
{ {
struct r8192_priv *priv = rtllib_priv(dev); struct r8192_priv *priv = rtllib_priv(dev);
bool rtStatus = true; bool rtStatus = true;
...@@ -74,7 +92,7 @@ bool PHY_RF8256_Config(struct net_device* dev) ...@@ -74,7 +92,7 @@ bool PHY_RF8256_Config(struct net_device* dev)
return rtStatus; return rtStatus;
} }
bool phy_RF8256_Config_ParaFile(struct net_device* dev) bool phy_RF8256_Config_ParaFile(struct net_device *dev)
{ {
u32 u4RegValue = 0; u32 u4RegValue = 0;
u8 eRFPath; u8 eRFPath;
...@@ -87,7 +105,8 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev) ...@@ -87,7 +105,8 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
u8 ConstRetryTimes = 5, RetryTimes = 5; u8 ConstRetryTimes = 5, RetryTimes = 5;
u8 ret = 0; u8 ret = 0;
for (eRFPath = (enum rf90_radio_path)RF90_PATH_A; eRFPath <priv->NumTotalRFPath; eRFPath++) { for (eRFPath = (enum rf90_radio_path)RF90_PATH_A;
eRFPath < priv->NumTotalRFPath; eRFPath++) {
if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath)) if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
continue; continue;
...@@ -97,11 +116,13 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev) ...@@ -97,11 +116,13 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
switch (eRFPath) { switch (eRFPath) {
case RF90_PATH_A: case RF90_PATH_A:
case RF90_PATH_C: case RF90_PATH_C:
u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV); u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs,
bRFSI_RFENV);
break; break;
case RF90_PATH_B : case RF90_PATH_B:
case RF90_PATH_D: case RF90_PATH_D:
u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16); u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs,
bRFSI_RFENV<<16);
break; break;
} }
...@@ -109,14 +130,19 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev) ...@@ -109,14 +130,19 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2,
rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); b3WireAddressLength, 0x0);
rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2,
b3WireDataLength, 0x0);
rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path) eRFPath, 0x0, bMask12Bits, 0xbf); rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path) eRFPath, 0x0,
bMask12Bits, 0xbf);
rtStatus = rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF, (enum rf90_radio_path)eRFPath); rtStatus = rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF,
if (rtStatus!= true) { (enum rf90_radio_path)eRFPath);
RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check Radio[%d] Fail!!\n", eRFPath); if (rtStatus != true) {
RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check "
"Radio[%d] Fail!!\n", eRFPath);
goto phy_RF8256_Config_ParaFile_Fail; goto phy_RF8256_Config_ParaFile_Fail;
} }
...@@ -124,34 +150,61 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev) ...@@ -124,34 +150,61 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
RF3_Final_Value = 0; RF3_Final_Value = 0;
switch (eRFPath) { switch (eRFPath) {
case RF90_PATH_A: case RF90_PATH_A:
while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) { while (RF3_Final_Value != RegValueToBeCheck &&
ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(enum rf90_radio_path)eRFPath); RetryTimes != 0) {
RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)eRFPath, RegOffSetToBeCheck, bMask12Bits); ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,
RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); (enum rf90_radio_path)eRFPath);
RF3_Final_Value = rtl8192_phy_QueryRFReg(dev,
(enum rf90_radio_path)eRFPath,
RegOffSetToBeCheck,
bMask12Bits);
RT_TRACE(COMP_RF, "RF %d %d register final "
"value: %x\n", eRFPath,
RegOffSetToBeCheck, RF3_Final_Value);
RetryTimes--; RetryTimes--;
} }
break; break;
case RF90_PATH_B: case RF90_PATH_B:
while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) { while (RF3_Final_Value != RegValueToBeCheck &&
ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(enum rf90_radio_path)eRFPath); RetryTimes != 0) {
RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)eRFPath, RegOffSetToBeCheck, bMask12Bits); ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,
RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); (enum rf90_radio_path)eRFPath);
RF3_Final_Value = rtl8192_phy_QueryRFReg(dev,
(enum rf90_radio_path)eRFPath,
RegOffSetToBeCheck,
bMask12Bits);
RT_TRACE(COMP_RF, "RF %d %d register final "
"value: %x\n", eRFPath,
RegOffSetToBeCheck, RF3_Final_Value);
RetryTimes--; RetryTimes--;
} }
break; break;
case RF90_PATH_C: case RF90_PATH_C:
while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) { while (RF3_Final_Value != RegValueToBeCheck &&
ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(enum rf90_radio_path)eRFPath); RetryTimes != 0) {
RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)eRFPath, RegOffSetToBeCheck, bMask12Bits); ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,
RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); (enum rf90_radio_path)eRFPath);
RF3_Final_Value = rtl8192_phy_QueryRFReg(dev,
(enum rf90_radio_path)eRFPath,
RegOffSetToBeCheck,
bMask12Bits);
RT_TRACE(COMP_RF, "RF %d %d register final "
"value: %x\n", eRFPath,
RegOffSetToBeCheck, RF3_Final_Value);
RetryTimes--; RetryTimes--;
} }
break; break;
case RF90_PATH_D: case RF90_PATH_D:
while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) { while (RF3_Final_Value != RegValueToBeCheck &&
ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(enum rf90_radio_path)eRFPath); RetryTimes != 0) {
RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)eRFPath, RegOffSetToBeCheck, bMask12Bits); ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,
RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); (enum rf90_radio_path)eRFPath);
RF3_Final_Value = rtl8192_phy_QueryRFReg(dev,
(enum rf90_radio_path)eRFPath,
RegOffSetToBeCheck, bMask12Bits);
RT_TRACE(COMP_RF, "RF %d %d register final "
"value: %x\n", eRFPath,
RegOffSetToBeCheck, RF3_Final_Value);
RetryTimes--; RetryTimes--;
} }
break; break;
...@@ -160,16 +213,19 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev) ...@@ -160,16 +213,19 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
switch (eRFPath) { switch (eRFPath) {
case RF90_PATH_A: case RF90_PATH_A:
case RF90_PATH_C: case RF90_PATH_C:
rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV,
u4RegValue);
break; break;
case RF90_PATH_B : case RF90_PATH_B:
case RF90_PATH_D: case RF90_PATH_D:
rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16,
u4RegValue);
break; break;
} }
if (ret) { if (ret) {
RT_TRACE(COMP_ERR, "phy_RF8256_Config_ParaFile():Radio[%d] Fail!!", eRFPath); RT_TRACE(COMP_ERR, "phy_RF8256_Config_ParaFile():"
"Radio[%d] Fail!!", eRFPath);
goto phy_RF8256_Config_ParaFile_Fail; goto phy_RF8256_Config_ParaFile_Fail;
} }
...@@ -183,18 +239,17 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev) ...@@ -183,18 +239,17 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
return false; return false;
} }
void PHY_SetRF8256CCKTxPower(struct net_device* dev, u8 powerlevel) void PHY_SetRF8256CCKTxPower(struct net_device *dev, u8 powerlevel)
{ {
u32 TxAGC=0; u32 TxAGC = 0;
struct r8192_priv *priv = rtllib_priv(dev); struct r8192_priv *priv = rtllib_priv(dev);
TxAGC = powerlevel; TxAGC = powerlevel;
if (priv->bDynamicTxLowPower == true) if (priv->bDynamicTxLowPower == true) {
{
if (priv->CustomerID == RT_CID_819x_Netcore) if (priv->CustomerID == RT_CID_819x_Netcore)
TxAGC = 0x22; TxAGC = 0x22;
else else
TxAGC += priv->CckPwEnl; TxAGC += priv->CckPwEnl;
} }
if (TxAGC > 0x24) if (TxAGC > 0x24)
TxAGC = 0x24; TxAGC = 0x24;
...@@ -202,7 +257,7 @@ void PHY_SetRF8256CCKTxPower(struct net_device* dev, u8 powerlevel) ...@@ -202,7 +257,7 @@ void PHY_SetRF8256CCKTxPower(struct net_device* dev, u8 powerlevel)
} }
void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel) void PHY_SetRF8256OFDMTxPower(struct net_device *dev, u8 powerlevel)
{ {
struct r8192_priv *priv = rtllib_priv(dev); struct r8192_priv *priv = rtllib_priv(dev);
u32 writeVal, powerBase0, powerBase1, writeVal_tmp; u32 writeVal, powerBase0, powerBase1, writeVal_tmp;
...@@ -211,13 +266,15 @@ void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel) ...@@ -211,13 +266,15 @@ void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel)
u8 byte0, byte1, byte2, byte3; u8 byte0, byte1, byte2, byte3;
powerBase0 = powerlevel + priv->LegacyHTTxPowerDiff; powerBase0 = powerlevel + priv->LegacyHTTxPowerDiff;
powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0; powerBase0 = (powerBase0 << 24) | (powerBase0 << 16) |
(powerBase0 << 8) | powerBase0;
powerBase1 = powerlevel; powerBase1 = powerlevel;
powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1; powerBase1 = (powerBase1 << 24) | (powerBase1 << 16) |
(powerBase1 << 8) | powerBase1;
for (index=0; index<6; index++) for (index = 0; index < 6; index++) {
{ writeVal = (u32)(priv->MCSTxPowerLevelOriginalOffset[index] +
writeVal = (u32)(priv->MCSTxPowerLevelOriginalOffset[index] + ((index<2)?powerBase0:powerBase1)); ((index < 2) ? powerBase0 : powerBase1));
byte0 = (u8)(writeVal & 0x7f); byte0 = (u8)(writeVal & 0x7f);
byte1 = (u8)((writeVal & 0x7f00)>>8); byte1 = (u8)((writeVal & 0x7f00)>>8);
byte2 = (u8)((writeVal & 0x7f0000)>>16); byte2 = (u8)((writeVal & 0x7f0000)>>16);
...@@ -231,20 +288,17 @@ void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel) ...@@ -231,20 +288,17 @@ void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel)
if (byte3 > 0x24) if (byte3 > 0x24)
byte3 = 0x24; byte3 = 0x24;
if (index == 3) if (index == 3) {
{ writeVal_tmp = (byte3 << 24) | (byte2 << 16) |
writeVal_tmp = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0; (byte1 << 8) | byte0;
priv->Pwr_Track = writeVal_tmp; priv->Pwr_Track = writeVal_tmp;
} }
if (priv->bDynamicTxHighPower == true) if (priv->bDynamicTxHighPower == true)
{
writeVal = 0x03030303; writeVal = 0x03030303;
}
else else
{ writeVal = (byte3 << 24) | (byte2 << 16) |
writeVal = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0; (byte1 << 8) | byte0;
}
rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal); rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal);
} }
......
drivers/staging/rtl8192e/r8190P_rtl8256.h
View file @ ac513a88
...@@ -21,10 +21,11 @@ ...@@ -21,10 +21,11 @@
#define RTL8225H #define RTL8225H
#define RTL819X_TOTAL_RF_PATH 2 #define RTL819X_TOTAL_RF_PATH 2
extern void PHY_SetRF8256Bandwidth(struct net_device* dev , enum ht_channel_width Bandwidth); extern void PHY_SetRF8256Bandwidth(struct net_device *dev,
extern bool PHY_RF8256_Config(struct net_device* dev); enum ht_channel_width Bandwidth);
extern bool phy_RF8256_Config_ParaFile(struct net_device* dev); extern bool PHY_RF8256_Config(struct net_device *dev);
extern void PHY_SetRF8256CCKTxPower(struct net_device* dev, u8 powerlevel); extern bool phy_RF8256_Config_ParaFile(struct net_device *dev);
extern void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel); extern void PHY_SetRF8256CCKTxPower(struct net_device *dev, u8 powerlevel);
extern void PHY_SetRF8256OFDMTxPower(struct net_device *dev, u8 powerlevel);
#endif #endif
drivers/staging/rtl8192e/r8192E_cmdpkt.c
View file @ ac513a88
...@@ -29,14 +29,14 @@ ...@@ -29,14 +29,14 @@
u32 temp[10];\ u32 temp[10];\
\ \
memcpy(temp, Address, 40);\ memcpy(temp, Address, 40);\
for (i = 0; i <40; i+=4)\ for (i = 0; i < 40; i += 4)\
printk("\r\n %08x", temp[i]);\ printk(KERN_INFO "\r\n %08x", temp[i]);\
}\ }
/*---------------------------Define functions---------------------------------*/ /*---------------------------Define functions---------------------------------*/
extern bool cmpk_message_handle_tx( extern bool cmpk_message_handle_tx(
struct net_device *dev, struct net_device *dev,
u8* code_virtual_address, u8 *code_virtual_address,
u32 packettype, u32 packettype,
u32 buffer_len) u32 buffer_len)
{ {
...@@ -53,7 +53,7 @@ ...@@ -53,7 +53,7 @@
struct tx_fwinfo_8190pci *pTxFwInfo = NULL; struct tx_fwinfo_8190pci *pTxFwInfo = NULL;
RT_TRACE(COMP_CMDPKT,"%s(),buffer_len is %d\n",__func__,buffer_len); RT_TRACE(COMP_CMDPKT, "%s(),buffer_len is %d\n", __func__, buffer_len);
firmware_init_param(dev); firmware_init_param(dev);
frag_threshold = pfirmware->cmdpacket_frag_thresold; frag_threshold = pfirmware->cmdpacket_frag_thresold;
...@@ -63,18 +63,19 @@ ...@@ -63,18 +63,19 @@
bLastIniPkt = 0; bLastIniPkt = 0;
} else { } else {
frag_length =(u16)(buffer_len - frag_offset); frag_length = (u16)(buffer_len - frag_offset);
bLastIniPkt = 1; bLastIniPkt = 1;
} }
skb = dev_alloc_skb(frag_length + priv->rtllib->tx_headroom + 4); skb = dev_alloc_skb(frag_length +
priv->rtllib->tx_headroom + 4);
if (skb == NULL) { if (skb == NULL) {
rt_status = false; rt_status = false;
goto Failed; goto Failed;
} }
memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev)); memcpy((unsigned char *)(skb->cb), &dev, sizeof(dev));
tcb_desc = (struct cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); tcb_desc = (struct cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
tcb_desc->queue_index = TXCMD_QUEUE; tcb_desc->queue_index = TXCMD_QUEUE;
tcb_desc->bCmdOrInit = DESC_PACKET_TYPE_NORMAL; tcb_desc->bCmdOrInit = DESC_PACKET_TYPE_NORMAL;
...@@ -83,18 +84,18 @@ ...@@ -83,18 +84,18 @@
seg_ptr = skb_put(skb, priv->rtllib->tx_headroom); seg_ptr = skb_put(skb, priv->rtllib->tx_headroom);
pTxFwInfo = (struct tx_fwinfo_8190pci *)seg_ptr; pTxFwInfo = (struct tx_fwinfo_8190pci *)seg_ptr;
memset(pTxFwInfo,0,sizeof(struct tx_fwinfo_8190pci)); memset(pTxFwInfo, 0, sizeof(struct tx_fwinfo_8190pci));
memset(pTxFwInfo,0x12,8); memset(pTxFwInfo, 0x12, 8);
seg_ptr = skb_put(skb, frag_length); seg_ptr = skb_put(skb, frag_length);
memcpy(seg_ptr, code_virtual_address, (u32)frag_length); memcpy(seg_ptr, code_virtual_address, (u32)frag_length);
priv->rtllib->softmac_hard_start_xmit(skb,dev); priv->rtllib->softmac_hard_start_xmit(skb, dev);
code_virtual_address += frag_length; code_virtual_address += frag_length;
frag_offset += frag_length; frag_offset += frag_length;
}while(frag_offset < buffer_len); } while (frag_offset < buffer_len);
write_nic_byte(dev, TPPoll, TPPoll_CQ); write_nic_byte(dev, TPPoll, TPPoll_CQ);
Failed: Failed:
...@@ -110,7 +111,8 @@ cmpk_count_txstatistic( ...@@ -110,7 +111,8 @@ cmpk_count_txstatistic(
#ifdef ENABLE_PS #ifdef ENABLE_PS
enum rt_rf_power_state rtState; enum rt_rf_power_state rtState;
pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE,
(pu1Byte)(&rtState));
if (rtState == eRfOff) if (rtState == eRfOff)
return; return;
...@@ -152,10 +154,7 @@ cmpk_count_txstatistic( ...@@ -152,10 +154,7 @@ cmpk_count_txstatistic(
static void static void cmpk_handle_tx_feedback(struct net_device *dev, u8 *pmsg)
cmpk_handle_tx_feedback(
struct net_device *dev,
u8 * pmsg)
{ {
struct r8192_priv *priv = rtllib_priv(dev); struct r8192_priv *priv = rtllib_priv(dev);
struct cmpk_txfb rx_tx_fb; /* */ struct cmpk_txfb rx_tx_fb; /* */
...@@ -163,41 +162,30 @@ cmpk_handle_tx_feedback( ...@@ -163,41 +162,30 @@ cmpk_handle_tx_feedback(
priv->stats.txfeedback++; priv->stats.txfeedback++;
memcpy((u8*)&rx_tx_fb, pmsg, sizeof(struct cmpk_txfb)); memcpy((u8 *)&rx_tx_fb, pmsg, sizeof(struct cmpk_txfb));
cmpk_count_txstatistic(dev, &rx_tx_fb); cmpk_count_txstatistic(dev, &rx_tx_fb);
} /* cmpk_Handle_Tx_Feedback */ } /* cmpk_Handle_Tx_Feedback */
void void cmdpkt_beacontimerinterrupt_819xusb(struct net_device *dev)
cmdpkt_beacontimerinterrupt_819xusb(
struct net_device *dev
)
{ {
struct r8192_priv *priv = rtllib_priv(dev); struct r8192_priv *priv = rtllib_priv(dev);
u16 tx_rate; u16 tx_rate;
{
if ((priv->rtllib->current_network.mode == IEEE_A) ||
(priv->rtllib->current_network.mode == IEEE_N_5G) ||
((priv->rtllib->current_network.mode == IEEE_N_24G) && (!priv->rtllib->pHTInfo->bCurSuppCCK)))
{
tx_rate = 60;
DMESG("send beacon frame tx rate is 6Mbpm\n");
}
else
{
tx_rate =10;
DMESG("send beacon frame tx rate is 1Mbpm\n");
}
if ((priv->rtllib->current_network.mode == IEEE_A) ||
(priv->rtllib->current_network.mode == IEEE_N_5G) ||
((priv->rtllib->current_network.mode == IEEE_N_24G) &&
(!priv->rtllib->pHTInfo->bCurSuppCCK))) {
tx_rate = 60;
DMESG("send beacon frame tx rate is 6Mbpm\n");
} else {
tx_rate = 10;
DMESG("send beacon frame tx rate is 1Mbpm\n");
} }
} }
static void static void cmpk_handle_interrupt_status(struct net_device *dev, u8 *pmsg)
cmpk_handle_interrupt_status(
struct net_device *dev,
u8* pmsg)
{ {
struct cmpk_intr_sta rx_intr_status; /* */ struct cmpk_intr_sta rx_intr_status; /* */
struct r8192_priv *priv = rtllib_priv(dev); struct r8192_priv *priv = rtllib_priv(dev);
...@@ -206,67 +194,55 @@ cmpk_handle_interrupt_status( ...@@ -206,67 +194,55 @@ cmpk_handle_interrupt_status(
rx_intr_status.length = pmsg[1]; rx_intr_status.length = pmsg[1];
if (rx_intr_status.length != (sizeof(struct cmpk_intr_sta) - 2)) if (rx_intr_status.length != (sizeof(struct cmpk_intr_sta) - 2)) {
{
DMESG("cmpk_Handle_Interrupt_Status: wrong length!\n"); DMESG("cmpk_Handle_Interrupt_Status: wrong length!\n");
return; return;
} }
if ( priv->rtllib->iw_mode == IW_MODE_ADHOC) if (priv->rtllib->iw_mode == IW_MODE_ADHOC) {
{
rx_intr_status.interrupt_status = *((u32 *)(pmsg + 4)); rx_intr_status.interrupt_status = *((u32 *)(pmsg + 4));
DMESG("interrupt status = 0x%x\n", rx_intr_status.interrupt_status); DMESG("interrupt status = 0x%x\n",
rx_intr_status.interrupt_status);
if (rx_intr_status.interrupt_status & ISR_TxBcnOk) if (rx_intr_status.interrupt_status & ISR_TxBcnOk) {
{
priv->rtllib->bibsscoordinator = true; priv->rtllib->bibsscoordinator = true;
priv->stats.txbeaconokint++; priv->stats.txbeaconokint++;
} } else if (rx_intr_status.interrupt_status & ISR_TxBcnErr) {
else if (rx_intr_status.interrupt_status & ISR_TxBcnErr)
{
priv->rtllib->bibsscoordinator = false; priv->rtllib->bibsscoordinator = false;
priv->stats.txbeaconerr++; priv->stats.txbeaconerr++;
} }
if (rx_intr_status.interrupt_status & ISR_BcnTimerIntr) if (rx_intr_status.interrupt_status & ISR_BcnTimerIntr)
{
cmdpkt_beacontimerinterrupt_819xusb(dev); cmdpkt_beacontimerinterrupt_819xusb(dev);
}
} }
DMESG("<---- cmpk_handle_interrupt_status()\n"); DMESG("<---- cmpk_handle_interrupt_status()\n");
} /* cmpk_handle_interrupt_status */ } /* cmpk_handle_interrupt_status */
static void static void cmpk_handle_query_config_rx(struct net_device *dev, u8 *pmsg)
cmpk_handle_query_config_rx(
struct net_device *dev,
u8* pmsg)
{ {
cmpk_query_cfg_t rx_query_cfg; /* */ cmpk_query_cfg_t rx_query_cfg; /* */
rx_query_cfg.cfg_action = (pmsg[4] & 0x80000000)>>31; rx_query_cfg.cfg_action = (pmsg[4] & 0x80000000)>>31;
rx_query_cfg.cfg_type = (pmsg[4] & 0x60) >> 5; rx_query_cfg.cfg_type = (pmsg[4] & 0x60) >> 5;
rx_query_cfg.cfg_size = (pmsg[4] & 0x18) >> 3; rx_query_cfg.cfg_size = (pmsg[4] & 0x18) >> 3;
rx_query_cfg.cfg_page = (pmsg[6] & 0x0F) >> 0; rx_query_cfg.cfg_page = (pmsg[6] & 0x0F) >> 0;
rx_query_cfg.cfg_offset = pmsg[7]; rx_query_cfg.cfg_offset = pmsg[7];
rx_query_cfg.value = (pmsg[8] << 24) | (pmsg[9] << 16) | rx_query_cfg.value = (pmsg[8] << 24) | (pmsg[9] << 16) |
(pmsg[10] << 8) | (pmsg[11] << 0); (pmsg[10] << 8) | (pmsg[11] << 0);
rx_query_cfg.mask = (pmsg[12] << 24) | (pmsg[13] << 16) | rx_query_cfg.mask = (pmsg[12] << 24) | (pmsg[13] << 16) |
(pmsg[14] << 8) | (pmsg[15] << 0); (pmsg[14] << 8) | (pmsg[15] << 0);
} /* cmpk_Handle_Query_Config_Rx */ } /* cmpk_Handle_Query_Config_Rx */
static void cmpk_count_tx_status( struct net_device *dev, static void cmpk_count_tx_status(struct net_device *dev,
struct cmpk_tx_status *pstx_status) struct cmpk_tx_status *pstx_status)
{ {
struct r8192_priv *priv = rtllib_priv(dev); struct r8192_priv *priv = rtllib_priv(dev);
...@@ -274,12 +250,11 @@ static void cmpk_count_tx_status( struct net_device *dev, ...@@ -274,12 +250,11 @@ static void cmpk_count_tx_status( struct net_device *dev,
enum rt_rf_power_state rtstate; enum rt_rf_power_state rtstate;
pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE,
(pu1Byte)(&rtState));
if (rtState == eRfOff) if (rtState == eRfOff)
{
return; return;
}
#endif #endif
priv->stats.txfeedbackok += pstx_status->txok; priv->stats.txfeedbackok += pstx_status->txok;
...@@ -309,68 +284,56 @@ static void cmpk_count_tx_status( struct net_device *dev, ...@@ -309,68 +284,56 @@ static void cmpk_count_tx_status( struct net_device *dev,
static void static void cmpk_handle_tx_status(struct net_device *dev, u8 *pmsg)
cmpk_handle_tx_status(
struct net_device *dev,
u8* pmsg)
{ {
struct cmpk_tx_status rx_tx_sts; /* */ struct cmpk_tx_status rx_tx_sts; /* */
memcpy((void*)&rx_tx_sts, (void*)pmsg, sizeof(struct cmpk_tx_status)); memcpy((void *)&rx_tx_sts, (void *)pmsg, sizeof(struct cmpk_tx_status));
cmpk_count_tx_status(dev, &rx_tx_sts); cmpk_count_tx_status(dev, &rx_tx_sts);
} }
static void cmpk_handle_tx_rate_history(struct net_device *dev, u8 *pmsg)
static void
cmpk_handle_tx_rate_history(
struct net_device *dev,
u8* pmsg)
{ {
struct cmpk_tx_rahis *ptxrate; struct cmpk_tx_rahis *ptxrate;
u8 i, j; u8 i, j;
u16 length = sizeof(struct cmpk_tx_rahis); u16 length = sizeof(struct cmpk_tx_rahis);
u32 *ptemp; u32 *ptemp;
struct r8192_priv *priv = rtllib_priv(dev); struct r8192_priv *priv = rtllib_priv(dev);
#ifdef ENABLE_PS #ifdef ENABLE_PS
pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE,
(pu1Byte)(&rtState));
if (rtState == eRfOff) if (rtState == eRfOff)
{
return; return;
}
#endif #endif
ptemp = (u32 *)pmsg; ptemp = (u32 *)pmsg;
for (i = 0; i < (length/4); i++) for (i = 0; i < (length / 4); i++) {
{
u16 temp1, temp2; u16 temp1, temp2;
temp1 = ptemp[i]&0x0000FFFF; temp1 = ptemp[i] & 0x0000FFFF;
temp2 = ptemp[i]>>16; temp2 = ptemp[i] >> 16;
ptemp[i] = (temp1<<16)|temp2; ptemp[i] = (temp1 << 16) | temp2;
} }
ptxrate = (struct cmpk_tx_rahis *)pmsg; ptxrate = (struct cmpk_tx_rahis *)pmsg;
if (ptxrate == NULL ) if (ptxrate == NULL)
{
return; return;
}
for (i = 0; i < 16; i++) for (i = 0; i < 16; i++) {
{
if (i < 4) if (i < 4)
priv->stats.txrate.cck[i] += ptxrate->cck[i]; priv->stats.txrate.cck[i] += ptxrate->cck[i];
if (i< 8) if (i < 8)
priv->stats.txrate.ofdm[i] += ptxrate->ofdm[i]; priv->stats.txrate.ofdm[i] += ptxrate->ofdm[i];
for (j = 0; j < 4; j++) for (j = 0; j < 4; j++)
priv->stats.txrate.ht_mcs[j][i] += ptxrate->ht_mcs[j][i]; priv->stats.txrate.ht_mcs[j][i] +=
ptxrate->ht_mcs[j][i];
} }
} }
...@@ -389,8 +352,7 @@ cmpk_message_handle_rx( ...@@ -389,8 +352,7 @@ cmpk_message_handle_rx(
RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx()\n"); RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx()\n");
if (/*(prfd->queue_id != CMPK_RX_QUEUE_ID) || */(pstats== NULL)) if (pstats == NULL) {
{
/* Print error message. */ /* Print error message. */
/*RT_TRACE(COMP_SEND, DebugLevel, /*RT_TRACE(COMP_SEND, DebugLevel,
("\n\r[CMPK]-->Err queue id or pointer"));*/ ("\n\r[CMPK]-->Err queue id or pointer"));*/
...@@ -403,43 +365,49 @@ cmpk_message_handle_rx( ...@@ -403,43 +365,49 @@ cmpk_message_handle_rx(
element_id = pcmd_buff[0]; element_id = pcmd_buff[0];
while (total_length > 0 || exe_cnt++ >100) while (total_length > 0 || exe_cnt++ > 100) {
{
element_id = pcmd_buff[0]; element_id = pcmd_buff[0];
switch (element_id) { switch (element_id) {
case RX_TX_FEEDBACK: case RX_TX_FEEDBACK:
RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():RX_TX_FEEDBACK\n"); RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
cmpk_handle_tx_feedback (dev, pcmd_buff); "RX_TX_FEEDBACK\n");
cmpk_handle_tx_feedback(dev, pcmd_buff);
cmd_length = CMPK_RX_TX_FB_SIZE; cmd_length = CMPK_RX_TX_FB_SIZE;
break; break;
case RX_INTERRUPT_STATUS: case RX_INTERRUPT_STATUS:
RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():RX_INTERRUPT_STATUS\n"); RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
"RX_INTERRUPT_STATUS\n");
cmpk_handle_interrupt_status(dev, pcmd_buff); cmpk_handle_interrupt_status(dev, pcmd_buff);
cmd_length = sizeof(struct cmpk_intr_sta); cmd_length = sizeof(struct cmpk_intr_sta);
break; break;
case BOTH_QUERY_CONFIG: case BOTH_QUERY_CONFIG:
RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():BOTH_QUERY_CONFIG\n"); RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
"BOTH_QUERY_CONFIG\n");
cmpk_handle_query_config_rx(dev, pcmd_buff); cmpk_handle_query_config_rx(dev, pcmd_buff);
cmd_length = CMPK_BOTH_QUERY_CONFIG_SIZE; cmd_length = CMPK_BOTH_QUERY_CONFIG_SIZE;
break; break;
case RX_TX_STATUS: case RX_TX_STATUS:
RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():RX_TX_STATUS\n"); RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
"RX_TX_STATUS\n");
cmpk_handle_tx_status(dev, pcmd_buff); cmpk_handle_tx_status(dev, pcmd_buff);
cmd_length = CMPK_RX_TX_STS_SIZE; cmd_length = CMPK_RX_TX_STS_SIZE;
break; break;
case RX_TX_PER_PKT_FEEDBACK: case RX_TX_PER_PKT_FEEDBACK:
RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():RX_TX_PER_PKT_FEEDBACK\n"); RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
"RX_TX_PER_PKT_FEEDBACK\n");
cmd_length = CMPK_RX_TX_FB_SIZE; cmd_length = CMPK_RX_TX_FB_SIZE;
break; break;
case RX_TX_RATE_HISTORY: case RX_TX_RATE_HISTORY:
RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():RX_TX_HISTORY\n"); RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
"RX_TX_HISTORY\n");
cmpk_handle_tx_rate_history(dev, pcmd_buff); cmpk_handle_tx_rate_history(dev, pcmd_buff);
cmd_length = CMPK_TX_RAHIS_SIZE; cmd_length = CMPK_TX_RAHIS_SIZE;
break; break;
default: default:
RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():unknow CMD Element\n"); RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
"unknow CMD Element\n");
return 1; return 1;
} }
......
drivers/staging/rtl8192e/r8192E_cmdpkt.h
View file @ ac513a88
...@@ -18,16 +18,16 @@ ...@@ -18,16 +18,16 @@
******************************************************************************/ ******************************************************************************/
#ifndef R819XUSB_CMDPKT_H #ifndef R819XUSB_CMDPKT_H
#define R819XUSB_CMDPKT_H #define R819XUSB_CMDPKT_H
#define CMPK_RX_TX_FB_SIZE sizeof(struct cmpk_txfb) #define CMPK_RX_TX_FB_SIZE sizeof(struct cmpk_txfb)
#define CMPK_TX_SET_CONFIG_SIZE sizeof(struct cmpk_set_cfg) #define CMPK_TX_SET_CONFIG_SIZE sizeof(struct cmpk_set_cfg)
#define CMPK_BOTH_QUERY_CONFIG_SIZE sizeof(struct cmpk_set_cfg) #define CMPK_BOTH_QUERY_CONFIG_SIZE sizeof(struct cmpk_set_cfg)
#define CMPK_RX_TX_STS_SIZE sizeof(struct cmpk_tx_status) #define CMPK_RX_TX_STS_SIZE sizeof(struct cmpk_tx_status)
#define CMPK_RX_DBG_MSG_SIZE sizeof(struct cmpk_rx_dbginfo) #define CMPK_RX_DBG_MSG_SIZE sizeof(struct cmpk_rx_dbginfo)
#define CMPK_TX_RAHIS_SIZE sizeof(struct cmpk_tx_rahis) #define CMPK_TX_RAHIS_SIZE sizeof(struct cmpk_tx_rahis)
#define ISR_TxBcnOk BIT27 #define ISR_TxBcnOk BIT27
#define ISR_TxBcnErr BIT26 #define ISR_TxBcnErr BIT26
#define ISR_BcnTimerIntr BIT13 #define ISR_BcnTimerIntr BIT13
struct cmpk_txfb { struct cmpk_txfb {
...@@ -110,7 +110,7 @@ struct cmpk_tx_status { ...@@ -110,7 +110,7 @@ struct cmpk_tx_status {
u16 reserve3_23; u16 reserve3_23;
u8 reserve3_1; u8 reserve3_1;
u8 rate; u8 rate;
}__packed; } __packed;
struct cmpk_rx_dbginfo { struct cmpk_rx_dbginfo {
u16 reserve1; u16 reserve1;
...@@ -138,19 +138,22 @@ struct cmpk_tx_rahis { ...@@ -138,19 +138,22 @@ struct cmpk_tx_rahis {
} __packed; } __packed;
enum cmpk_element { enum cmpk_element {
RX_TX_FEEDBACK = 0, RX_TX_FEEDBACK = 0,
RX_INTERRUPT_STATUS = 1, RX_INTERRUPT_STATUS = 1,
TX_SET_CONFIG = 2, TX_SET_CONFIG = 2,
BOTH_QUERY_CONFIG = 3, BOTH_QUERY_CONFIG = 3,
RX_TX_STATUS = 4, RX_TX_STATUS = 4,
RX_DBGINFO_FEEDBACK = 5, RX_DBGINFO_FEEDBACK = 5,
RX_TX_PER_PKT_FEEDBACK = 6, RX_TX_PER_PKT_FEEDBACK = 6,
RX_TX_RATE_HISTORY = 7, RX_TX_RATE_HISTORY = 7,
RX_CMD_ELE_MAX RX_CMD_ELE_MAX
}; };
extern u32 cmpk_message_handle_rx(struct net_device *dev, struct rtllib_rx_stats * pstats); extern u32 cmpk_message_handle_rx(struct net_device *dev,
extern bool cmpk_message_handle_tx(struct net_device *dev, u8* codevirtualaddress, u32 packettype, u32 buffer_len); struct rtllib_rx_stats *pstats);
extern bool cmpk_message_handle_tx(struct net_device *dev,
u8 *codevirtualaddress, u32 packettype,
u32 buffer_len);
#endif #endif
drivers/staging/rtl8192e/r8192E_dev.c
View file @ ac513a88
...@@ -1662,15 +1662,15 @@ void rtl8192_process_phyinfo(struct r8192_priv * priv, u8 *buffer,struct rtllib_ ...@@ -1662,15 +1662,15 @@ void rtl8192_process_phyinfo(struct r8192_priv * priv, u8 *buffer,struct rtllib_
if (pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath]) if (pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
{ {
priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] =
( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) + ( (priv->stats.rx_rssi_percentage[rfpath]*(RX_SMOOTH-1)) +
(pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor); (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(RX_SMOOTH);
priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1; priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
} }
else else
{ {
priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] =
( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) + ( (priv->stats.rx_rssi_percentage[rfpath]*(RX_SMOOTH-1)) +
(pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor); (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(RX_SMOOTH);
} }
RT_TRACE(COMP_DBG,"Jacken -> priv->RxStats.RxRSSIPercentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] ); RT_TRACE(COMP_DBG,"Jacken -> priv->RxStats.RxRSSIPercentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
} }
...@@ -1708,15 +1708,15 @@ void rtl8192_process_phyinfo(struct r8192_priv * priv, u8 *buffer,struct rtllib_ ...@@ -1708,15 +1708,15 @@ void rtl8192_process_phyinfo(struct r8192_priv * priv, u8 *buffer,struct rtllib_
if (pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb) if (pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
{ {
priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb =
( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) + ( ((priv->undecorated_smoothed_pwdb)*(RX_SMOOTH-1)) +
(pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor); (pprevious_stats->RxPWDBAll)) /(RX_SMOOTH);
priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1; priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
} }
else else
{ {
priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb =
( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) + ( ((priv->undecorated_smoothed_pwdb)*(RX_SMOOTH-1)) +
(pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor); (pprevious_stats->RxPWDBAll)) /(RX_SMOOTH);
} }
rtl819x_update_rxsignalstatistics8190pci(priv,pprevious_stats); rtl819x_update_rxsignalstatistics8190pci(priv,pprevious_stats);
} }
...@@ -1755,8 +1755,8 @@ void rtl8192_process_phyinfo(struct r8192_priv * priv, u8 *buffer,struct rtllib_ ...@@ -1755,8 +1755,8 @@ void rtl8192_process_phyinfo(struct r8192_priv * priv, u8 *buffer,struct rtllib_
priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream]; priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
} }
priv->stats.rx_evm_percentage[nspatial_stream] = priv->stats.rx_evm_percentage[nspatial_stream] =
( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) + ( (priv->stats.rx_evm_percentage[nspatial_stream]* (RX_SMOOTH-1)) +
(pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor); (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (RX_SMOOTH);
} }
} }
} }
......
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