Commit b172fd0c authored by Alban Bedel's avatar Alban Bedel Committed by Mark Brown

spi: ath79: Enable support for compile test

To allow building this driver in compile test we need to remove all
dependency on headers from arch/mips/include. To allow this we
explicitly define all the registers locally instead of using
ar71xx_regs.h and we move the platform data struct definition to
include/linux/platform_data/spi-ath79.h.
Signed-off-by: default avatarAlban Bedel <albeu@free.fr>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 797622d7
...@@ -13,7 +13,7 @@ ...@@ -13,7 +13,7 @@
#define _ATH79_DEV_SPI_H #define _ATH79_DEV_SPI_H
#include <linux/spi/spi.h> #include <linux/spi/spi.h>
#include <asm/mach-ath79/ath79_spi_platform.h> #include <linux/platform_data/spi-ath79.h>
void ath79_register_spi(struct ath79_spi_platform_data *pdata, void ath79_register_spi(struct ath79_spi_platform_data *pdata,
struct spi_board_info const *info, struct spi_board_info const *info,
......
...@@ -63,7 +63,7 @@ config SPI_ALTERA ...@@ -63,7 +63,7 @@ config SPI_ALTERA
config SPI_ATH79 config SPI_ATH79
tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver" tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver"
depends on ATH79 depends on ATH79 || COMPILE_TEST
select SPI_BITBANG select SPI_BITBANG
help help
This enables support for the SPI controller present on the This enables support for the SPI controller present on the
......
...@@ -23,15 +23,24 @@ ...@@ -23,15 +23,24 @@
#include <linux/bitops.h> #include <linux/bitops.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/err.h> #include <linux/err.h>
#include <linux/platform_data/spi-ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79_spi_platform.h>
#define DRV_NAME "ath79-spi" #define DRV_NAME "ath79-spi"
#define ATH79_SPI_RRW_DELAY_FACTOR 12000 #define ATH79_SPI_RRW_DELAY_FACTOR 12000
#define MHZ (1000 * 1000) #define MHZ (1000 * 1000)
#define AR71XX_SPI_REG_FS 0x00 /* Function Select */
#define AR71XX_SPI_REG_CTRL 0x04 /* SPI Control */
#define AR71XX_SPI_REG_IOC 0x08 /* SPI I/O Control */
#define AR71XX_SPI_REG_RDS 0x0c /* Read Data Shift */
#define AR71XX_SPI_FS_GPIO BIT(0) /* Enable GPIO mode */
#define AR71XX_SPI_IOC_DO BIT(0) /* Data Out pin */
#define AR71XX_SPI_IOC_CLK BIT(8) /* CLK pin */
#define AR71XX_SPI_IOC_CS(n) BIT(16 + (n))
struct ath79_spi { struct ath79_spi {
struct spi_bitbang bitbang; struct spi_bitbang bitbang;
u32 ioc_base; u32 ioc_base;
......
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