Commit b1ae8d3a authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'x86-fixes-for-linus' of...

Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, geode: add a VSA2 ID for General Software
  x86: use BOOTMEM_EXCLUSIVE on 32-bit
  x86, 32-bit: fix boot failure on TSC-less processors
  x86: fix NULL pointer deref in __switch_to
  x86: set PAE PHYSICAL_MASK_SHIFT to 44 bits.
parents 55017923 ffe6e1da
...@@ -166,6 +166,8 @@ int geode_has_vsa2(void) ...@@ -166,6 +166,8 @@ int geode_has_vsa2(void)
static int has_vsa2 = -1; static int has_vsa2 = -1;
if (has_vsa2 == -1) { if (has_vsa2 == -1) {
u16 val;
/* /*
* The VSA has virtual registers that we can query for a * The VSA has virtual registers that we can query for a
* signature. * signature.
...@@ -173,7 +175,8 @@ int geode_has_vsa2(void) ...@@ -173,7 +175,8 @@ int geode_has_vsa2(void)
outw(VSA_VR_UNLOCK, VSA_VRC_INDEX); outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX); outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
has_vsa2 = (inw(VSA_VRC_DATA) == VSA_SIG); val = inw(VSA_VRC_DATA);
has_vsa2 = (val == AMD_VSA_SIG || val == GSW_VSA_SIG);
} }
return has_vsa2; return has_vsa2;
......
...@@ -333,6 +333,7 @@ void flush_thread(void) ...@@ -333,6 +333,7 @@ void flush_thread(void)
/* /*
* Forget coprocessor state.. * Forget coprocessor state..
*/ */
tsk->fpu_counter = 0;
clear_fpu(tsk); clear_fpu(tsk);
clear_used_math(); clear_used_math();
} }
......
...@@ -294,6 +294,7 @@ void flush_thread(void) ...@@ -294,6 +294,7 @@ void flush_thread(void)
/* /*
* Forget coprocessor state.. * Forget coprocessor state..
*/ */
tsk->fpu_counter = 0;
clear_fpu(tsk); clear_fpu(tsk);
clear_used_math(); clear_used_math();
} }
......
...@@ -532,10 +532,16 @@ static void __init reserve_crashkernel(void) ...@@ -532,10 +532,16 @@ static void __init reserve_crashkernel(void)
(unsigned long)(crash_size >> 20), (unsigned long)(crash_size >> 20),
(unsigned long)(crash_base >> 20), (unsigned long)(crash_base >> 20),
(unsigned long)(total_mem >> 20)); (unsigned long)(total_mem >> 20));
if (reserve_bootmem(crash_base, crash_size,
BOOTMEM_EXCLUSIVE) < 0) {
printk(KERN_INFO "crashkernel reservation "
"failed - memory is in use\n");
return;
}
crashk_res.start = crash_base; crashk_res.start = crash_base;
crashk_res.end = crash_base + crash_size - 1; crashk_res.end = crash_base + crash_size - 1;
reserve_bootmem(crash_base, crash_size,
BOOTMEM_DEFAULT);
} else } else
printk(KERN_INFO "crashkernel reservation failed - " printk(KERN_INFO "crashkernel reservation failed - "
"you have to specify a base address\n"); "you have to specify a base address\n");
......
...@@ -14,7 +14,10 @@ ...@@ -14,7 +14,10 @@
#include "mach_timer.h" #include "mach_timer.h"
static int tsc_disabled; /* native_sched_clock() is called before tsc_init(), so
we must start with the TSC soft disabled to prevent
erroneous rdtsc usage on !cpu_has_tsc processors */
static int tsc_disabled = -1;
/* /*
* On some systems the TSC frequency does not * On some systems the TSC frequency does not
...@@ -402,25 +405,20 @@ void __init tsc_init(void) ...@@ -402,25 +405,20 @@ void __init tsc_init(void)
{ {
int cpu; int cpu;
if (!cpu_has_tsc || tsc_disabled) { if (!cpu_has_tsc || tsc_disabled > 0)
/* Disable the TSC in case of !cpu_has_tsc */
tsc_disabled = 1;
return; return;
}
cpu_khz = calculate_cpu_khz(); cpu_khz = calculate_cpu_khz();
tsc_khz = cpu_khz; tsc_khz = cpu_khz;
if (!cpu_khz) { if (!cpu_khz) {
mark_tsc_unstable("could not calculate TSC khz"); mark_tsc_unstable("could not calculate TSC khz");
/*
* We need to disable the TSC completely in this case
* to prevent sched_clock() from using it.
*/
tsc_disabled = 1;
return; return;
} }
/* now allow native_sched_clock() to use rdtsc */
tsc_disabled = 0;
printk("Detected %lu.%03lu MHz processor.\n", printk("Detected %lu.%03lu MHz processor.\n",
(unsigned long)cpu_khz / 1000, (unsigned long)cpu_khz / 1000,
(unsigned long)cpu_khz % 1000); (unsigned long)cpu_khz % 1000);
......
...@@ -112,8 +112,8 @@ extern int geode_get_dev_base(unsigned int dev); ...@@ -112,8 +112,8 @@ extern int geode_get_dev_base(unsigned int dev);
#define VSA_VR_UNLOCK 0xFC53 /* unlock virtual register */ #define VSA_VR_UNLOCK 0xFC53 /* unlock virtual register */
#define VSA_VR_SIGNATURE 0x0003 #define VSA_VR_SIGNATURE 0x0003
#define VSA_VR_MEM_SIZE 0x0200 #define VSA_VR_MEM_SIZE 0x0200
#define VSA_SIG 0x4132 /* signature is ascii 'VSA2' */ #define AMD_VSA_SIG 0x4132 /* signature is ascii 'VSA2' */
#define GSW_VSA_SIG 0x534d /* General Software signature */
/* GPIO */ /* GPIO */
#define GPIO_OUTPUT_VAL 0x00 #define GPIO_OUTPUT_VAL 0x00
......
...@@ -14,7 +14,8 @@ ...@@ -14,7 +14,8 @@
#define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL) #define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
#ifdef CONFIG_X86_PAE #ifdef CONFIG_X86_PAE
#define __PHYSICAL_MASK_SHIFT 36 /* 44=32+12, the limit we can fit into an unsigned long pfn */
#define __PHYSICAL_MASK_SHIFT 44
#define __VIRTUAL_MASK_SHIFT 32 #define __VIRTUAL_MASK_SHIFT 32
#define PAGETABLE_LEVELS 3 #define PAGETABLE_LEVELS 3
......
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