Commit b2ea7f83 authored by Sebastian Reichel's avatar Sebastian Reichel Committed by David S. Miller

ARM: dts: imx6q-b650v3: Add switch port configuration

This adds support for the Marvell switch and names the network
ports according to the labels, that can be found next to the
connectors. The switch is connected to the host system using a
PCI based network card.

The PCI bus configuration has been written using the following
information:

root@b650v3# lspci -tv
-[0000:00]---00.0-[01]----00.0  Intel Corporation I210 Gigabit Network Connection
root@b650v3# lspci -nn
00:00.0 PCI bridge [0604]: Synopsys, Inc. Device [16c3:abcd] (rev 01)
01:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03)
Signed-off-by: default avatarSebastian Reichel <sebastian.reichel@collabora.co.uk>
Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e6b22e41
...@@ -111,3 +111,55 @@ &usbphy1 { ...@@ -111,3 +111,55 @@ &usbphy1 {
fsl,tx-cal-45-dp-ohms = <55>; fsl,tx-cal-45-dp-ohms = <55>;
fsl,tx-d-cal = <100>; fsl,tx-d-cal = <100>;
}; };
&pci_root {
/* Intel Corporation I210 Gigabit Network Connection */
switch_nic: ethernet@3,0 {
compatible = "pci8086,1533";
reg = <0x00010000 0 0 0 0>;
};
};
&switch_ports {
port@0 {
reg = <0>;
label = "enacq";
phy-handle = <&switchphy0>;
};
port@1 {
reg = <1>;
label = "eneport1";
phy-handle = <&switchphy1>;
};
port@2 {
reg = <2>;
label = "enix";
phy-handle = <&switchphy2>;
};
port@3 {
reg = <3>;
label = "enid";
phy-handle = <&switchphy3>;
};
port@4 {
reg = <4>;
label = "cpu";
ethernet = <&switch_nic>;
phy-handle = <&switchphy4>;
};
port@5 {
reg = <5>;
label = "enembc";
/* connected to Ethernet MAC of AT91RM9200 in MII mode */
fixed-link {
speed = <100>;
full-duplex;
};
};
};
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