Commit b2eabd4c authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Felix Fietkau

mt76: move queue initialization in mt76x02_mmio.c

Move mt76x02_dma_init, mt76x02_init_rx_queue and mt76x02_init_tx_queue
routines in mt76x02-lib module in order to be reused by mt76x0 driver
Signed-off-by: default avatarLorenzo Bianconi <lorenzo.bianconi@redhat.com>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent 957068c2
...@@ -518,8 +518,8 @@ static inline u16 mt76_rev(struct mt76_dev *dev) ...@@ -518,8 +518,8 @@ static inline u16 mt76_rev(struct mt76_dev *dev)
#define mt76xx_chip(dev) mt76_chip(&((dev)->mt76)) #define mt76xx_chip(dev) mt76_chip(&((dev)->mt76))
#define mt76xx_rev(dev) mt76_rev(&((dev)->mt76)) #define mt76xx_rev(dev) mt76_rev(&((dev)->mt76))
#define mt76_init_queues(dev) (dev)->mt76.queue_ops->init(&((dev)->mt76)) #define __mt76_init_queues(dev) (dev)->queue_ops->init((dev))
#define mt76_queue_alloc(dev, ...) (dev)->mt76.queue_ops->alloc(&((dev)->mt76), __VA_ARGS__) #define __mt76_queue_alloc(dev, ...) (dev)->queue_ops->alloc((dev), __VA_ARGS__)
#define mt76_queue_add_buf(dev, ...) (dev)->mt76.queue_ops->add_buf(&((dev)->mt76), __VA_ARGS__) #define mt76_queue_add_buf(dev, ...) (dev)->mt76.queue_ops->add_buf(&((dev)->mt76), __VA_ARGS__)
#define mt76_queue_rx_reset(dev, ...) (dev)->mt76.queue_ops->rx_reset(&((dev)->mt76), __VA_ARGS__) #define mt76_queue_rx_reset(dev, ...) (dev)->mt76.queue_ops->rx_reset(&((dev)->mt76), __VA_ARGS__)
#define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__) #define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__)
......
...@@ -48,6 +48,9 @@ ...@@ -48,6 +48,9 @@
#define MT_MCU_MSG_TYPE GENMASK(31, 30) #define MT_MCU_MSG_TYPE GENMASK(31, 30)
#define MT_MCU_MSG_TYPE_CMD BIT(30) #define MT_MCU_MSG_TYPE_CMD BIT(30)
#define MT_RX_HEADROOM 32
#define MT76X02_RX_RING_SIZE 256
enum dma_msg_port { enum dma_msg_port {
WLAN_PORT, WLAN_PORT,
CPU_RX_PORT, CPU_RX_PORT,
...@@ -67,6 +70,7 @@ mt76x02_wait_for_wpdma(struct mt76_dev *dev, int timeout) ...@@ -67,6 +70,7 @@ mt76x02_wait_for_wpdma(struct mt76_dev *dev, int timeout)
0, timeout); 0, timeout);
} }
int mt76x02_dma_init(struct mt76_dev *dev);
void mt76x02_dma_enable(struct mt76_dev *dev); void mt76x02_dma_enable(struct mt76_dev *dev);
void mt76x02_dma_disable(struct mt76_dev *dev); void mt76x02_dma_disable(struct mt76_dev *dev);
......
...@@ -19,7 +19,92 @@ ...@@ -19,7 +19,92 @@
#include "mt76.h" #include "mt76.h"
#include "mt76x02_dma.h" #include "mt76x02_dma.h"
#include "mt76x02_regs.h" #include "mt76x02_util.h"
#include "mt76x02_mac.h"
static int
mt76x02_init_tx_queue(struct mt76_dev *dev, struct mt76_queue *q,
int idx, int n_desc)
{
int ret;
q->regs = dev->mmio.regs + MT_TX_RING_BASE + idx * MT_RING_SIZE;
q->ndesc = n_desc;
q->hw_idx = idx;
ret = __mt76_queue_alloc(dev, q);
if (ret)
return ret;
mt76x02_irq_enable(dev, MT_INT_TX_DONE(idx));
return 0;
}
static int
mt76x02_init_rx_queue(struct mt76_dev *dev, struct mt76_queue *q,
int idx, int n_desc, int bufsize)
{
int ret;
q->regs = dev->mmio.regs + MT_RX_RING_BASE + idx * MT_RING_SIZE;
q->ndesc = n_desc;
q->buf_size = bufsize;
ret = __mt76_queue_alloc(dev, q);
if (ret)
return ret;
mt76x02_irq_enable(dev, MT_INT_RX_DONE(idx));
return 0;
}
int mt76x02_dma_init(struct mt76_dev *dev)
{
struct mt76_txwi_cache __maybe_unused *t;
struct mt76_queue *q;
int i, ret;
BUILD_BUG_ON(sizeof(t->txwi) < sizeof(struct mt76x02_txwi));
BUILD_BUG_ON(sizeof(struct mt76x02_rxwi) > MT_RX_HEADROOM);
mt76_dma_attach(dev);
__mt76_wr(dev, MT_WPDMA_RST_IDX, ~0);
for (i = 0; i < IEEE80211_NUM_ACS; i++) {
ret = mt76x02_init_tx_queue(dev, &dev->q_tx[i],
mt76_ac_to_hwq(i),
MT_TX_RING_SIZE);
if (ret)
return ret;
}
ret = mt76x02_init_tx_queue(dev, &dev->q_tx[MT_TXQ_PSD],
MT_TX_HW_QUEUE_MGMT, MT_TX_RING_SIZE);
if (ret)
return ret;
ret = mt76x02_init_tx_queue(dev, &dev->q_tx[MT_TXQ_MCU],
MT_TX_HW_QUEUE_MCU, MT_MCU_RING_SIZE);
if (ret)
return ret;
ret = mt76x02_init_rx_queue(dev, &dev->q_rx[MT_RXQ_MCU], 1,
MT_MCU_RING_SIZE, MT_RX_BUF_SIZE);
if (ret)
return ret;
q = &dev->q_rx[MT_RXQ_MAIN];
q->buf_offset = MT_RX_HEADROOM - sizeof(struct mt76x02_rxwi);
ret = mt76x02_init_rx_queue(dev, q, 0, MT76X02_RX_RING_SIZE,
MT_RX_BUF_SIZE);
if (ret)
return ret;
return __mt76_init_queues(dev);
}
EXPORT_SYMBOL_GPL(mt76x02_dma_init);
void mt76x02_set_irq_mask(struct mt76_dev *dev, u32 clear, u32 set) void mt76x02_set_irq_mask(struct mt76_dev *dev, u32 clear, u32 set)
{ {
......
...@@ -35,9 +35,6 @@ ...@@ -35,9 +35,6 @@
#define MT7662U_FIRMWARE "mediatek/mt7662u.bin" #define MT7662U_FIRMWARE "mediatek/mt7662u.bin"
#define MT7662U_ROM_PATCH "mediatek/mt7662u_rom_patch.bin" #define MT7662U_ROM_PATCH "mediatek/mt7662u_rom_patch.bin"
#define MT76x2_RX_RING_SIZE 256
#define MT_RX_HEADROOM 32
#define MT_MAX_CHAINS 2 #define MT_MAX_CHAINS 2
#define MT_CALIBRATE_INTERVAL HZ #define MT_CALIBRATE_INTERVAL HZ
...@@ -165,7 +162,7 @@ int mt76x2_mcu_set_channel(struct mt76x2_dev *dev, u8 channel, u8 bw, ...@@ -165,7 +162,7 @@ int mt76x2_mcu_set_channel(struct mt76x2_dev *dev, u8 channel, u8 bw,
int mt76x2_mcu_load_cr(struct mt76x2_dev *dev, u8 type, u8 temp_level, int mt76x2_mcu_load_cr(struct mt76x2_dev *dev, u8 type, u8 temp_level,
u8 channel); u8 channel);
int mt76x2_dma_init(struct mt76x2_dev *dev); void mt76x2_tx_tasklet(unsigned long data);
void mt76x2_dma_cleanup(struct mt76x2_dev *dev); void mt76x2_dma_cleanup(struct mt76x2_dev *dev);
void mt76x2_cleanup(struct mt76x2_dev *dev); void mt76x2_cleanup(struct mt76x2_dev *dev);
......
...@@ -18,46 +18,7 @@ ...@@ -18,46 +18,7 @@
#include "mt76x02_dma.h" #include "mt76x02_dma.h"
#include "mt76x02_util.h" #include "mt76x02_util.h"
static int void mt76x2_tx_tasklet(unsigned long data)
mt76x2_init_tx_queue(struct mt76x2_dev *dev, struct mt76_queue *q,
int idx, int n_desc)
{
int ret;
q->regs = dev->mt76.mmio.regs + MT_TX_RING_BASE + idx * MT_RING_SIZE;
q->ndesc = n_desc;
q->hw_idx = idx;
ret = mt76_queue_alloc(dev, q);
if (ret)
return ret;
mt76x02_irq_enable(&dev->mt76, MT_INT_TX_DONE(idx));
return 0;
}
static int
mt76x2_init_rx_queue(struct mt76x2_dev *dev, struct mt76_queue *q,
int idx, int n_desc, int bufsize)
{
int ret;
q->regs = dev->mt76.mmio.regs + MT_RX_RING_BASE + idx * MT_RING_SIZE;
q->ndesc = n_desc;
q->buf_size = bufsize;
ret = mt76_queue_alloc(dev, q);
if (ret)
return ret;
mt76x02_irq_enable(&dev->mt76, MT_INT_RX_DONE(idx));
return 0;
}
static void
mt76x2_tx_tasklet(unsigned long data)
{ {
struct mt76x2_dev *dev = (struct mt76x2_dev *) data; struct mt76x2_dev *dev = (struct mt76x2_dev *) data;
int i; int i;
...@@ -71,53 +32,6 @@ mt76x2_tx_tasklet(unsigned long data) ...@@ -71,53 +32,6 @@ mt76x2_tx_tasklet(unsigned long data)
mt76x02_irq_enable(&dev->mt76, MT_INT_TX_DONE_ALL); mt76x02_irq_enable(&dev->mt76, MT_INT_TX_DONE_ALL);
} }
int mt76x2_dma_init(struct mt76x2_dev *dev)
{
int ret;
int i;
struct mt76_txwi_cache __maybe_unused *t;
struct mt76_queue *q;
BUILD_BUG_ON(sizeof(t->txwi) < sizeof(struct mt76x02_txwi));
BUILD_BUG_ON(sizeof(struct mt76x02_rxwi) > MT_RX_HEADROOM);
mt76_dma_attach(&dev->mt76);
tasklet_init(&dev->tx_tasklet, mt76x2_tx_tasklet, (unsigned long) dev);
mt76_wr(dev, MT_WPDMA_RST_IDX, ~0);
for (i = 0; i < IEEE80211_NUM_ACS; i++) {
ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[i],
mt76_ac_to_hwq(i), MT_TX_RING_SIZE);
if (ret)
return ret;
}
ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_PSD],
MT_TX_HW_QUEUE_MGMT, MT_TX_RING_SIZE);
if (ret)
return ret;
ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_MCU],
MT_TX_HW_QUEUE_MCU, MT_MCU_RING_SIZE);
if (ret)
return ret;
ret = mt76x2_init_rx_queue(dev, &dev->mt76.q_rx[MT_RXQ_MCU], 1,
MT_MCU_RING_SIZE, MT_RX_BUF_SIZE);
if (ret)
return ret;
q = &dev->mt76.q_rx[MT_RXQ_MAIN];
q->buf_offset = MT_RX_HEADROOM - sizeof(struct mt76x02_rxwi);
ret = mt76x2_init_rx_queue(dev, q, 0, MT76x2_RX_RING_SIZE, MT_RX_BUF_SIZE);
if (ret)
return ret;
return mt76_init_queues(dev);
}
void mt76x2_dma_cleanup(struct mt76x2_dev *dev) void mt76x2_dma_cleanup(struct mt76x2_dev *dev)
{ {
tasklet_kill(&dev->tx_tasklet); tasklet_kill(&dev->tx_tasklet);
......
...@@ -366,7 +366,7 @@ int mt76x2_init_hardware(struct mt76x2_dev *dev) ...@@ -366,7 +366,7 @@ int mt76x2_init_hardware(struct mt76x2_dev *dev)
dev->mt76.rxfilter = mt76_rr(dev, MT_RX_FILTR_CFG); dev->mt76.rxfilter = mt76_rr(dev, MT_RX_FILTR_CFG);
ret = mt76x2_dma_init(dev); ret = mt76x02_dma_init(&dev->mt76);
if (ret) if (ret)
return ret; return ret;
...@@ -525,6 +525,7 @@ int mt76x2_register_device(struct mt76x2_dev *dev) ...@@ -525,6 +525,7 @@ int mt76x2_register_device(struct mt76x2_dev *dev)
if (!status_fifo) if (!status_fifo)
return -ENOMEM; return -ENOMEM;
tasklet_init(&dev->tx_tasklet, mt76x2_tx_tasklet, (unsigned long)dev);
kfifo_init(&dev->txstatus_fifo, status_fifo, fifo_size); kfifo_init(&dev->txstatus_fifo, status_fifo, fifo_size);
INIT_DELAYED_WORK(&dev->cal_work, mt76x2_phy_calibrate); INIT_DELAYED_WORK(&dev->cal_work, mt76x2_phy_calibrate);
INIT_DELAYED_WORK(&dev->mac_work, mt76x2_mac_work); INIT_DELAYED_WORK(&dev->mac_work, mt76x2_mac_work);
......
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