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nexedi
linux
Commits
b4eaa1cc
Commit
b4eaa1cc
authored
Nov 21, 2007
by
Paul Mundt
Browse files
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Plain Diff
sh: Kill off the rest of arch/sh64/kernel/.
Signed-off-by:
Paul Mundt
<
lethal@linux-sh.org
>
parent
18bc8131
Changes
13
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Showing
13 changed files
with
8 additions
and
1073 deletions
+8
-1073
arch/sh/drivers/pci/pci-sh5.c
arch/sh/drivers/pci/pci-sh5.c
+0
-0
arch/sh/drivers/pci/pci-sh5.h
arch/sh/drivers/pci/pci-sh5.h
+0
-0
arch/sh/kernel/Makefile_32
arch/sh/kernel/Makefile_32
+1
-1
arch/sh/kernel/Makefile_64
arch/sh/kernel/Makefile_64
+1
-1
arch/sh/kernel/time_32.c
arch/sh/kernel/time_32.c
+0
-0
arch/sh/kernel/time_64.c
arch/sh/kernel/time_64.c
+6
-9
arch/sh64/kernel/Makefile
arch/sh64/kernel/Makefile
+0
-36
arch/sh64/kernel/alphanum.c
arch/sh64/kernel/alphanum.c
+0
-43
arch/sh64/kernel/dma.c
arch/sh64/kernel/dma.c
+0
-297
arch/sh64/kernel/early_printk.c
arch/sh64/kernel/early_printk.c
+0
-99
arch/sh64/kernel/led.c
arch/sh64/kernel/led.c
+0
-40
arch/sh64/kernel/pcibios.c
arch/sh64/kernel/pcibios.c
+0
-168
arch/sh64/kernel/setup.c
arch/sh64/kernel/setup.c
+0
-379
No files found.
arch/sh
64/kernel/pci_
sh5.c
→
arch/sh
/drivers/pci/pci-
sh5.c
View file @
b4eaa1cc
File moved
arch/sh
64/kernel/pci_
sh5.h
→
arch/sh
/drivers/pci/pci-
sh5.h
View file @
b4eaa1cc
File moved
arch/sh/kernel/Makefile_32
View file @
b4eaa1cc
...
@@ -6,7 +6,7 @@ extra-y := head_32.o init_task.o vmlinux.lds
...
@@ -6,7 +6,7 @@ extra-y := head_32.o init_task.o vmlinux.lds
obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_32.o \
obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_32.o \
ptrace_32.o semaphore.o setup.o signal_32.o sys_sh.o sys_sh32.o \
ptrace_32.o semaphore.o setup.o signal_32.o sys_sh.o sys_sh32.o \
syscalls_32.o time.o topology.o traps.o traps_32.o
syscalls_32.o time
_32
.o topology.o traps.o traps_32.o
obj-y += cpu/ timers/
obj-y += cpu/ timers/
obj-$(CONFIG_VSYSCALL) += vsyscall/
obj-$(CONFIG_VSYSCALL) += vsyscall/
...
...
arch/sh/kernel/Makefile_64
View file @
b4eaa1cc
...
@@ -2,7 +2,7 @@ extra-y := head_64.o init_task.o vmlinux.lds
...
@@ -2,7 +2,7 @@ extra-y := head_64.o init_task.o vmlinux.lds
obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_64.o \
obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_64.o \
ptrace_64.o semaphore.o setup.o signal_64.o sys_sh.o sys_sh64.o \
ptrace_64.o semaphore.o setup.o signal_64.o sys_sh.o sys_sh64.o \
syscalls_64.o time.o topology.o traps.o traps_64.o
syscalls_64.o time
_64
.o topology.o traps.o traps_64.o
obj-y += cpu/ timers/
obj-y += cpu/ timers/
obj-$(CONFIG_VSYSCALL) += vsyscall/
obj-$(CONFIG_VSYSCALL) += vsyscall/
...
...
arch/sh/kernel/time.c
→
arch/sh/kernel/time
_32
.c
View file @
b4eaa1cc
File moved
arch/sh
64/kernel/time
.c
→
arch/sh
/kernel/time_64
.c
View file @
b4eaa1cc
...
@@ -31,14 +31,14 @@
...
@@ -31,14 +31,14 @@
#include <linux/bcd.h>
#include <linux/bcd.h>
#include <linux/timex.h>
#include <linux/timex.h>
#include <linux/irq.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/platform_device.h>
#include <asm/registers.h>
/* required by inline __asm__ stmt. */
#include <asm/cpu/registers.h>
/* required by inline __asm__ stmt. */
#include <asm/cpu/irq.h>
#include <asm/addrspace.h>
#include <asm/processor.h>
#include <asm/processor.h>
#include <asm/uaccess.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/delay.h>
#include <asm/delay.h>
#include <asm/hardware.h>
#define TMU_TOCR_INIT 0x00
#define TMU_TOCR_INIT 0x00
#define TMU0_TCR_INIT 0x0020
#define TMU0_TCR_INIT 0x0020
...
@@ -240,11 +240,8 @@ static inline void do_timer_interrupt(void)
...
@@ -240,11 +240,8 @@ static inline void do_timer_interrupt(void)
profile_tick
(
CPU_PROFILING
);
profile_tick
(
CPU_PROFILING
);
#ifdef CONFIG_HEARTBEAT
#ifdef CONFIG_HEARTBEAT
{
if
(
sh_mv
.
mv_heartbeat
!=
NULL
)
extern
void
heartbeat
(
void
);
sh_mv
.
mv_heartbeat
();
heartbeat
();
}
#endif
#endif
/*
/*
...
...
arch/sh64/kernel/Makefile
deleted
100644 → 0
View file @
18bc8131
#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
# Copyright (C) 2000, 2001 Paolo Alberelli
# Copyright (C) 2003 Paul Mundt
#
# Makefile for the Linux sh64 kernel.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
extra-y
:=
head.o init_task.o vmlinux.lds
obj-y
:=
process.o signal.o entry.o traps.o irq.o irq_intc.o
\
ptrace.o setup.o time.o sys_sh64.o semaphore.o sh_ksyms.o
\
switchto.o syscalls.o
obj-$(CONFIG_HEARTBEAT)
+=
led.o
obj-$(CONFIG_SH_ALPHANUMERIC)
+=
alphanum.o
obj-$(CONFIG_SH_DMA)
+=
dma.o
obj-$(CONFIG_SH_FPU)
+=
fpu.o
obj-$(CONFIG_EARLY_PRINTK)
+=
early_printk.o
obj-$(CONFIG_KALLSYMS)
+=
unwind.o
obj-$(CONFIG_PCI)
+=
pcibios.o
obj-$(CONFIG_MODULES)
+=
module.o
ifeq
($(CONFIG_PCI),y)
obj-$(CONFIG_CPU_SH5)
+=
pci_sh5.o
endif
USE_STANDARD_AS_RULE
:=
true
arch/sh64/kernel/alphanum.c
deleted
100644 → 0
View file @
18bc8131
/*
* arch/sh64/kernel/alphanum.c
*
* Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* Machine-independent functions for handling 8-digit alphanumeric display
* (e.g. Agilent HDSP-253x)
*/
#include <linux/stddef.h>
#include <linux/sched.h>
void
mach_alphanum
(
int
pos
,
unsigned
char
val
);
void
print_seg
(
char
*
file
,
int
line
)
{
int
i
;
unsigned
int
nibble
;
for
(
i
=
0
;
i
<
5
;
i
++
)
{
mach_alphanum
(
i
,
file
[
i
]);
}
for
(
i
=
0
;
i
<
3
;
i
++
)
{
nibble
=
((
line
>>
(
i
*
4
))
&
0xf
);
mach_alphanum
(
7
-
i
,
nibble
+
((
nibble
>
9
)
?
55
:
48
));
}
}
void
print_seg_num
(
unsigned
num
)
{
int
i
;
unsigned
int
nibble
;
for
(
i
=
0
;
i
<
8
;
i
++
)
{
nibble
=
((
num
>>
(
i
*
4
))
&
0xf
);
mach_alphanum
(
7
-
i
,
nibble
+
((
nibble
>
9
)
?
55
:
48
));
}
}
arch/sh64/kernel/dma.c
deleted
100644 → 0
View file @
18bc8131
/*
* arch/sh64/kernel/dma.c
*
* DMA routines for the SH-5 DMAC.
*
* Copyright (C) 2003 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/types.h>
#include <linux/irq.h>
#include <linux/spinlock.h>
#include <linux/mm.h>
#include <asm/hardware.h>
#include <asm/dma.h>
#include <asm/signal.h>
#include <asm/errno.h>
#include <asm/io.h>
typedef
struct
{
unsigned
long
dev_addr
;
unsigned
long
mem_addr
;
unsigned
int
mode
;
unsigned
int
count
;
}
dma_info_t
;
static
dma_info_t
dma_info
[
MAX_DMA_CHANNELS
];
static
DEFINE_SPINLOCK
(
dma_spin_lock
);
/* arch/sh64/kernel/irq_intc.c */
extern
void
make_intc_irq
(
unsigned
int
irq
);
/* DMAC Interrupts */
#define DMA_IRQ_DMTE0 18
#define DMA_IRQ_DERR 22
#define DMAC_COMMON_BASE (dmac_base + 0x08)
#define DMAC_SAR_BASE (dmac_base + 0x10)
#define DMAC_DAR_BASE (dmac_base + 0x18)
#define DMAC_COUNT_BASE (dmac_base + 0x20)
#define DMAC_CTRL_BASE (dmac_base + 0x28)
#define DMAC_STATUS_BASE (dmac_base + 0x30)
#define DMAC_SAR(n) (DMAC_SAR_BASE + ((n) * 0x28))
#define DMAC_DAR(n) (DMAC_DAR_BASE + ((n) * 0x28))
#define DMAC_COUNT(n) (DMAC_COUNT_BASE + ((n) * 0x28))
#define DMAC_CTRL(n) (DMAC_CTRL_BASE + ((n) * 0x28))
#define DMAC_STATUS(n) (DMAC_STATUS_BASE + ((n) * 0x28))
/* DMAC.COMMON Bit Definitions */
#define DMAC_COMMON_PR 0x00000001
/* Priority */
/* Bits 1-2 Reserved */
#define DMAC_COMMON_ME 0x00000008
/* Master Enable */
#define DMAC_COMMON_NMI 0x00000010
/* NMI Flag */
/* Bits 5-6 Reserved */
#define DMAC_COMMON_ER 0x00000780
/* Error Response */
#define DMAC_COMMON_AAE 0x00007800
/* Address Alignment Error */
/* Bits 15-63 Reserved */
/* DMAC.SAR Bit Definitions */
#define DMAC_SAR_ADDR 0xffffffff
/* Source Address */
/* DMAC.DAR Bit Definitions */
#define DMAC_DAR_ADDR 0xffffffff
/* Destination Address */
/* DMAC.COUNT Bit Definitions */
#define DMAC_COUNT_CNT 0xffffffff
/* Transfer Count */
/* DMAC.CTRL Bit Definitions */
#define DMAC_CTRL_TS 0x00000007
/* Transfer Size */
#define DMAC_CTRL_SI 0x00000018
/* Source Increment */
#define DMAC_CTRL_DI 0x00000060
/* Destination Increment */
#define DMAC_CTRL_RS 0x00000780
/* Resource Select */
#define DMAC_CTRL_IE 0x00000800
/* Interrupt Enable */
#define DMAC_CTRL_TE 0x00001000
/* Transfer Enable */
/* Bits 15-63 Reserved */
/* DMAC.STATUS Bit Definitions */
#define DMAC_STATUS_TE 0x00000001
/* Transfer End */
#define DMAC_STATUS_AAE 0x00000002
/* Address Alignment Error */
/* Bits 2-63 Reserved */
static
unsigned
long
dmac_base
;
void
set_dma_count
(
unsigned
int
chan
,
unsigned
int
count
);
void
set_dma_addr
(
unsigned
int
chan
,
unsigned
int
addr
);
static
irqreturn_t
dma_mte
(
int
irq
,
void
*
dev_id
,
struct
pt_regs
*
regs
)
{
unsigned
int
chan
=
irq
-
DMA_IRQ_DMTE0
;
dma_info_t
*
info
=
dma_info
+
chan
;
u64
status
;
if
(
info
->
mode
&
DMA_MODE_WRITE
)
{
sh64_out64
(
info
->
mem_addr
&
DMAC_SAR_ADDR
,
DMAC_SAR
(
chan
));
}
else
{
sh64_out64
(
info
->
mem_addr
&
DMAC_DAR_ADDR
,
DMAC_DAR
(
chan
));
}
set_dma_count
(
chan
,
info
->
count
);
/* Clear the TE bit */
status
=
sh64_in64
(
DMAC_STATUS
(
chan
));
status
&=
~
DMAC_STATUS_TE
;
sh64_out64
(
status
,
DMAC_STATUS
(
chan
));
return
IRQ_HANDLED
;
}
static
struct
irqaction
irq_dmte
=
{
.
handler
=
dma_mte
,
.
flags
=
IRQF_DISABLED
,
.
name
=
"DMA MTE"
,
};
static
irqreturn_t
dma_err
(
int
irq
,
void
*
dev_id
,
struct
pt_regs
*
regs
)
{
u64
tmp
;
u8
chan
;
printk
(
KERN_NOTICE
"DMAC: Got a DMA Error!
\n
"
);
tmp
=
sh64_in64
(
DMAC_COMMON_BASE
);
/* Check for the type of error */
if
((
chan
=
tmp
&
DMAC_COMMON_AAE
))
{
/* It's an address alignment error.. */
printk
(
KERN_NOTICE
"DMAC: Alignment error on channel %d, "
,
chan
);
printk
(
KERN_NOTICE
"SAR: 0x%08llx, DAR: 0x%08llx, COUNT: %lld
\n
"
,
(
sh64_in64
(
DMAC_SAR
(
chan
))
&
DMAC_SAR_ADDR
),
(
sh64_in64
(
DMAC_DAR
(
chan
))
&
DMAC_DAR_ADDR
),
(
sh64_in64
(
DMAC_COUNT
(
chan
))
&
DMAC_COUNT_CNT
));
}
else
if
((
chan
=
tmp
&
DMAC_COMMON_ER
))
{
/* Something else went wrong.. */
printk
(
KERN_NOTICE
"DMAC: Error on channel %d
\n
"
,
chan
);
}
/* Reset the ME bit to clear the interrupt */
tmp
|=
DMAC_COMMON_ME
;
sh64_out64
(
tmp
,
DMAC_COMMON_BASE
);
return
IRQ_HANDLED
;
}
static
struct
irqaction
irq_derr
=
{
.
handler
=
dma_err
,
.
flags
=
IRQF_DISABLED
,
.
name
=
"DMA Error"
,
};
static
inline
unsigned
long
calc_xmit_shift
(
unsigned
int
chan
)
{
return
sh64_in64
(
DMAC_CTRL
(
chan
))
&
0x03
;
}
void
setup_dma
(
unsigned
int
chan
,
dma_info_t
*
info
)
{
unsigned
int
irq
=
DMA_IRQ_DMTE0
+
chan
;
dma_info_t
*
dma
=
dma_info
+
chan
;
make_intc_irq
(
irq
);
setup_irq
(
irq
,
&
irq_dmte
);
dma
=
info
;
}
void
enable_dma
(
unsigned
int
chan
)
{
u64
ctrl
;
ctrl
=
sh64_in64
(
DMAC_CTRL
(
chan
));
ctrl
|=
DMAC_CTRL_TE
;
sh64_out64
(
ctrl
,
DMAC_CTRL
(
chan
));
}
void
disable_dma
(
unsigned
int
chan
)
{
u64
ctrl
;
ctrl
=
sh64_in64
(
DMAC_CTRL
(
chan
));
ctrl
&=
~
DMAC_CTRL_TE
;
sh64_out64
(
ctrl
,
DMAC_CTRL
(
chan
));
}
void
set_dma_mode
(
unsigned
int
chan
,
char
mode
)
{
dma_info_t
*
info
=
dma_info
+
chan
;
info
->
mode
=
mode
;
set_dma_addr
(
chan
,
info
->
mem_addr
);
set_dma_count
(
chan
,
info
->
count
);
}
void
set_dma_addr
(
unsigned
int
chan
,
unsigned
int
addr
)
{
dma_info_t
*
info
=
dma_info
+
chan
;
unsigned
long
sar
,
dar
;
info
->
mem_addr
=
addr
;
sar
=
(
info
->
mode
&
DMA_MODE_WRITE
)
?
info
->
mem_addr
:
info
->
dev_addr
;
dar
=
(
info
->
mode
&
DMA_MODE_WRITE
)
?
info
->
dev_addr
:
info
->
mem_addr
;
sh64_out64
(
sar
&
DMAC_SAR_ADDR
,
DMAC_SAR
(
chan
));
sh64_out64
(
dar
&
DMAC_SAR_ADDR
,
DMAC_DAR
(
chan
));
}
void
set_dma_count
(
unsigned
int
chan
,
unsigned
int
count
)
{
dma_info_t
*
info
=
dma_info
+
chan
;
u64
tmp
;
info
->
count
=
count
;
tmp
=
(
info
->
count
>>
calc_xmit_shift
(
chan
))
&
DMAC_COUNT_CNT
;
sh64_out64
(
tmp
,
DMAC_COUNT
(
chan
));
}
unsigned
long
claim_dma_lock
(
void
)
{
unsigned
long
flags
;
spin_lock_irqsave
(
&
dma_spin_lock
,
flags
);
return
flags
;
}
void
release_dma_lock
(
unsigned
long
flags
)
{
spin_unlock_irqrestore
(
&
dma_spin_lock
,
flags
);
}
int
get_dma_residue
(
unsigned
int
chan
)
{
return
sh64_in64
(
DMAC_COUNT
(
chan
)
<<
calc_xmit_shift
(
chan
));
}
int
__init
init_dma
(
void
)
{
struct
vcr_info
vcr
;
u64
tmp
;
/* Remap the DMAC */
dmac_base
=
onchip_remap
(
PHYS_DMAC_BLOCK
,
1024
,
"DMAC"
);
if
(
!
dmac_base
)
{
printk
(
KERN_ERR
"Unable to remap DMAC
\n
"
);
return
-
ENOMEM
;
}
/* Report DMAC.VCR Info */
vcr
=
sh64_get_vcr_info
(
dmac_base
);
printk
(
"DMAC: Module ID: 0x%04x, Module version: 0x%04x
\n
"
,
vcr
.
mod_id
,
vcr
.
mod_vers
);
/* Set the ME bit */
tmp
=
sh64_in64
(
DMAC_COMMON_BASE
);
tmp
|=
DMAC_COMMON_ME
;
sh64_out64
(
tmp
,
DMAC_COMMON_BASE
);
/* Enable the DMAC Error Interrupt */
make_intc_irq
(
DMA_IRQ_DERR
);
setup_irq
(
DMA_IRQ_DERR
,
&
irq_derr
);
return
0
;
}
static
void
__exit
exit_dma
(
void
)
{
onchip_unmap
(
dmac_base
);
free_irq
(
DMA_IRQ_DERR
,
0
);
}
module_init
(
init_dma
);
module_exit
(
exit_dma
);
MODULE_AUTHOR
(
"Paul Mundt"
);
MODULE_DESCRIPTION
(
"DMA API for SH-5 DMAC"
);
MODULE_LICENSE
(
"GPL"
);
EXPORT_SYMBOL
(
setup_dma
);
EXPORT_SYMBOL
(
claim_dma_lock
);
EXPORT_SYMBOL
(
release_dma_lock
);
EXPORT_SYMBOL
(
enable_dma
);
EXPORT_SYMBOL
(
disable_dma
);
EXPORT_SYMBOL
(
set_dma_mode
);
EXPORT_SYMBOL
(
set_dma_addr
);
EXPORT_SYMBOL
(
set_dma_count
);
EXPORT_SYMBOL
(
get_dma_residue
);
arch/sh64/kernel/early_printk.c
deleted
100644 → 0
View file @
18bc8131
/*
* arch/sh64/kernel/early_printk.c
*
* SH-5 Early SCIF console (cloned and hacked from sh implementation)
*
* Copyright (C) 2003, 2004 Paul Mundt <lethal@linux-sh.org>
* Copyright (C) 2002 M. R. Brown <mrbrown@0xd6.org>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/console.h>
#include <linux/tty.h>
#include <linux/init.h>
#include <asm/io.h>
#include <asm/hardware.h>
#define SCIF_BASE_ADDR 0x01030000
#define SCIF_ADDR_SH5 PHYS_PERIPHERAL_BLOCK+SCIF_BASE_ADDR
/*
* Fixed virtual address where SCIF is mapped (should already be done
* in arch/sh64/kernel/head.S!).
*/
#define SCIF_REG 0xfa030000
enum
{
SCIF_SCSMR2
=
SCIF_REG
+
0x00
,
SCIF_SCBRR2
=
SCIF_REG
+
0x04
,
SCIF_SCSCR2
=
SCIF_REG
+
0x08
,
SCIF_SCFTDR2
=
SCIF_REG
+
0x0c
,
SCIF_SCFSR2
=
SCIF_REG
+
0x10
,
SCIF_SCFRDR2
=
SCIF_REG
+
0x14
,
SCIF_SCFCR2
=
SCIF_REG
+
0x18
,
SCIF_SCFDR2
=
SCIF_REG
+
0x1c
,
SCIF_SCSPTR2
=
SCIF_REG
+
0x20
,
SCIF_SCLSR2
=
SCIF_REG
+
0x24
,
};
static
void
sh_console_putc
(
int
c
)
{
while
(
!
(
ctrl_inw
(
SCIF_SCFSR2
)
&
0x20
))
cpu_relax
();
ctrl_outb
(
c
,
SCIF_SCFTDR2
);
ctrl_outw
((
ctrl_inw
(
SCIF_SCFSR2
)
&
0x9f
),
SCIF_SCFSR2
);
if
(
c
==
'\n'
)
sh_console_putc
(
'\r'
);
}
static
void
sh_console_flush
(
void
)
{
ctrl_outw
((
ctrl_inw
(
SCIF_SCFSR2
)
&
0xbf
),
SCIF_SCFSR2
);
while
(
!
(
ctrl_inw
(
SCIF_SCFSR2
)
&
0x40
))
cpu_relax
();
ctrl_outw
((
ctrl_inw
(
SCIF_SCFSR2
)
&
0xbf
),
SCIF_SCFSR2
);
}
static
void
sh_console_write
(
struct
console
*
con
,
const
char
*
s
,
unsigned
count
)
{
while
(
count
--
>
0
)
sh_console_putc
(
*
s
++
);
sh_console_flush
();
}
static
int
__init
sh_console_setup
(
struct
console
*
con
,
char
*
options
)
{
con
->
cflag
=
CREAD
|
HUPCL
|
CLOCAL
|
B19200
|
CS8
;
return
0
;
}
static
struct
console
sh_console
=
{
.
name
=
"scifcon"
,
.
write
=
sh_console_write
,
.
setup
=
sh_console_setup
,
.
flags
=
CON_PRINTBUFFER
|
CON_BOOT
,
.
index
=
-
1
,
};
void
__init
enable_early_printk
(
void
)
{
ctrl_outb
(
0x2a
,
SCIF_SCBRR2
);
/* 19200bps */
ctrl_outw
(
0x04
,
SCIF_SCFCR2
);
/* Reset TFRST */
ctrl_outw
(
0x10
,
SCIF_SCFCR2
);
/* TTRG0=1 */
ctrl_outw
(
0
,
SCIF_SCSPTR2
);
ctrl_outw
(
0x60
,
SCIF_SCFSR2
);
ctrl_outw
(
0
,
SCIF_SCLSR2
);
ctrl_outw
(
0x30
,
SCIF_SCSCR2
);
register_console
(
&
sh_console
);
}
arch/sh64/kernel/led.c
deleted
100644 → 0
View file @
18bc8131
/*
* arch/sh64/kernel/led.c
*
* Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* Flash the LEDs
*/
#include <linux/stddef.h>
#include <linux/sched.h>
void
mach_led
(
int
pos
,
int
val
);
/* acts like an actual heart beat -- ie thump-thump-pause... */
void
heartbeat
(
void
)
{
static
unsigned
int
cnt
=
0
,
period
=
0
,
dist
=
0
;
if
(
cnt
==
0
||
cnt
==
dist
)
{
mach_led
(
-
1
,
1
);
}
else
if
(
cnt
==
7
||
cnt
==
dist
+
7
)
{
mach_led
(
-
1
,
0
);
}
if
(
++
cnt
>
period
)
{
cnt
=
0
;
/*
* The hyperbolic function below modifies the heartbeat period
* length in dependency of the current (5min) load. It goes
* through the points f(0)=126, f(1)=86, f(5)=51, f(inf)->30.
*/
period
=
((
672
<<
FSHIFT
)
/
(
5
*
avenrun
[
0
]
+
(
7
<<
FSHIFT
)))
+
30
;
dist
=
period
/
4
;
}
}
arch/sh64/kernel/pcibios.c
deleted
100644 → 0
View file @
18bc8131
/*
* $Id: pcibios.c,v 1.1 2001/08/24 12:38:19 dwmw2 Exp $
*
* arch/sh/kernel/pcibios.c
*
* Copyright (C) 2002 STMicroelectronics Limited
* Author : David J. McKay
*
* Copyright (C) 2004 Richard Curnow, SuperH UK Limited
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
* This is GPL'd.
*
* Provided here are generic versions of:
* pcibios_update_resource()
* pcibios_align_resource()
* pcibios_enable_device()
* pcibios_set_master()
* pcibios_update_irq()
*
* These functions are collected here to reduce duplication of common
* code amongst the many platform-specific PCI support code files.
*
* Platform-specific files are expected to provide:
* pcibios_fixup_bus()
* pcibios_init()
* pcibios_setup()
* pcibios_fixup_pbus_ranges()
*/
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/init.h>
void
pcibios_update_resource
(
struct
pci_dev
*
dev
,
struct
resource
*
root
,
struct
resource
*
res
,
int
resource
)
{
u32
new
,
check
;
int
reg
;
new
=
res
->
start
|
(
res
->
flags
&
PCI_REGION_FLAG_MASK
);
if
(
resource
<
6
)
{
reg
=
PCI_BASE_ADDRESS_0
+
4
*
resource
;
}
else
if
(
resource
==
PCI_ROM_RESOURCE
)
{
res
->
flags
|=
IORESOURCE_ROM_ENABLE
;
new
|=
PCI_ROM_ADDRESS_ENABLE
;
reg
=
dev
->
rom_base_reg
;
}
else
{
/* Somebody might have asked allocation of a non-standard resource */
return
;
}
pci_write_config_dword
(
dev
,
reg
,
new
);
pci_read_config_dword
(
dev
,
reg
,
&
check
);
if
((
new
^
check
)
&
((
new
&
PCI_BASE_ADDRESS_SPACE_IO
)
?
PCI_BASE_ADDRESS_IO_MASK
:
PCI_BASE_ADDRESS_MEM_MASK
))
{
printk
(
KERN_ERR
"PCI: Error while updating region "
"%s/%d (%08x != %08x)
\n
"
,
pci_name
(
dev
),
resource
,
new
,
check
);
}
}
/*
* We need to avoid collisions with `mirrored' VGA ports
* and other strange ISA hardware, so we always want the
* addresses to be allocated in the 0x000-0x0ff region
* modulo 0x400.
*/
void
pcibios_align_resource
(
void
*
data
,
struct
resource
*
res
,
resource_size_t
size
,
resource_size_t
align
)
{
if
(
res
->
flags
&
IORESOURCE_IO
)
{
resource_size_t
start
=
res
->
start
;
if
(
start
&
0x300
)
{
start
=
(
start
+
0x3ff
)
&
~
0x3ff
;
res
->
start
=
start
;
}
}
}
static
void
pcibios_enable_bridge
(
struct
pci_dev
*
dev
)
{
struct
pci_bus
*
bus
=
dev
->
subordinate
;
u16
cmd
,
old_cmd
;
pci_read_config_word
(
dev
,
PCI_COMMAND
,
&
cmd
);
old_cmd
=
cmd
;
if
(
bus
->
resource
[
0
]
->
flags
&
IORESOURCE_IO
)
{
cmd
|=
PCI_COMMAND_IO
;
}
if
((
bus
->
resource
[
1
]
->
flags
&
IORESOURCE_MEM
)
||
(
bus
->
resource
[
2
]
->
flags
&
IORESOURCE_PREFETCH
))
{
cmd
|=
PCI_COMMAND_MEMORY
;
}
if
(
cmd
!=
old_cmd
)
{
pci_write_config_word
(
dev
,
PCI_COMMAND
,
cmd
);
}
printk
(
"PCI bridge %s, command register -> %04x
\n
"
,
pci_name
(
dev
),
cmd
);
}
int
pcibios_enable_device
(
struct
pci_dev
*
dev
,
int
mask
)
{
u16
cmd
,
old_cmd
;
int
idx
;
struct
resource
*
r
;
if
((
dev
->
class
>>
8
)
==
PCI_CLASS_BRIDGE_PCI
)
{
pcibios_enable_bridge
(
dev
);
}
pci_read_config_word
(
dev
,
PCI_COMMAND
,
&
cmd
);
old_cmd
=
cmd
;
for
(
idx
=
0
;
idx
<
6
;
idx
++
)
{
if
(
!
(
mask
&
(
1
<<
idx
)))
continue
;
r
=
&
dev
->
resource
[
idx
];
if
(
!
r
->
start
&&
r
->
end
)
{
printk
(
KERN_ERR
"PCI: Device %s not available because of resource collisions
\n
"
,
pci_name
(
dev
));
return
-
EINVAL
;
}
if
(
r
->
flags
&
IORESOURCE_IO
)
cmd
|=
PCI_COMMAND_IO
;
if
(
r
->
flags
&
IORESOURCE_MEM
)
cmd
|=
PCI_COMMAND_MEMORY
;
}
if
(
dev
->
resource
[
PCI_ROM_RESOURCE
].
start
)
cmd
|=
PCI_COMMAND_MEMORY
;
if
(
cmd
!=
old_cmd
)
{
printk
(
KERN_INFO
"PCI: Enabling device %s (%04x -> %04x)
\n
"
,
pci_name
(
dev
),
old_cmd
,
cmd
);
pci_write_config_word
(
dev
,
PCI_COMMAND
,
cmd
);
}
return
0
;
}
/*
* If we set up a device for bus mastering, we need to check and set
* the latency timer as it may not be properly set.
*/
unsigned
int
pcibios_max_latency
=
255
;
void
pcibios_set_master
(
struct
pci_dev
*
dev
)
{
u8
lat
;
pci_read_config_byte
(
dev
,
PCI_LATENCY_TIMER
,
&
lat
);
if
(
lat
<
16
)
lat
=
(
64
<=
pcibios_max_latency
)
?
64
:
pcibios_max_latency
;
else
if
(
lat
>
pcibios_max_latency
)
lat
=
pcibios_max_latency
;
else
return
;
printk
(
KERN_INFO
"PCI: Setting latency timer of device %s to %d
\n
"
,
pci_name
(
dev
),
lat
);
pci_write_config_byte
(
dev
,
PCI_LATENCY_TIMER
,
lat
);
}
void
__init
pcibios_update_irq
(
struct
pci_dev
*
dev
,
int
irq
)
{
pci_write_config_byte
(
dev
,
PCI_INTERRUPT_LINE
,
irq
);
}
arch/sh64/kernel/setup.c
deleted
100644 → 0
View file @
18bc8131
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