Commit b644c7ce authored by Alan Cox's avatar Alan Cox Committed by Greg Kroah-Hartman

gma500: The MID devices have the register offset different

This is another small step towards getting Moorestown/Oaktrail support to
work but for Moorestown at least we still need to sort out GEM backed base
framebuffer, which means figuring out why GEM explodes early on at the
moment.
Signed-off-by: default avatarAlan Cox <alan@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 9fada0a0
...@@ -565,7 +565,11 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset) ...@@ -565,7 +565,11 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
if (!dev_priv->vdc_reg) if (!dev_priv->vdc_reg)
goto out_err; goto out_err;
dev_priv->sgx_reg = ioremap(resource_start + PSB_SGX_OFFSET, if (IS_MRST(dev))
dev_priv->sgx_reg = ioremap(resource_start + MRST_SGX_OFFSET,
PSB_SGX_SIZE);
else
dev_priv->sgx_reg = ioremap(resource_start + PSB_SGX_OFFSET,
PSB_SGX_SIZE); PSB_SGX_SIZE);
if (!dev_priv->sgx_reg) if (!dev_priv->sgx_reg)
......
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