Commit b64dfec0 authored by Jernej Škrabec's avatar Jernej Škrabec Committed by Chen-Yu Tsai

clk: sunxi-ng: Fix fractional mode for N-M clocks

N-M factor clock driver is missing a call to ccu_frac_helper_enable()
when fractional mode is used. Additionally, most SoCs require that M
factor must be set to 0 when fractional mode is used.

Without this patch, clock keeps the old value and clk_set_rate() returns
without error.

Fixes: 6174a1e2 ("clk: sunxi-ng: Add N-M-factor clock support")
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: default avatarJernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
parent f70893dc
...@@ -117,10 +117,22 @@ static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate, ...@@ -117,10 +117,22 @@ static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long flags; unsigned long flags;
u32 reg; u32 reg;
if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) {
spin_lock_irqsave(nm->common.lock, flags);
/* most SoCs require M to be 0 if fractional mode is used */
reg = readl(nm->common.base + nm->common.reg);
reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift);
writel(reg, nm->common.base + nm->common.reg);
spin_unlock_irqrestore(nm->common.lock, flags);
ccu_frac_helper_enable(&nm->common, &nm->frac);
return ccu_frac_helper_set_rate(&nm->common, &nm->frac, rate); return ccu_frac_helper_set_rate(&nm->common, &nm->frac, rate);
else } else {
ccu_frac_helper_disable(&nm->common, &nm->frac); ccu_frac_helper_disable(&nm->common, &nm->frac);
}
_nm.min_n = nm->n.min ?: 1; _nm.min_n = nm->n.min ?: 1;
_nm.max_n = nm->n.max ?: 1 << nm->n.width; _nm.max_n = nm->n.max ?: 1 << nm->n.width;
......
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