Commit bc8fb5d0 authored by Paul Mundt's avatar Paul Mundt

sh: Solution Engine SH7343 board support.

This adds support for the SE7343 board.
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 91b91d01
...@@ -51,18 +51,23 @@ source "init/Kconfig" ...@@ -51,18 +51,23 @@ source "init/Kconfig"
menu "System type" menu "System type"
config SOLUTION_ENGINE
bool
choice choice
prompt "SuperH system type" prompt "SuperH system type"
default SH_UNKNOWN default SH_UNKNOWN
config SH_SOLUTION_ENGINE config SH_SOLUTION_ENGINE
bool "SolutionEngine" bool "SolutionEngine"
select SOLUTION_ENGINE
help help
Select SolutionEngine if configuring for a Hitachi SH7709 Select SolutionEngine if configuring for a Hitachi SH7709
or SH7750 evaluation board. or SH7750 evaluation board.
config SH_7751_SOLUTION_ENGINE config SH_7751_SOLUTION_ENGINE
bool "SolutionEngine7751" bool "SolutionEngine7751"
select SOLUTION_ENGINE
select CPU_SUBTYPE_SH7751 select CPU_SUBTYPE_SH7751
help help
Select 7751 SolutionEngine if configuring for a Hitachi SH7751 Select 7751 SolutionEngine if configuring for a Hitachi SH7751
...@@ -70,17 +75,27 @@ config SH_7751_SOLUTION_ENGINE ...@@ -70,17 +75,27 @@ config SH_7751_SOLUTION_ENGINE
config SH_7300_SOLUTION_ENGINE config SH_7300_SOLUTION_ENGINE
bool "SolutionEngine7300" bool "SolutionEngine7300"
select SOLUTION_ENGINE
select CPU_SUBTYPE_SH7300 select CPU_SUBTYPE_SH7300
help help
Select 7300 SolutionEngine if configuring for a Hitachi SH7300(SH-Mobile V) Select 7300 SolutionEngine if configuring for a Hitachi
evaluation board. SH7300(SH-Mobile V) evaluation board.
config SH_7343_SOLUTION_ENGINE
bool "SolutionEngine7343"
select SOLUTION_ENGINE
select CPU_SUBTYPE_SH7343
help
Select 7343 SolutionEngine if configuring for a Hitachi
SH7343 (SH-Mobile 3AS) evaluation board.
config SH_73180_SOLUTION_ENGINE config SH_73180_SOLUTION_ENGINE
bool "SolutionEngine73180" bool "SolutionEngine73180"
select CPU_SUBTYPE_SH73180 select SOLUTION_ENGINE
help select CPU_SUBTYPE_SH73180
Select 73180 SolutionEngine if configuring for a Hitachi SH73180(SH-Mobile 3) help
evaluation board. Select 73180 SolutionEngine if configuring for a Hitachi
SH73180(SH-Mobile 3) evaluation board.
config SH_7751_SYSTEMH config SH_7751_SYSTEMH
bool "SystemH7751R" bool "SystemH7751R"
...@@ -394,9 +409,7 @@ source "arch/sh/cchips/Kconfig" ...@@ -394,9 +409,7 @@ source "arch/sh/cchips/Kconfig"
config HEARTBEAT config HEARTBEAT
bool "Heartbeat LED" bool "Heartbeat LED"
depends on SH_MPC1211 || SH_SH03 || \ depends on SH_MPC1211 || SH_SH03 || \
SH_BIGSUR || \ SH_BIGSUR || SOLUTION_ENGINE || \
SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || \
SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || \
SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK
help help
Use the power-on LED on your machine as a load meter. The exact Use the power-on LED on your machine as a load meter. The exact
...@@ -431,10 +444,6 @@ config KEXEC ...@@ -431,10 +444,6 @@ config KEXEC
support. As of this writing the exact hardware interface is support. As of this writing the exact hardware interface is
strongly in flux, so no good recommendation can be made. strongly in flux, so no good recommendation can be made.
config PREEMPT
bool "Preemptible Kernel (EXPERIMENTAL)"
depends on EXPERIMENTAL
config SMP config SMP
bool "Symmetric multi-processing support" bool "Symmetric multi-processing support"
---help--- ---help---
......
...@@ -89,6 +89,7 @@ core-$(CONFIG_SH_FPU_EMU) += arch/sh/math-emu/ ...@@ -89,6 +89,7 @@ core-$(CONFIG_SH_FPU_EMU) += arch/sh/math-emu/
machdir-$(CONFIG_SH_SOLUTION_ENGINE) := se/770x machdir-$(CONFIG_SH_SOLUTION_ENGINE) := se/770x
machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) := se/7751 machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) := se/7751
machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se/7300 machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se/7300
machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) := se/7343
machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180 machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180
machdir-$(CONFIG_SH_HP6XX) := hp6xx machdir-$(CONFIG_SH_HP6XX) := hp6xx
machdir-$(CONFIG_SH_EC3104) := ec3104 machdir-$(CONFIG_SH_EC3104) := ec3104
......
#
# Makefile for the 7343 SolutionEngine specific parts of the kernel
#
obj-y := setup.o io.o irq.o
obj-$(CONFIG_HEARTBEAT) += led.o
/*
* arch/sh/boards/se/7343/io.c
*
* I/O routine for SH-Mobile3AS 7343 SolutionEngine.
*
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <asm/io.h>
#include <asm/mach/se7343.h>
#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)
struct iop {
unsigned long start, end;
unsigned long base;
struct iop *(*check) (struct iop * p, unsigned long port);
unsigned char (*inb) (struct iop * p, unsigned long port);
unsigned short (*inw) (struct iop * p, unsigned long port);
void (*outb) (struct iop * p, unsigned char value, unsigned long port);
void (*outw) (struct iop * p, unsigned short value, unsigned long port);
};
struct iop *
simple_check(struct iop *p, unsigned long port)
{
static int count;
if (count < 100)
count++;
port &= 0xFFFF;
if ((p->start <= port) && (port <= p->end))
return p;
else
badio(check, port);
}
struct iop *
ide_check(struct iop *p, unsigned long port)
{
if (((0x1f0 <= port) && (port <= 0x1f7)) || (port == 0x3f7))
return p;
return NULL;
}
unsigned char
simple_inb(struct iop *p, unsigned long port)
{
return *(unsigned char *) (p->base + port);
}
unsigned short
simple_inw(struct iop *p, unsigned long port)
{
return *(unsigned short *) (p->base + port);
}
void
simple_outb(struct iop *p, unsigned char value, unsigned long port)
{
*(unsigned char *) (p->base + port) = value;
}
void
simple_outw(struct iop *p, unsigned short value, unsigned long port)
{
*(unsigned short *) (p->base + port) = value;
}
unsigned char
pcc_inb(struct iop *p, unsigned long port)
{
unsigned long addr = p->base + port + 0x40000;
unsigned long v;
if (port & 1)
addr += 0x00400000;
v = *(volatile unsigned char *) addr;
return v;
}
void
pcc_outb(struct iop *p, unsigned char value, unsigned long port)
{
unsigned long addr = p->base + port + 0x40000;
if (port & 1)
addr += 0x00400000;
*(volatile unsigned char *) addr = value;
}
unsigned char
bad_inb(struct iop *p, unsigned long port)
{
badio(inb, port);
}
void
bad_outb(struct iop *p, unsigned char value, unsigned long port)
{
badio(inw, port);
}
#ifdef CONFIG_SMC91X
/* MSTLANEX01 LAN at 0xb400:0000 */
static struct iop laniop = {
.start = 0x00,
.end = 0x0F,
.base = 0x04000000,
.check = simple_check,
.inb = simple_inb,
.inw = simple_inw,
.outb = simple_outb,
.outw = simple_outw,
};
#endif
#ifdef CONFIG_NE2000
/* NE2000 pc card NIC */
static struct iop neiop = {
.start = 0x280,
.end = 0x29f,
.base = 0xb0600000 + 0x80, /* soft 0x280 -> hard 0x300 */
.check = simple_check,
.inb = pcc_inb,
.inw = simple_inw,
.outb = pcc_outb,
.outw = simple_outw,
};
#endif
#ifdef CONFIG_IDE
/* CF in CF slot */
static struct iop cfiop = {
.base = 0xb0600000,
.check = ide_check,
.inb = pcc_inb,
.inw = simple_inw,
.outb = pcc_outb,
.outw = simple_outw,
};
#endif
static __inline__ struct iop *
port2iop(unsigned long port)
{
if (0) ;
#if defined(CONFIG_SMC91X)
else if (laniop.check(&laniop, port))
return &laniop;
#endif
#if defined(CONFIG_NE2000)
else if (neiop.check(&neiop, port))
return &neiop;
#endif
#if defined(CONFIG_IDE)
else if (cfiop.check(&cfiop, port))
return &cfiop;
#endif
else
return NULL;
}
static inline void
delay(void)
{
ctrl_inw(0xac000000);
ctrl_inw(0xac000000);
}
unsigned char
sh7343se_inb(unsigned long port)
{
struct iop *p = port2iop(port);
return (p->inb) (p, port);
}
unsigned char
sh7343se_inb_p(unsigned long port)
{
unsigned char v = sh7343se_inb(port);
delay();
return v;
}
unsigned short
sh7343se_inw(unsigned long port)
{
struct iop *p = port2iop(port);
return (p->inw) (p, port);
}
unsigned int
sh7343se_inl(unsigned long port)
{
badio(inl, port);
}
void
sh7343se_outb(unsigned char value, unsigned long port)
{
struct iop *p = port2iop(port);
(p->outb) (p, value, port);
}
void
sh7343se_outb_p(unsigned char value, unsigned long port)
{
sh7343se_outb(value, port);
delay();
}
void
sh7343se_outw(unsigned short value, unsigned long port)
{
struct iop *p = port2iop(port);
(p->outw) (p, value, port);
}
void
sh7343se_outl(unsigned int value, unsigned long port)
{
badio(outl, port);
}
void
sh7343se_insb(unsigned long port, void *addr, unsigned long count)
{
unsigned char *a = addr;
struct iop *p = port2iop(port);
while (count--)
*a++ = (p->inb) (p, port);
}
void
sh7343se_insw(unsigned long port, void *addr, unsigned long count)
{
unsigned short *a = addr;
struct iop *p = port2iop(port);
while (count--)
*a++ = (p->inw) (p, port);
}
void
sh7343se_insl(unsigned long port, void *addr, unsigned long count)
{
badio(insl, port);
}
void
sh7343se_outsb(unsigned long port, const void *addr, unsigned long count)
{
unsigned char *a = (unsigned char *) addr;
struct iop *p = port2iop(port);
while (count--)
(p->outb) (p, *a++, port);
}
void
sh7343se_outsw(unsigned long port, const void *addr, unsigned long count)
{
unsigned short *a = (unsigned short *) addr;
struct iop *p = port2iop(port);
while (count--)
(p->outw) (p, *a++, port);
}
void
sh7343se_outsl(unsigned long port, const void *addr, unsigned long count)
{
badio(outsw, port);
}
/*
* arch/sh/boards/se/7343/irq.c
*
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/mach/se7343.h>
static void
disable_intreq_irq(unsigned int irq)
{
int bit = irq - OFFCHIP_IRQ_BASE;
u16 val;
val = ctrl_inw(PA_CPLD_IMSK);
val |= 1 << bit;
ctrl_outw(val, PA_CPLD_IMSK);
}
static void
enable_intreq_irq(unsigned int irq)
{
int bit = irq - OFFCHIP_IRQ_BASE;
u16 val;
val = ctrl_inw(PA_CPLD_IMSK);
val &= ~(1 << bit);
ctrl_outw(val, PA_CPLD_IMSK);
}
static void
mask_and_ack_intreq_irq(unsigned int irq)
{
disable_intreq_irq(irq);
}
static unsigned int
startup_intreq_irq(unsigned int irq)
{
enable_intreq_irq(irq);
return 0;
}
static void
shutdown_intreq_irq(unsigned int irq)
{
disable_intreq_irq(irq);
}
static void
end_intreq_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
enable_intreq_irq(irq);
}
static struct hw_interrupt_type intreq_irq_type = {
.typename = "FPGA-IRQ",
.startup = startup_intreq_irq,
.shutdown = shutdown_intreq_irq,
.enable = enable_intreq_irq,
.disable = disable_intreq_irq,
.ack = mask_and_ack_intreq_irq,
.end = end_intreq_irq
};
static void
make_intreq_irq(unsigned int irq)
{
disable_irq_nosync(irq);
irq_desc[irq].handler = &intreq_irq_type;
disable_intreq_irq(irq);
}
int
shmse_irq_demux(int irq)
{
int bit;
volatile u16 val;
if (irq == IRQ5_IRQ) {
/* Read status Register */
val = ctrl_inw(PA_CPLD_ST);
bit = ffs(val);
if (bit != 0)
return OFFCHIP_IRQ_BASE + bit - 1;
}
return irq;
}
/* IRQ5 is multiplexed between the following sources:
* 1. PC Card socket
* 2. Extension slot
* 3. USB Controller
* 4. Serial Controller
*
* We configure IRQ5 as a cascade IRQ.
*/
static struct irqaction irq5 = { no_action, 0, CPU_MASK_NONE, "IRQ5-cascade",
NULL, NULL};
/*
* Initialize IRQ setting
*/
void __init
init_7343se_IRQ(void)
{
/* Setup Multiplexed interrupts */
ctrl_outw(8, PA_CPLD_MODESET); /* Set all CPLD interrupts to active
* low.
*/
/* Mask all CPLD controller interrupts */
ctrl_outw(0x0fff, PA_CPLD_IMSK);
/* PC Card interrupts */
make_intreq_irq(PC_IRQ0);
make_intreq_irq(PC_IRQ1);
make_intreq_irq(PC_IRQ2);
make_intreq_irq(PC_IRQ3);
/* Extension Slot Interrupts */
make_intreq_irq(EXT_IRQ0);
make_intreq_irq(EXT_IRQ1);
make_intreq_irq(EXT_IRQ2);
make_intreq_irq(EXT_IRQ3);
/* USB Controller interrupts */
make_intreq_irq(USB_IRQ0);
make_intreq_irq(USB_IRQ1);
/* Serial Controller interrupts */
make_intreq_irq(UART_IRQ0);
make_intreq_irq(UART_IRQ1);
/* Setup all external interrupts to be active low */
ctrl_outw(0xaaaa, INTC_ICR1);
make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR+2, IRQ5_IPR_POS, IRQ5_PRIORITY);
setup_irq(IRQ5_IRQ, &irq5);
/* Set port control to use IRQ5 */
*(u16 *)0xA4050108 &= ~0xc;
make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
make_ipr_irq(VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8);
ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */
make_ipr_irq(DMTE0_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
make_ipr_irq(DMTE1_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
make_ipr_irq(DMTE5_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
/* I2C block */
make_ipr_irq(IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
make_ipr_irq(IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
IIC0_PRIORITY);
make_ipr_irq(IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
IIC0_PRIORITY);
make_ipr_irq(IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
make_ipr_irq(IIC1_ALI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY);
make_ipr_irq(IIC1_TACKI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS,
IIC1_PRIORITY);
make_ipr_irq(IIC1_WAITI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS,
IIC1_PRIORITY);
make_ipr_irq(IIC1_DTEI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY);
/* SIOF */
make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
/* SIU */
make_ipr_irq(SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY);
/* VIO interrupt */
make_ipr_irq(CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
make_ipr_irq(BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
make_ipr_irq(VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
/*MFI interrupt*/
make_ipr_irq(MFI_IRQ, MFI_IPR_ADDR, MFI_IPR_POS, MFI_PRIORITY);
/* LCD controller */
make_ipr_irq(LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY);
ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */
}
/*
* arch/sh/boards/se/7343/led.c
*
*/
#include <linux/config.h>
#include <linux/sched.h>
#include <asm/mach/se7343.h>
/* Cycle the LED's in the clasic Knightrider/Sun pattern */
void heartbeat_7343se(void)
{
static unsigned int cnt = 0, period = 0;
volatile unsigned short *p = (volatile unsigned short *) PA_LED;
static unsigned bit = 0, up = 1;
cnt += 1;
if (cnt < period) {
return;
}
cnt = 0;
/* Go through the points (roughly!):
* f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
*/
period = 110 - ((300 << FSHIFT) / ((avenrun[0] / 5) + (3 << FSHIFT)));
if (up) {
if (bit == 7) {
bit--;
up = 0;
} else {
bit++;
}
} else {
if (bit == 0) {
bit++;
up = 1;
} else {
bit--;
}
}
*p = 1 << (bit + LED_SHIFT);
}
#include <linux/config.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/machvec.h>
#include <asm/mach/se7343.h>
#include <asm/irq.h>
void heartbeat_7343se(void);
void init_7343se_IRQ(void);
static struct resource smc91x_resources[] = {
[0] = {
.start = 0x10000000,
.end = 0x1000000F,
.flags = IORESOURCE_MEM,
},
[1] = {
/*
* shared with other devices via externel
* interrupt controller in FPGA...
*/
.start = EXT_IRQ2,
.end = EXT_IRQ2,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
};
static struct platform_device *smc91x_platform_devices[] __initdata = {
&smc91x_device,
};
static int __init sh7343se_devices_setup(void)
{
return platform_add_devices(smc91x_platform_devices,
ARRAY_SIZE(smc91x_platform_devices));
}
static void __init sh7343se_setup(char **cmdline_p)
{
device_initcall(sh7343se_devices_setup);
}
/*
* The Machine Vector
*/
struct sh_machine_vector mv_7343se __initmv = {
.mv_name = "SolutionEngine 7343",
.mv_setup = sh7343se_setup,
.mv_nr_irqs = 108,
.mv_inb = sh7343se_inb,
.mv_inw = sh7343se_inw,
.mv_inl = sh7343se_inl,
.mv_outb = sh7343se_outb,
.mv_outw = sh7343se_outw,
.mv_outl = sh7343se_outl,
.mv_inb_p = sh7343se_inb_p,
.mv_inw_p = sh7343se_inw,
.mv_inl_p = sh7343se_inl,
.mv_outb_p = sh7343se_outb_p,
.mv_outw_p = sh7343se_outw,
.mv_outl_p = sh7343se_outl,
.mv_insb = sh7343se_insb,
.mv_insw = sh7343se_insw,
.mv_insl = sh7343se_insl,
.mv_outsb = sh7343se_outsb,
.mv_outsw = sh7343se_outsw,
.mv_outsl = sh7343se_outsl,
.mv_init_irq = init_7343se_IRQ,
.mv_irq_demux = shmse_irq_demux,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_7343se,
#endif
};
ALIAS_MV(7343se)
This diff is collapsed.
...@@ -8,6 +8,7 @@ ...@@ -8,6 +8,7 @@
SE SH_SOLUTION_ENGINE SE SH_SOLUTION_ENGINE
7751SE SH_7751_SOLUTION_ENGINE 7751SE SH_7751_SOLUTION_ENGINE
7300SE SH_7300_SOLUTION_ENGINE 7300SE SH_7300_SOLUTION_ENGINE
7343SE SH_7343_SOLUTION_ENGINE
73180SE SH_73180_SOLUTION_ENGINE 73180SE SH_73180_SOLUTION_ENGINE
7751SYSTEMH SH_7751_SYSTEMH 7751SYSTEMH SH_7751_SYSTEMH
HP6XX SH_HP6XX HP6XX SH_HP6XX
......
...@@ -316,6 +316,8 @@ ...@@ -316,6 +316,8 @@
# define OFFCHIP_NR_IRQS 4 # define OFFCHIP_NR_IRQS 4
#elif defined(CONFIG_SH_R7780RP) #elif defined(CONFIG_SH_R7780RP)
# define OFFCHIP_NR_IRQS 16 # define OFFCHIP_NR_IRQS 16
#elif defined(CONFIG_SH_7343_SOLUTION_ENGINE)
# define OFFCHIP_NR_IRQS 12
#elif defined(CONFIG_SH_UNKNOWN) #elif defined(CONFIG_SH_UNKNOWN)
# define OFFCHIP_NR_IRQS 16 /* Must also be last */ # define OFFCHIP_NR_IRQS 16 /* Must also be last */
#else #else
......
#ifndef __ASM_SH_HITACHI_SE7343_H
#define __ASM_SH_HITACHI_SE7343_H
/*
* include/asm-sh/se/se7343.h
*
* Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
*
* SH-Mobile SolutionEngine 7343 support
*/
/* Box specific addresses. */
/* Area 0 */
#define PA_ROM 0x00000000 /* EPROM */
#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */
#define PA_FROM 0x00400000 /* Flash ROM */
#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */
#define PA_SRAM 0x00800000 /* SRAM */
#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */
/* Area 1 */
#define PA_EXT1 0x04000000
#define PA_EXT1_SIZE 0x04000000
/* Area 2 */
#define PA_EXT2 0x08000000
#define PA_EXT2_SIZE 0x04000000
/* Area 3 */
#define PA_SDRAM 0x0c000000
#define PA_SDRAM_SIZE 0x04000000
/* Area 4 */
#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */
#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */
#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */
#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */
#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */
#define MRSHPC_OPTION (PA_MRSHPC + 6)
#define MRSHPC_CSR (PA_MRSHPC + 8)
#define MRSHPC_ISR (PA_MRSHPC + 10)
#define MRSHPC_ICR (PA_MRSHPC + 12)
#define MRSHPC_CPWCR (PA_MRSHPC + 14)
#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
#define MRSHPC_CDCR (PA_MRSHPC + 28)
#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
#define PA_LED 0xb0C00000 /* LED */
#define LED_SHIFT 0
#define PA_DIPSW 0xb0900000 /* Dip switch 31 */
#define PA_CPLD_MODESET 0xb1400004 /* CPLD Mode set register */
#define PA_CPLD_ST 0xb1400008 /* CPLD Interrupt status register */
#define PA_CPLD_IMSK 0xb140000a /* CPLD Interrupt mask register */
/* Area 5 */
#define PA_EXT5 0x14000000
#define PA_EXT5_SIZE 0x04000000
/* Area 6 */
#define PA_LCD1 0xb8000000
#define PA_LCD2 0xb8800000
#define __IO_PREFIX sh7343se
#include <asm/io_generic.h>
/* External Multiplexed interrupts */
#define PC_IRQ0 OFFCHIP_IRQ_BASE
#define PC_IRQ1 (PC_IRQ0 + 1)
#define PC_IRQ2 (PC_IRQ1 + 1)
#define PC_IRQ3 (PC_IRQ2 + 1)
#define EXT_IRQ0 (PC_IRQ3 + 1)
#define EXT_IRQ1 (EXT_IRQ0 + 1)
#define EXT_IRQ2 (EXT_IRQ1 + 1)
#define EXT_IRQ3 (EXT_IRQ2 + 1)
#define USB_IRQ0 (EXT_IRQ3 + 1)
#define USB_IRQ1 (USB_IRQ0 + 1)
#define UART_IRQ0 (USB_IRQ1 + 1)
#define UART_IRQ1 (UART_IRQ0 + 1)
#endif /* __ASM_SH_HITACHI_SE7343_H */
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