Commit bccccc3d authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Simon Horman

ARM: shmobile: r8a7790: Add SATA clocks to device tree

Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: default avatarValentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 09c98346
...@@ -708,13 +708,16 @@ R8A7790_CLK_LVDS1 R8A7790_CLK_LVDS0 ...@@ -708,13 +708,16 @@ R8A7790_CLK_LVDS1 R8A7790_CLK_LVDS0
mstp8_clks: mstp8_clks@e6150990 { mstp8_clks: mstp8_clks@e6150990 {
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>; clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>,
<&zs_clk>, <&zs_clk>;
#clock-cells = <1>; #clock-cells = <1>;
renesas,clock-indices = < renesas,clock-indices = <
R8A7790_CLK_VIN3 R8A7790_CLK_VIN2 R8A7790_CLK_VIN1 R8A7790_CLK_VIN3 R8A7790_CLK_VIN2 R8A7790_CLK_VIN1
R8A7790_CLK_VIN0 R8A7790_CLK_ETHER R8A7790_CLK_VIN0 R8A7790_CLK_ETHER R8A7790_CLK_SATA1
R8A7790_CLK_SATA0
>; >;
clock-output-names = "vin3", "vin2", "vin1", "vin0", "ether"; clock-output-names =
"vin3", "vin2", "vin1", "vin0", "ether", "sata1", "sata0";
}; };
mstp9_clks: mstp9_clks@e6150994 { mstp9_clks: mstp9_clks@e6150994 {
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
......
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