Commit be2fa17a authored by Tony Lindgren's avatar Tony Lindgren

Merge tag 'for-v3.15-rc/omap-fixes-a' of...

Merge tag 'for-v3.15-rc/omap-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.15/fixes

OMAP hwmod and clock fixes for v3.15-rc

A few OMAP hwmod and clock fixes for v3.15-rc.  Probably the most useful
fix is the AM43xx DPLL patch.

Basic build, boot, and PM test results are here:

http://www.pwsan.com/omap/testlogs/prcm-fixes-a-v3.15-rc/20140411130021/
parents cdd705dd 3d36ad7e
...@@ -209,7 +209,7 @@ u8 omap2_init_dpll_parent(struct clk_hw *hw) ...@@ -209,7 +209,7 @@ u8 omap2_init_dpll_parent(struct clk_hw *hw)
if (v == OMAP3XXX_EN_DPLL_LPBYPASS || if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
v == OMAP3XXX_EN_DPLL_FRBYPASS) v == OMAP3XXX_EN_DPLL_FRBYPASS)
return 1; return 1;
} else if (soc_is_am33xx() || cpu_is_omap44xx()) { } else if (soc_is_am33xx() || cpu_is_omap44xx() || soc_is_am43xx()) {
if (v == OMAP4XXX_EN_DPLL_LPBYPASS || if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
v == OMAP4XXX_EN_DPLL_FRBYPASS || v == OMAP4XXX_EN_DPLL_FRBYPASS ||
v == OMAP4XXX_EN_DPLL_MNBYPASS) v == OMAP4XXX_EN_DPLL_MNBYPASS)
...@@ -255,7 +255,7 @@ unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk) ...@@ -255,7 +255,7 @@ unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk)
if (v == OMAP3XXX_EN_DPLL_LPBYPASS || if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
v == OMAP3XXX_EN_DPLL_FRBYPASS) v == OMAP3XXX_EN_DPLL_FRBYPASS)
return __clk_get_rate(dd->clk_bypass); return __clk_get_rate(dd->clk_bypass);
} else if (soc_is_am33xx() || cpu_is_omap44xx()) { } else if (soc_is_am33xx() || cpu_is_omap44xx() || soc_is_am43xx()) {
if (v == OMAP4XXX_EN_DPLL_LPBYPASS || if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
v == OMAP4XXX_EN_DPLL_FRBYPASS || v == OMAP4XXX_EN_DPLL_FRBYPASS ||
v == OMAP4XXX_EN_DPLL_MNBYPASS) v == OMAP4XXX_EN_DPLL_MNBYPASS)
......
...@@ -2546,11 +2546,12 @@ static int __init _init(struct omap_hwmod *oh, void *data) ...@@ -2546,11 +2546,12 @@ static int __init _init(struct omap_hwmod *oh, void *data)
return -EINVAL; return -EINVAL;
} }
if (np) if (np) {
if (of_find_property(np, "ti,no-reset-on-init", NULL)) if (of_find_property(np, "ti,no-reset-on-init", NULL))
oh->flags |= HWMOD_INIT_NO_RESET; oh->flags |= HWMOD_INIT_NO_RESET;
if (of_find_property(np, "ti,no-idle-on-init", NULL)) if (of_find_property(np, "ti,no-idle-on-init", NULL))
oh->flags |= HWMOD_INIT_NO_IDLE; oh->flags |= HWMOD_INIT_NO_IDLE;
}
oh->_state = _HWMOD_STATE_INITIALIZED; oh->_state = _HWMOD_STATE_INITIALIZED;
......
...@@ -1964,7 +1964,7 @@ static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = { ...@@ -1964,7 +1964,7 @@ static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = {
static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = { static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
.name = "usb_host_hs", .name = "usb_host_hs",
.class = &omap3xxx_usb_host_hs_hwmod_class, .class = &omap3xxx_usb_host_hs_hwmod_class,
.clkdm_name = "l3_init_clkdm", .clkdm_name = "usbhost_clkdm",
.mpu_irqs = omap3xxx_usb_host_hs_irqs, .mpu_irqs = omap3xxx_usb_host_hs_irqs,
.main_clk = "usbhost_48m_fck", .main_clk = "usbhost_48m_fck",
.prcm = { .prcm = {
...@@ -2047,7 +2047,7 @@ static struct omap_hwmod_irq_info omap3xxx_usb_tll_hs_irqs[] = { ...@@ -2047,7 +2047,7 @@ static struct omap_hwmod_irq_info omap3xxx_usb_tll_hs_irqs[] = {
static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = { static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {
.name = "usb_tll_hs", .name = "usb_tll_hs",
.class = &omap3xxx_usb_tll_hs_hwmod_class, .class = &omap3xxx_usb_tll_hs_hwmod_class,
.clkdm_name = "l3_init_clkdm", .clkdm_name = "core_l4_clkdm",
.mpu_irqs = omap3xxx_usb_tll_hs_irqs, .mpu_irqs = omap3xxx_usb_tll_hs_irqs,
.main_clk = "usbtll_fck", .main_clk = "usbtll_fck",
.prcm = { .prcm = {
......
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