Commit bf5c3ae1 authored by Benjamin Gaignard's avatar Benjamin Gaignard Committed by Rob Herring

dt-bindings: thermal: Convert stm32 thermal bindings to json-schema

Convert the STM32 thermal binding to DT schema format using json-schema
Signed-off-by: default avatarBenjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 97721c5e
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/st,stm32-thermal.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 digital thermal sensor (DTS) binding
maintainers:
- David Hernandez Sanchez <david.hernandezsanchez@st.com>
properties:
compatible:
const: st,stm32-thermal
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
clock-names:
items:
- const: pclk
"#thermal-sensor-cells":
const: 0
required:
- "#thermal-sensor-cells"
- compatible
- reg
- interrupts
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/stm32mp1-clks.h>
dts: thermal@50028000 {
compatible = "st,stm32-thermal";
reg = <0x50028000 0x100>;
clocks = <&rcc TMPSENS>;
clock-names = "pclk";
#thermal-sensor-cells = <0>;
interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&dts>;
trips {
cpu_alert1: cpu-alert1 {
temperature = <85000>;
hysteresis = <0>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <120000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
};
};
};
...
Binding for Thermal Sensor for STMicroelectronics STM32 series of SoCs.
On STM32 SoCs, the Digital Temperature Sensor (DTS) is in charge of managing an
analog block which delivers a frequency depending on the internal SoC's
temperature. By using a reference frequency, DTS is able to provide a sample
number which can be translated into a temperature by the user.
DTS provides interrupt notification mechanism by threshold. This mechanism
offers two temperature trip points: passive and critical. The first is intended
for passive cooling notification while the second is used for over-temperature
reset.
Required parameters:
-------------------
compatible: Should be "st,stm32-thermal"
reg: This should be the physical base address and length of the
sensor's registers.
clocks: Phandle of the clock used by the thermal sensor.
See: Documentation/devicetree/bindings/clock/clock-bindings.txt
clock-names: Should be "pclk" for register access clock and reference clock.
See: Documentation/devicetree/bindings/resource-names.txt
#thermal-sensor-cells: Should be 0. See ./thermal.txt for a description.
interrupts: Standard way to define interrupt number.
Example:
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&thermal>;
trips {
cpu_alert1: cpu-alert1 {
temperature = <85000>;
hysteresis = <0>;
type = "passive";
};
cpu-crit: cpu-crit {
temperature = <120000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
};
};
};
thermal: thermal@50028000 {
compatible = "st,stm32-thermal";
reg = <0x50028000 0x100>;
clocks = <&rcc TMPSENS>;
clock-names = "pclk";
#thermal-sensor-cells = <0>;
interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
};
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