Commit bf64e0b0 authored by Chris Wilson's avatar Chris Wilson

drm/i915: Expand I915_PARAM_HAS_SCHEDULER into a capability bitmask

In the next few patches, we wish to enable different features for the
scheduler, some which may subtlety change ABI (e.g. allow requests to be
reordered under different circumstances). So we need to make sure
userspace is cognizant of the changes (if they care), by which we employ
the usual method of a GETPARAM. We already have an
I915_PARAM_HAS_SCHEDULER (which notes the existing ability to reorder
requests to avoid bubbles), and now we wish to extend that to be a
bitmask to describe the different capabilities implemented.
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171003203453.15692-7-chris@chris-wilson.co.uk
parent 1f181225
...@@ -367,8 +367,9 @@ static int i915_getparam(struct drm_device *dev, void *data, ...@@ -367,8 +367,9 @@ static int i915_getparam(struct drm_device *dev, void *data,
value = i915_gem_mmap_gtt_version(); value = i915_gem_mmap_gtt_version();
break; break;
case I915_PARAM_HAS_SCHEDULER: case I915_PARAM_HAS_SCHEDULER:
value = dev_priv->engine[RCS] && value = 0;
dev_priv->engine[RCS]->schedule; if (dev_priv->engine[RCS] && dev_priv->engine[RCS]->schedule)
value |= I915_SCHEDULER_CAP_ENABLED;
break; break;
case I915_PARAM_MMAP_VERSION: case I915_PARAM_MMAP_VERSION:
/* Remember to bump this if the version changes! */ /* Remember to bump this if the version changes! */
......
...@@ -397,10 +397,17 @@ typedef struct drm_i915_irq_wait { ...@@ -397,10 +397,17 @@ typedef struct drm_i915_irq_wait {
#define I915_PARAM_MIN_EU_IN_POOL 39 #define I915_PARAM_MIN_EU_IN_POOL 39
#define I915_PARAM_MMAP_GTT_VERSION 40 #define I915_PARAM_MMAP_GTT_VERSION 40
/* Query whether DRM_I915_GEM_EXECBUFFER2 supports user defined execution /*
* Query whether DRM_I915_GEM_EXECBUFFER2 supports user defined execution
* priorities and the driver will attempt to execute batches in priority order. * priorities and the driver will attempt to execute batches in priority order.
* The param returns a capability bitmask, nonzero implies that the scheduler
* is enabled, with different features present according to the mask.
*/ */
#define I915_PARAM_HAS_SCHEDULER 41 #define I915_PARAM_HAS_SCHEDULER 41
#define I915_SCHEDULER_CAP_ENABLED (1ul << 0)
#define I915_SCHEDULER_CAP_PRIORITY (1ul << 1)
#define I915_SCHEDULER_CAP_PREEMPTION (1ul << 2)
#define I915_PARAM_HUC_STATUS 42 #define I915_PARAM_HUC_STATUS 42
/* Query whether DRM_I915_GEM_EXECBUFFER2 supports the ability to opt-out of /* Query whether DRM_I915_GEM_EXECBUFFER2 supports the ability to opt-out of
......
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