Commit c095b97c authored by Zhi Wang's avatar Zhi Wang Committed by Joonas Lahtinen

drm/i915: Remove the "INDEX" suffix from PPAT marcos

Remove the "INDEX" suffix from PPAT marcos as they are bits actually, not
indexes.
Suggested-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarZhi Wang <zhi.a.wang@intel.com>
Cc: Ben Widawsky <benjamin.widawsky@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1505392783-4084-2-git-send-email-zhi.a.wang@intel.com
parent 4395890a
...@@ -1971,7 +1971,7 @@ static int alloc_scratch_pages(struct intel_vgpu *vgpu, ...@@ -1971,7 +1971,7 @@ static int alloc_scratch_pages(struct intel_vgpu *vgpu,
*/ */
se.val64 |= _PAGE_PRESENT | _PAGE_RW; se.val64 |= _PAGE_PRESENT | _PAGE_RW;
if (type == GTT_TYPE_PPGTT_PDE_PT) if (type == GTT_TYPE_PPGTT_PDE_PT)
se.val64 |= PPAT_CACHED_INDEX; se.val64 |= PPAT_CACHED;
for (i = 0; i < page_entry_num; i++) for (i = 0; i < page_entry_num; i++)
ops->set_entry(scratch_pt, &se, i, false, 0, vgpu); ops->set_entry(scratch_pt, &se, i, false, 0, vgpu);
......
...@@ -230,13 +230,13 @@ static gen8_pte_t gen8_pte_encode(dma_addr_t addr, ...@@ -230,13 +230,13 @@ static gen8_pte_t gen8_pte_encode(dma_addr_t addr,
switch (level) { switch (level) {
case I915_CACHE_NONE: case I915_CACHE_NONE:
pte |= PPAT_UNCACHED_INDEX; pte |= PPAT_UNCACHED;
break; break;
case I915_CACHE_WT: case I915_CACHE_WT:
pte |= PPAT_DISPLAY_ELLC_INDEX; pte |= PPAT_DISPLAY_ELLC;
break; break;
default: default:
pte |= PPAT_CACHED_INDEX; pte |= PPAT_CACHED;
break; break;
} }
...@@ -249,9 +249,9 @@ static gen8_pde_t gen8_pde_encode(const dma_addr_t addr, ...@@ -249,9 +249,9 @@ static gen8_pde_t gen8_pde_encode(const dma_addr_t addr,
gen8_pde_t pde = _PAGE_PRESENT | _PAGE_RW; gen8_pde_t pde = _PAGE_PRESENT | _PAGE_RW;
pde |= addr; pde |= addr;
if (level != I915_CACHE_NONE) if (level != I915_CACHE_NONE)
pde |= PPAT_CACHED_PDE_INDEX; pde |= PPAT_CACHED_PDE;
else else
pde |= PPAT_UNCACHED_INDEX; pde |= PPAT_UNCACHED;
return pde; return pde;
} }
......
...@@ -126,10 +126,10 @@ typedef u64 gen8_ppgtt_pml4e_t; ...@@ -126,10 +126,10 @@ typedef u64 gen8_ppgtt_pml4e_t;
* tables */ * tables */
#define GEN8_PDPE_MASK 0x1ff #define GEN8_PDPE_MASK 0x1ff
#define PPAT_UNCACHED_INDEX (_PAGE_PWT | _PAGE_PCD) #define PPAT_UNCACHED (_PAGE_PWT | _PAGE_PCD)
#define PPAT_CACHED_PDE_INDEX 0 /* WB LLC */ #define PPAT_CACHED_PDE 0 /* WB LLC */
#define PPAT_CACHED_INDEX _PAGE_PAT /* WB LLCeLLC */ #define PPAT_CACHED _PAGE_PAT /* WB LLCeLLC */
#define PPAT_DISPLAY_ELLC_INDEX _PAGE_PCD /* WT eLLC */ #define PPAT_DISPLAY_ELLC _PAGE_PCD /* WT eLLC */
#define CHV_PPAT_SNOOP (1<<6) #define CHV_PPAT_SNOOP (1<<6)
#define GEN8_PPAT_AGE(x) ((x)<<4) #define GEN8_PPAT_AGE(x) ((x)<<4)
......
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