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Commit c16c9d06 authored by Sujith's avatar Sujith Committed by John W. Linville
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ath9k: Try to fix whitespace damage 

Signed-off-by: default avatarSujith <Sujith.Manoharan@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 54e4cec6
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Showing with 215 additions and 229 deletions
drivers/net/wireless/ath/ath9k/eeprom.c
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drivers/net/wireless/ath/ath9k/eeprom.h
View file @ c16c9d06
...@@ -385,106 +385,103 @@ struct calDataPerFreqOpLoop { ...@@ -385,106 +385,103 @@ struct calDataPerFreqOpLoop {
} __packed; } __packed;
struct modal_eep_4k_header { struct modal_eep_4k_header {
u32 antCtrlChain[AR5416_EEP4K_MAX_CHAINS]; u32 antCtrlChain[AR5416_EEP4K_MAX_CHAINS];
u32 antCtrlCommon; u32 antCtrlCommon;
u8 antennaGainCh[AR5416_EEP4K_MAX_CHAINS]; u8 antennaGainCh[AR5416_EEP4K_MAX_CHAINS];
u8 switchSettling; u8 switchSettling;
u8 txRxAttenCh[AR5416_EEP4K_MAX_CHAINS]; u8 txRxAttenCh[AR5416_EEP4K_MAX_CHAINS];
u8 rxTxMarginCh[AR5416_EEP4K_MAX_CHAINS]; u8 rxTxMarginCh[AR5416_EEP4K_MAX_CHAINS];
u8 adcDesiredSize; u8 adcDesiredSize;
u8 pgaDesiredSize; u8 pgaDesiredSize;
u8 xlnaGainCh[AR5416_EEP4K_MAX_CHAINS]; u8 xlnaGainCh[AR5416_EEP4K_MAX_CHAINS];
u8 txEndToXpaOff; u8 txEndToXpaOff;
u8 txEndToRxOn; u8 txEndToRxOn;
u8 txFrameToXpaOn; u8 txFrameToXpaOn;
u8 thresh62; u8 thresh62;
u8 noiseFloorThreshCh[AR5416_EEP4K_MAX_CHAINS]; u8 noiseFloorThreshCh[AR5416_EEP4K_MAX_CHAINS];
u8 xpdGain; u8 xpdGain;
u8 xpd; u8 xpd;
u8 iqCalICh[AR5416_EEP4K_MAX_CHAINS]; u8 iqCalICh[AR5416_EEP4K_MAX_CHAINS];
u8 iqCalQCh[AR5416_EEP4K_MAX_CHAINS]; u8 iqCalQCh[AR5416_EEP4K_MAX_CHAINS];
u8 pdGainOverlap; u8 pdGainOverlap;
u8 ob_01; u8 ob_01;
u8 db1_01; u8 db1_01;
u8 xpaBiasLvl; u8 xpaBiasLvl;
u8 txFrameToDataStart; u8 txFrameToDataStart;
u8 txFrameToPaOn; u8 txFrameToPaOn;
u8 ht40PowerIncForPdadc; u8 ht40PowerIncForPdadc;
u8 bswAtten[AR5416_EEP4K_MAX_CHAINS]; u8 bswAtten[AR5416_EEP4K_MAX_CHAINS];
u8 bswMargin[AR5416_EEP4K_MAX_CHAINS]; u8 bswMargin[AR5416_EEP4K_MAX_CHAINS];
u8 swSettleHt40; u8 swSettleHt40;
u8 xatten2Db[AR5416_EEP4K_MAX_CHAINS]; u8 xatten2Db[AR5416_EEP4K_MAX_CHAINS];
u8 xatten2Margin[AR5416_EEP4K_MAX_CHAINS]; u8 xatten2Margin[AR5416_EEP4K_MAX_CHAINS];
u8 db2_01; u8 db2_01;
u8 version; u8 version;
u16 ob_234; u16 ob_234;
u16 db1_234; u16 db1_234;
u16 db2_234; u16 db2_234;
u8 futureModal[4]; u8 futureModal[4];
struct spur_chan spurChans[AR5416_EEPROM_MODAL_SPURS]; struct spur_chan spurChans[AR5416_EEPROM_MODAL_SPURS];
} __packed; } __packed;
struct base_eep_ar9287_header { struct base_eep_ar9287_header {
u16 length; u16 length;
u16 checksum; u16 checksum;
u16 version; u16 version;
u8 opCapFlags; u8 opCapFlags;
u8 eepMisc; u8 eepMisc;
u16 regDmn[2]; u16 regDmn[2];
u8 macAddr[6]; u8 macAddr[6];
u8 rxMask; u8 rxMask;
u8 txMask; u8 txMask;
u16 rfSilent; u16 rfSilent;
u16 blueToothOptions; u16 blueToothOptions;
u16 deviceCap; u16 deviceCap;
u32 binBuildNumber; u32 binBuildNumber;
u8 deviceType; u8 deviceType;
u8 openLoopPwrCntl; u8 openLoopPwrCntl;
int8_t pwrTableOffset; int8_t pwrTableOffset;
int8_t tempSensSlope; int8_t tempSensSlope;
int8_t tempSensSlopePalOn; int8_t tempSensSlopePalOn;
u8 futureBase[29]; u8 futureBase[29];
} __packed; } __packed;
struct modal_eep_ar9287_header { struct modal_eep_ar9287_header {
u32 antCtrlChain[AR9287_MAX_CHAINS]; u32 antCtrlChain[AR9287_MAX_CHAINS];
u32 antCtrlCommon; u32 antCtrlCommon;
int8_t antennaGainCh[AR9287_MAX_CHAINS]; int8_t antennaGainCh[AR9287_MAX_CHAINS];
u8 switchSettling; u8 switchSettling;
u8 txRxAttenCh[AR9287_MAX_CHAINS]; u8 txRxAttenCh[AR9287_MAX_CHAINS];
u8 rxTxMarginCh[AR9287_MAX_CHAINS]; u8 rxTxMarginCh[AR9287_MAX_CHAINS];
int8_t adcDesiredSize; int8_t adcDesiredSize;
u8 txEndToXpaOff; u8 txEndToXpaOff;
u8 txEndToRxOn; u8 txEndToRxOn;
u8 txFrameToXpaOn; u8 txFrameToXpaOn;
u8 thresh62; u8 thresh62;
int8_t noiseFloorThreshCh[AR9287_MAX_CHAINS]; int8_t noiseFloorThreshCh[AR9287_MAX_CHAINS];
u8 xpdGain; u8 xpdGain;
u8 xpd; u8 xpd;
int8_t iqCalICh[AR9287_MAX_CHAINS]; int8_t iqCalICh[AR9287_MAX_CHAINS];
int8_t iqCalQCh[AR9287_MAX_CHAINS]; int8_t iqCalQCh[AR9287_MAX_CHAINS];
u8 pdGainOverlap; u8 pdGainOverlap;
u8 xpaBiasLvl; u8 xpaBiasLvl;
u8 txFrameToDataStart; u8 txFrameToDataStart;
u8 txFrameToPaOn; u8 txFrameToPaOn;
u8 ht40PowerIncForPdadc; u8 ht40PowerIncForPdadc;
u8 bswAtten[AR9287_MAX_CHAINS]; u8 bswAtten[AR9287_MAX_CHAINS];
u8 bswMargin[AR9287_MAX_CHAINS]; u8 bswMargin[AR9287_MAX_CHAINS];
u8 swSettleHt40; u8 swSettleHt40;
u8 version; u8 version;
u8 db1; u8 db1;
u8 db2; u8 db2;
u8 ob_cck; u8 ob_cck;
u8 ob_psk; u8 ob_psk;
u8 ob_qam; u8 ob_qam;
u8 ob_pal_off; u8 ob_pal_off;
u8 futureModal[30]; u8 futureModal[30];
struct spur_chan spurChans[AR9287_EEPROM_MODAL_SPURS]; struct spur_chan spurChans[AR9287_EEPROM_MODAL_SPURS];
} __packed; } __packed;
struct cal_data_per_freq { struct cal_data_per_freq {
u8 pwrPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]; u8 pwrPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
u8 vpdPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]; u8 vpdPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
...@@ -525,7 +522,6 @@ struct cal_data_op_loop_ar9287 { ...@@ -525,7 +522,6 @@ struct cal_data_op_loop_ar9287 {
u8 empty[2][5]; u8 empty[2][5];
} __packed; } __packed;
struct cal_data_per_freq_ar9287 { struct cal_data_per_freq_ar9287 {
u8 pwrPdg[AR9287_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS]; u8 pwrPdg[AR9287_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS];
u8 vpdPdg[AR9287_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS]; u8 vpdPdg[AR9287_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS];
...@@ -601,26 +597,25 @@ struct ar5416_eeprom_4k { ...@@ -601,26 +597,25 @@ struct ar5416_eeprom_4k {
} __packed; } __packed;
struct ar9287_eeprom { struct ar9287_eeprom {
struct base_eep_ar9287_header baseEepHeader; struct base_eep_ar9287_header baseEepHeader;
u8 custData[AR9287_DATA_SZ]; u8 custData[AR9287_DATA_SZ];
struct modal_eep_ar9287_header modalHeader; struct modal_eep_ar9287_header modalHeader;
u8 calFreqPier2G[AR9287_NUM_2G_CAL_PIERS]; u8 calFreqPier2G[AR9287_NUM_2G_CAL_PIERS];
union cal_data_per_freq_ar9287_u union cal_data_per_freq_ar9287_u
calPierData2G[AR9287_MAX_CHAINS][AR9287_NUM_2G_CAL_PIERS]; calPierData2G[AR9287_MAX_CHAINS][AR9287_NUM_2G_CAL_PIERS];
struct cal_target_power_leg struct cal_target_power_leg
calTargetPowerCck[AR9287_NUM_2G_CCK_TARGET_POWERS]; calTargetPowerCck[AR9287_NUM_2G_CCK_TARGET_POWERS];
struct cal_target_power_leg struct cal_target_power_leg
calTargetPower2G[AR9287_NUM_2G_20_TARGET_POWERS]; calTargetPower2G[AR9287_NUM_2G_20_TARGET_POWERS];
struct cal_target_power_ht struct cal_target_power_ht
calTargetPower2GHT20[AR9287_NUM_2G_20_TARGET_POWERS]; calTargetPower2GHT20[AR9287_NUM_2G_20_TARGET_POWERS];
struct cal_target_power_ht struct cal_target_power_ht
calTargetPower2GHT40[AR9287_NUM_2G_40_TARGET_POWERS]; calTargetPower2GHT40[AR9287_NUM_2G_40_TARGET_POWERS];
u8 ctlIndex[AR9287_NUM_CTLS]; u8 ctlIndex[AR9287_NUM_CTLS];
struct cal_ctl_data_ar9287 ctlData[AR9287_NUM_CTLS]; struct cal_ctl_data_ar9287 ctlData[AR9287_NUM_CTLS];
u8 padding; u8 padding;
} __packed; } __packed;
enum reg_ext_bitmap { enum reg_ext_bitmap {
REG_EXT_JAPAN_MIDBAND = 1, REG_EXT_JAPAN_MIDBAND = 1,
REG_EXT_FCC_DFS_HT40 = 2, REG_EXT_FCC_DFS_HT40 = 2,
......
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