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nexedi
linux
Commits
c2050b96
Commit
c2050b96
authored
Apr 30, 2002
by
Linus Torvalds
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c0e0225b
1653d8cd
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3
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3 changed files
with
19 additions
and
2 deletions
+19
-2
drivers/ide/Config.help
drivers/ide/Config.help
+9
-0
drivers/ide/Config.in
drivers/ide/Config.in
+3
-0
drivers/ide/piix.c
drivers/ide/piix.c
+7
-2
No files found.
drivers/ide/Config.help
View file @
c2050b96
...
...
@@ -424,6 +424,15 @@ CONFIG_BLK_DEV_PIIX
the kernel to change PIO, DMA and UDMA speeds and to configure
the chip to optimum performance.
CONFIG_BLK_DEV_PIIX_TRY133
The ICH2, ICH2-M, ICH3, ICH3-M, ICH3-S and CICH chips can support
UDMA133 in hardware, even though the specifications of the chips
say otherwise. By enabling this option, you allow the driver to
enable the UDMA133 mode on these chips.
If you want to stay on the safe side, say N here.
If you prefer maximum performance, say Y here.
CONFIG_BLK_DEV_PDC202XX
Promise Ultra33 or PDC20246
Promise Ultra66 or PDC20262
...
...
drivers/ide/Config.in
View file @
c2050b96
...
...
@@ -60,6 +60,9 @@ if [ "$CONFIG_BLK_DEV_IDE" != "n" ]; then
dep_mbool ' HPT34X AUTODMA support (EXPERMENTAL)' CONFIG_HPT34X_AUTODMA $CONFIG_BLK_DEV_HPT34X $CONFIG_EXPERIMENTAL
dep_bool ' HPT366 chipset support' CONFIG_BLK_DEV_HPT366 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_bool ' Intel and Efar (SMsC) chipset support' CONFIG_BLK_DEV_PIIX $CONFIG_BLK_DEV_IDEDMA_PCI
if [ "$CONFIG_BLK_DEV_PIIX" = "y" ]; then
dep_bool ' Use UDMA133 even on ICH2, ICH3 and CICH chips (EXPERIMENTAL)' CONFIG_BLK_DEV_PIIX_TRY133 $CONFIG_EXPERIMENTAL
fi
if [ "$CONFIG_MIPS_ITE8172" = "y" -o "$CONFIG_MIPS_IVR" = "y" ]; then
dep_mbool ' IT8172 IDE support' CONFIG_BLK_DEV_IT8172 $CONFIG_BLK_DEV_IDEDMA_PCI
dep_mbool ' IT8172 IDE Tuning support' CONFIG_IT8172_TUNING $CONFIG_BLK_DEV_IT8172 $CONFIG_IDEDMA_PCI_AUTO
...
...
drivers/ide/piix.c
View file @
c2050b96
...
...
@@ -69,6 +69,11 @@
#define PIIX_CHECK_REV 0x40
/* May be a buggy revision of PIIX */
#define PIIX_NODMA 0x80
/* Don't do DMA with this chip */
#ifdef CONFIG_BLK_DEV_PIIX_TRY133
/* I think even the older ICHs should be able to do UDMA133 */
#undef PIIX_UDMA_100
#define PIIX_UDMA_100 PIIX_UDMA_133
#endif
/*
* Intel IDE chips
*/
...
...
@@ -78,7 +83,7 @@ static struct piix_ide_chip {
unsigned
char
flags
;
}
piix_ide_chips
[]
=
{
{
PCI_DEVICE_ID_INTEL_82801DB_9
,
PIIX_UDMA_133
|
PIIX_PINGPONG
},
/* Intel 82801DB ICH4 */
{
PCI_DEVICE_ID_INTEL_82801CA_11
,
PIIX_UDMA_100
|
PIIX_PINGPONG
},
/* Intel 82801CA ICH3 */
{
PCI_DEVICE_ID_INTEL_82801CA_11
,
PIIX_UDMA_100
|
PIIX_PINGPONG
},
/* Intel 82801CA ICH3
/ICH3-S
*/
{
PCI_DEVICE_ID_INTEL_82801CA_10
,
PIIX_UDMA_100
|
PIIX_PINGPONG
},
/* Intel 82801CAM ICH3-M */
{
PCI_DEVICE_ID_INTEL_82801E_9
,
PIIX_UDMA_100
|
PIIX_PINGPONG
},
/* Intel 82801E C-ICH */
{
PCI_DEVICE_ID_INTEL_82801BA_9
,
PIIX_UDMA_100
|
PIIX_PINGPONG
},
/* Intel 82801BA ICH2 */
...
...
@@ -87,7 +92,7 @@ static struct piix_ide_chip {
{
PCI_DEVICE_ID_INTEL_82801AA_1
,
PIIX_UDMA_66
|
PIIX_PINGPONG
},
/* Intel 82801AA ICH */
{
PCI_DEVICE_ID_INTEL_82372FB_1
,
PIIX_UDMA_66
},
/* Intel 82372FB PIIX5 */
{
PCI_DEVICE_ID_INTEL_82443MX_1
,
PIIX_UDMA_33
},
/* Intel 82443MX MPIIX4 */
{
PCI_DEVICE_ID_INTEL_82371AB
,
PIIX_UDMA_33
},
/* Intel 82371AB/EB PIIX4/4E */
{
PCI_DEVICE_ID_INTEL_82371AB
,
PIIX_UDMA_33
},
/* Intel 82371AB/EB PIIX4/
PIIX
4E */
{
PCI_DEVICE_ID_INTEL_82371SB_1
,
PIIX_UDMA_NONE
},
/* Intel 82371SB PIIX3 */
{
PCI_DEVICE_ID_INTEL_82371FB_1
,
PIIX_UDMA_NONE
|
PIIX_NO_SITRE
|
PIIX_CHECK_REV
},
/* Intel 82371FB PIIX */
{
PCI_DEVICE_ID_EFAR_SLC90E66_1
,
PIIX_UDMA_66
|
PIIX_VICTORY
},
/* Efar Victory66 */
...
...
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