ASoC: tlv320aic3x: Optimize PLL programming in aic3x_set_bias_level
There is only need to enable/disable once the PLL when the bias is going between on, prepare, standby and off states. Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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