Commit c4347b05 authored by Lorenzo Pieralisi's avatar Lorenzo Pieralisi Committed by Michal Simek

microblaze/PCI: Remove stale pcibios_align_resource() comment

commit 01cf9d52 ("microblaze/PCI: Support generic Xilinx AXI PCIe Host
Bridge IP driver")

and

commit ecf677c8 ("PCI: Add a generic weak pcibios_align_resource()")

first patched then removed pcibios_align_resource() from the microblaze
architecture code but failed to remove the comment that was added to
it.

Remove it since it has now become stale and it is quite confusing.
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Bharat Kumar Gogada <bharatku@xilinx.com>
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent 9fe37714
...@@ -597,19 +597,6 @@ static void pcibios_fixup_resources(struct pci_dev *dev) ...@@ -597,19 +597,6 @@ static void pcibios_fixup_resources(struct pci_dev *dev)
} }
DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources); DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources);
/*
* We need to avoid collisions with `mirrored' VGA ports
* and other strange ISA hardware, so we always want the
* addresses to be allocated in the 0x000-0x0ff region
* modulo 0x400.
*
* Why? Because some silly external IO cards only decode
* the low 10 bits of the IO address. The 0x00-0xff region
* is reserved for motherboard devices that decode all 16
* bits, so it's ok to allocate at, say, 0x2800-0x28ff,
* but we want to try to avoid allocating at 0x2900-0x2bff
* which might have be mirrored at 0x0100-0x03ff..
*/
int pcibios_add_device(struct pci_dev *dev) int pcibios_add_device(struct pci_dev *dev)
{ {
dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
......
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