Commit c66e98c9 authored by Jisheng Zhang's avatar Jisheng Zhang Committed by David S. Miller

net: mvneta: use cache_line_size() to get cacheline size

L1_CACHE_BYTES may not be the real cacheline size, use cache_line_size
to determine the cacheline size in runtime.
Signed-off-by: default avatarJisheng Zhang <jszhang@marvell.com>
Suggested-by: default avatarMarcin Wojtas <mw@semihalf.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 4a0a12d2
...@@ -299,7 +299,7 @@ ...@@ -299,7 +299,7 @@
#define MVNETA_RX_PKT_SIZE(mtu) \ #define MVNETA_RX_PKT_SIZE(mtu) \
ALIGN((mtu) + MVNETA_MH_SIZE + MVNETA_VLAN_TAG_LEN + \ ALIGN((mtu) + MVNETA_MH_SIZE + MVNETA_VLAN_TAG_LEN + \
ETH_HLEN + ETH_FCS_LEN, \ ETH_HLEN + ETH_FCS_LEN, \
L1_CACHE_BYTES) cache_line_size())
#define IS_TSO_HEADER(txq, addr) \ #define IS_TSO_HEADER(txq, addr) \
((addr >= txq->tso_hdrs_phys) && \ ((addr >= txq->tso_hdrs_phys) && \
......
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