Commit c907e0eb authored by Brian Starkey's avatar Brian Starkey Committed by Linus Torvalds

memremap: add MEMREMAP_WC flag

Add a flag to memremap() for writecombine mappings.  Mappings satisfied
by this flag will not be cached, however writes may be delayed or
combined into more efficient bursts.  This is most suitable for buffers
written sequentially by the CPU for use by other DMA devices.
Signed-off-by: default avatarBrian Starkey <brian.starkey@arm.com>
Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent cf61e2a1
...@@ -135,6 +135,7 @@ enum { ...@@ -135,6 +135,7 @@ enum {
/* See memremap() kernel-doc for usage description... */ /* See memremap() kernel-doc for usage description... */
MEMREMAP_WB = 1 << 0, MEMREMAP_WB = 1 << 0,
MEMREMAP_WT = 1 << 1, MEMREMAP_WT = 1 << 1,
MEMREMAP_WC = 1 << 2,
}; };
void *memremap(resource_size_t offset, size_t size, unsigned long flags); void *memremap(resource_size_t offset, size_t size, unsigned long flags);
......
...@@ -41,11 +41,13 @@ static void *try_ram_remap(resource_size_t offset, size_t size) ...@@ -41,11 +41,13 @@ static void *try_ram_remap(resource_size_t offset, size_t size)
* memremap() - remap an iomem_resource as cacheable memory * memremap() - remap an iomem_resource as cacheable memory
* @offset: iomem resource start address * @offset: iomem resource start address
* @size: size of remap * @size: size of remap
* @flags: either MEMREMAP_WB or MEMREMAP_WT * @flags: any of MEMREMAP_WB, MEMREMAP_WT and MEMREMAP_WC
* *
* memremap() is "ioremap" for cases where it is known that the resource * memremap() is "ioremap" for cases where it is known that the resource
* being mapped does not have i/o side effects and the __iomem * being mapped does not have i/o side effects and the __iomem
* annotation is not applicable. * annotation is not applicable. In the case of multiple flags, the different
* mapping types will be attempted in the order listed below until one of
* them succeeds.
* *
* MEMREMAP_WB - matches the default mapping for System RAM on * MEMREMAP_WB - matches the default mapping for System RAM on
* the architecture. This is usually a read-allocate write-back cache. * the architecture. This is usually a read-allocate write-back cache.
...@@ -57,6 +59,10 @@ static void *try_ram_remap(resource_size_t offset, size_t size) ...@@ -57,6 +59,10 @@ static void *try_ram_remap(resource_size_t offset, size_t size)
* cache or are written through to memory and never exist in a * cache or are written through to memory and never exist in a
* cache-dirty state with respect to program visibility. Attempts to * cache-dirty state with respect to program visibility. Attempts to
* map System RAM with this mapping type will fail. * map System RAM with this mapping type will fail.
*
* MEMREMAP_WC - establish a writecombine mapping, whereby writes may
* be coalesced together (e.g. in the CPU's write buffers), but is otherwise
* uncached. Attempts to map System RAM with this mapping type will fail.
*/ */
void *memremap(resource_size_t offset, size_t size, unsigned long flags) void *memremap(resource_size_t offset, size_t size, unsigned long flags)
{ {
...@@ -102,6 +108,9 @@ void *memremap(resource_size_t offset, size_t size, unsigned long flags) ...@@ -102,6 +108,9 @@ void *memremap(resource_size_t offset, size_t size, unsigned long flags)
if (!addr && (flags & MEMREMAP_WT)) if (!addr && (flags & MEMREMAP_WT))
addr = ioremap_wt(offset, size); addr = ioremap_wt(offset, size);
if (!addr && (flags & MEMREMAP_WC))
addr = ioremap_wc(offset, size);
return addr; return addr;
} }
EXPORT_SYMBOL(memremap); EXPORT_SYMBOL(memremap);
......
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