Commit cb7cb286 authored by H. Peter Anvin's avatar H. Peter Anvin

x86, kvm: Remove incorrect redundant assembly constraint

In __emulate_1op_rax_rdx, we use "+a" and "+d" which are input/output
constraints, and *then* use "a" and "d" as input constraints.  This is
incorrect, but happens to work on some versions of gcc.

However, it breaks gcc with -O0 and icc, and may break on future
versions of gcc.
Reported-and-tested-by: default avatarMelanie Blower <melanie.blower@intel.com>
Signed-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/r/B3584E72CFEBED439A3ECA9BCE67A4EF1B17AF90@FMSMSX107.amr.corp.intel.comReviewed-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
Acked-by: default avatarMarcelo Tosatti <mtosatti@redhat.com>
parent 9489e9dc
...@@ -426,8 +426,7 @@ static void invalidate_registers(struct x86_emulate_ctxt *ctxt) ...@@ -426,8 +426,7 @@ static void invalidate_registers(struct x86_emulate_ctxt *ctxt)
_ASM_EXTABLE(1b, 3b) \ _ASM_EXTABLE(1b, 3b) \
: "=m" ((ctxt)->eflags), "=&r" (_tmp), \ : "=m" ((ctxt)->eflags), "=&r" (_tmp), \
"+a" (*rax), "+d" (*rdx), "+qm"(_ex) \ "+a" (*rax), "+d" (*rdx), "+qm"(_ex) \
: "i" (EFLAGS_MASK), "m" ((ctxt)->src.val), \ : "i" (EFLAGS_MASK), "m" ((ctxt)->src.val)); \
"a" (*rax), "d" (*rdx)); \
} while (0) } while (0)
/* instruction has only one source operand, destination is implicit (e.g. mul, div, imul, idiv) */ /* instruction has only one source operand, destination is implicit (e.g. mul, div, imul, idiv) */
......
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