Commit cba4ca75 authored by Michal Kazior's avatar Michal Kazior Committed by Kalle Valo

ath10k: fix typo in define name

Signed-off-by: default avatarMichal Kazior <michal.kazior@tieto.com>
Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
parent 3a0861ff
...@@ -79,7 +79,7 @@ static inline void ath10k_ce_src_ring_write_index_set(struct ath10k *ar, ...@@ -79,7 +79,7 @@ static inline void ath10k_ce_src_ring_write_index_set(struct ath10k *ar,
struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
void __iomem *indicator_addr; void __iomem *indicator_addr;
if (!test_bit(ATH10K_PCI_FEATURE_HW_1_0_WARKAROUND, ar_pci->features)) { if (!test_bit(ATH10K_PCI_FEATURE_HW_1_0_WORKAROUND, ar_pci->features)) {
ath10k_pci_write32(ar, ce_ctrl_addr + SR_WR_INDEX_ADDRESS, n); ath10k_pci_write32(ar, ce_ctrl_addr + SR_WR_INDEX_ADDRESS, n);
return; return;
} }
......
...@@ -2117,7 +2117,7 @@ static void ath10k_pci_dump_features(struct ath10k_pci *ar_pci) ...@@ -2117,7 +2117,7 @@ static void ath10k_pci_dump_features(struct ath10k_pci *ar_pci)
case ATH10K_PCI_FEATURE_MSI_X: case ATH10K_PCI_FEATURE_MSI_X:
ath10k_dbg(ATH10K_DBG_PCI, "device supports MSI-X\n"); ath10k_dbg(ATH10K_DBG_PCI, "device supports MSI-X\n");
break; break;
case ATH10K_PCI_FEATURE_HW_1_0_WARKAROUND: case ATH10K_PCI_FEATURE_HW_1_0_WORKAROUND:
ath10k_dbg(ATH10K_DBG_PCI, "QCA988X_1.0 workaround enabled\n"); ath10k_dbg(ATH10K_DBG_PCI, "QCA988X_1.0 workaround enabled\n");
break; break;
} }
...@@ -2144,7 +2144,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev, ...@@ -2144,7 +2144,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
switch (pci_dev->device) { switch (pci_dev->device) {
case QCA988X_1_0_DEVICE_ID: case QCA988X_1_0_DEVICE_ID:
set_bit(ATH10K_PCI_FEATURE_HW_1_0_WARKAROUND, ar_pci->features); set_bit(ATH10K_PCI_FEATURE_HW_1_0_WORKAROUND, ar_pci->features);
break; break;
case QCA988X_2_0_DEVICE_ID: case QCA988X_2_0_DEVICE_ID:
set_bit(ATH10K_PCI_FEATURE_MSI_X, ar_pci->features); set_bit(ATH10K_PCI_FEATURE_MSI_X, ar_pci->features);
...@@ -2165,7 +2165,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev, ...@@ -2165,7 +2165,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
} }
/* Enable QCA988X_1.0 HW workarounds */ /* Enable QCA988X_1.0 HW workarounds */
if (test_bit(ATH10K_PCI_FEATURE_HW_1_0_WARKAROUND, ar_pci->features)) if (test_bit(ATH10K_PCI_FEATURE_HW_1_0_WORKAROUND, ar_pci->features))
spin_lock_init(&ar_pci->hw_v1_workaround_lock); spin_lock_init(&ar_pci->hw_v1_workaround_lock);
ar_pci->ar = ar; ar_pci->ar = ar;
......
...@@ -152,7 +152,7 @@ struct service_to_pipe { ...@@ -152,7 +152,7 @@ struct service_to_pipe {
enum ath10k_pci_features { enum ath10k_pci_features {
ATH10K_PCI_FEATURE_MSI_X = 0, ATH10K_PCI_FEATURE_MSI_X = 0,
ATH10K_PCI_FEATURE_HW_1_0_WARKAROUND = 1, ATH10K_PCI_FEATURE_HW_1_0_WORKAROUND = 1,
/* keep last */ /* keep last */
ATH10K_PCI_FEATURE_COUNT ATH10K_PCI_FEATURE_COUNT
...@@ -311,7 +311,7 @@ static inline void ath10k_pci_write32(struct ath10k *ar, u32 offset, ...@@ -311,7 +311,7 @@ static inline void ath10k_pci_write32(struct ath10k *ar, u32 offset,
struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
void __iomem *addr = ar_pci->mem; void __iomem *addr = ar_pci->mem;
if (test_bit(ATH10K_PCI_FEATURE_HW_1_0_WARKAROUND, ar_pci->features)) { if (test_bit(ATH10K_PCI_FEATURE_HW_1_0_WORKAROUND, ar_pci->features)) {
unsigned long irq_flags; unsigned long irq_flags;
spin_lock_irqsave(&ar_pci->hw_v1_workaround_lock, irq_flags); spin_lock_irqsave(&ar_pci->hw_v1_workaround_lock, irq_flags);
......
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